dc7ab9c80611567baa497dffbe42d89e040e68e8
[sfrench/cifs-2.6.git] / arch / powerpc / boot / dts / mpc885ads.dts
1 /*
2  * MPC885 ADS Device Tree Source
3  *
4  * Copyright 2006 MontaVista Software, Inc.
5  *
6  * This program is free software; you can redistribute  it and/or modify it
7  * under  the terms of  the GNU General  Public License as published by the
8  * Free Software Foundation;  either version 2 of the  License, or (at your
9  * option) any later version.
10  */
11
12
13 / {
14         model = "MPC885ADS";
15         compatible = "mpc8xx";
16         #address-cells = <1>;
17         #size-cells = <1>;
18
19         cpus {
20                 #address-cells = <1>;
21                 #size-cells = <0>;
22
23                 PowerPC,885@0 {
24                         device_type = "cpu";
25                         reg = <0>;
26                         d-cache-line-size = <20>;       // 32 bytes
27                         i-cache-line-size = <20>;       // 32 bytes
28                         d-cache-size = <2000>;          // L1, 8K
29                         i-cache-size = <2000>;          // L1, 8K
30                         timebase-frequency = <0>;
31                         bus-frequency = <0>;
32                         clock-frequency = <0>;
33                         32-bit;
34                         interrupts = <f 2>;     // decrementer interrupt
35                         interrupt-parent = <&Mpc8xx_pic>;
36                 };
37         };
38
39         memory {
40                 device_type = "memory";
41                 reg = <00000000 800000>;
42         };
43
44         soc885@ff000000 {
45                 #address-cells = <1>;
46                 #size-cells = <1>;
47                 #interrupt-cells = <2>;
48                 device_type = "soc";
49                 ranges = <0 ff000000 00100000>;
50                 reg = <ff000000 00000200>;
51                 bus-frequency = <0>;
52                 mdio@e80 {
53                         device_type = "mdio";
54                         compatible = "fs_enet";
55                         reg = <e80 8>;
56                         #address-cells = <1>;
57                         #size-cells = <0>;
58                         Phy0: ethernet-phy@0 {
59                                 reg = <0>;
60                                 device_type = "ethernet-phy";
61                         };
62                         Phy1: ethernet-phy@1 {
63                                 reg = <1>;
64                                 device_type = "ethernet-phy";
65                         };
66                         Phy2: ethernet-phy@2 {
67                                 reg = <2>;
68                                 device_type = "ethernet-phy";
69                         };
70                 };
71
72                 fec@e00 {
73                         device_type = "network";
74                         compatible = "fs_enet";
75                         model = "FEC";
76                         device-id = <1>;
77                         reg = <e00 188>;
78                         mac-address = [ 00 00 0C 00 01 FD ];
79                         interrupts = <3 1>;
80                         interrupt-parent = <&Mpc8xx_pic>;
81                         phy-handle = <&Phy1>;
82                 };
83
84                 fec@1e00 {
85                         device_type = "network";
86                         compatible = "fs_enet";
87                         model = "FEC";
88                         device-id = <2>;
89                         reg = <1e00 188>;
90                         mac-address = [ 00 00 0C 00 02 FD ];
91                         interrupts = <7 1>;
92                         interrupt-parent = <&Mpc8xx_pic>;
93                         phy-handle = <&Phy2>;
94                 };
95
96                 Mpc8xx_pic: pic@ff000000 {
97                         interrupt-controller;
98                         #address-cells = <0>;
99                         #interrupt-cells = <2>;
100                         reg = <0 24>;
101                         built-in;
102                         device_type = "mpc8xx-pic";
103                         compatible = "CPM";
104                 };
105
106                 pcmcia@0080 {
107                         #address-cells = <3>;
108                         #interrupt-cells = <1>;
109                         #size-cells = <2>;
110                         compatible = "fsl,pq-pcmcia";
111                         device_type = "pcmcia";
112                         reg = <80 80>;
113                         interrupt-parent = <&Mpc8xx_pic>;
114                         interrupts = <d 1>;
115                 };
116
117                 cpm@ff000000 {
118                         #address-cells = <1>;
119                         #size-cells = <1>;
120                         #interrupt-cells = <2>;
121                         device_type = "cpm";
122                         model = "CPM";
123                         ranges = <0 0 4000>;
124                         reg = <860 f0>;
125                         command-proc = <9c0>;
126                         brg-frequency = <0>;
127                         interrupts = <0 2>;     // cpm error interrupt
128                         interrupt-parent = <&Cpm_pic>;
129
130                         Cpm_pic: pic@930 {
131                                 interrupt-controller;
132                                 #address-cells = <0>;
133                                 #interrupt-cells = <2>;
134                                 interrupts = <5 2 0 2>;
135                                 interrupt-parent = <&Mpc8xx_pic>;
136                                 reg = <930 20>;
137                                 built-in;
138                                 device_type = "cpm-pic";
139                                 compatible = "CPM";
140                         };
141
142                         smc@a80 {
143                                 device_type = "serial";
144                                 compatible = "cpm_uart";
145                                 model = "SMC";
146                                 device-id = <1>;
147                                 reg = <a80 10 3e80 40>;
148                                 clock-setup = <00ffffff 0>;
149                                 rx-clock = <1>;
150                                 tx-clock = <1>;
151                                 current-speed = <0>;
152                                 interrupts = <4 3>;
153                                 interrupt-parent = <&Cpm_pic>;
154                         };
155
156                         smc@a90 {
157                                 device_type = "serial";
158                                 compatible = "cpm_uart";
159                                 model = "SMC";
160                                 device-id = <2>;
161                                 reg = <a90 20 3f80 40>;
162                                 clock-setup = <ff00ffff 90000>;
163                                 rx-clock = <2>;
164                                 tx-clock = <2>;
165                                 current-speed = <0>;
166                                 interrupts = <3 3>;
167                                 interrupt-parent = <&Cpm_pic>;
168                         };
169
170                         scc@a40 {
171                                 device_type = "network";
172                                 compatible = "fs_enet";
173                                 model = "SCC";
174                                 device-id = <3>;
175                                 reg = <a40 18 3e00 80>;
176                                 mac-address = [ 00 00 0C 00 03 FD ];
177                                 interrupts = <1c 3>;
178                                 interrupt-parent = <&Cpm_pic>;
179                                 phy-handle = <&Phy2>;
180                         };
181                 };
182         };
183 };