2 * T4240 Silicon/SoC Device Tree Source (post include)
4 * Copyright 2012 Freescale Semiconductor Inc.
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38 compatible = "fsl,ifc", "simple-bus";
39 interrupts = <25 2 0 0>;
42 /* controller at 0x240000 */
44 compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0";
48 bus-range = <0x0 0xff>;
49 interrupts = <20 2 0 0>;
51 #interrupt-cells = <1>;
56 interrupts = <20 2 0 0>;
57 interrupt-map-mask = <0xf800 0 0 7>;
60 0000 0 0 1 &mpic 40 1 0 0
61 0000 0 0 2 &mpic 1 1 0 0
62 0000 0 0 3 &mpic 2 1 0 0
63 0000 0 0 4 &mpic 3 1 0 0
68 /* controller at 0x250000 */
70 compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0";
75 interrupts = <21 2 0 0>;
77 #interrupt-cells = <1>;
82 interrupts = <21 2 0 0>;
83 interrupt-map-mask = <0xf800 0 0 7>;
86 0000 0 0 1 &mpic 41 1 0 0
87 0000 0 0 2 &mpic 5 1 0 0
88 0000 0 0 3 &mpic 6 1 0 0
89 0000 0 0 4 &mpic 7 1 0 0
94 /* controller at 0x260000 */
96 compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0";
100 bus-range = <0x0 0xff>;
101 interrupts = <22 2 0 0>;
103 #interrupt-cells = <1>;
105 #address-cells = <3>;
108 interrupts = <22 2 0 0>;
109 interrupt-map-mask = <0xf800 0 0 7>;
112 0000 0 0 1 &mpic 42 1 0 0
113 0000 0 0 2 &mpic 9 1 0 0
114 0000 0 0 3 &mpic 10 1 0 0
115 0000 0 0 4 &mpic 11 1 0 0
120 /* controller at 0x270000 */
122 compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0";
125 #address-cells = <3>;
126 bus-range = <0x0 0xff>;
127 interrupts = <23 2 0 0>;
129 #interrupt-cells = <1>;
131 #address-cells = <3>;
134 interrupts = <23 2 0 0>;
135 interrupt-map-mask = <0xf800 0 0 7>;
138 0000 0 0 1 &mpic 43 1 0 0
139 0000 0 0 2 &mpic 0 1 0 0
140 0000 0 0 3 &mpic 4 1 0 0
141 0000 0 0 4 &mpic 8 1 0 0
147 compatible = "fsl,srio";
148 interrupts = <16 2 1 11>;
149 #address-cells = <2>;
154 #address-cells = <2>;
160 #address-cells = <2>;
167 #address-cells = <1>;
169 compatible = "fsl,dcsr", "simple-bus";
172 compatible = "fsl,t4240-dcsr-epu", "fsl,dcsr-epu";
173 interrupts = <52 2 0 0
181 compatible = "fsl,t4240-dcsr-cnpc", "fsl,dcsr-cnpc";
182 reg = <0x1000 0x1000 0x1002000 0x10000>;
185 compatible = "fsl,dcsr-nxc";
186 reg = <0x2000 0x1000>;
189 compatible = "fsl,dcsr-corenet";
190 reg = <0x8000 0x1000 0x1A000 0x1000>;
193 compatible = "fsl,t4240-dcsr-dpaa", "fsl,dcsr-dpaa";
194 reg = <0x9000 0x1000>;
197 compatible = "fsl,t4240-dcsr-ocn", "fsl,dcsr-ocn";
198 reg = <0x11000 0x1000>;
201 compatible = "fsl,dcsr-ddr";
202 dev-handle = <&ddr1>;
203 reg = <0x12000 0x1000>;
206 compatible = "fsl,dcsr-ddr";
207 dev-handle = <&ddr2>;
208 reg = <0x13000 0x1000>;
211 compatible = "fsl,dcsr-ddr";
212 dev-handle = <&ddr3>;
213 reg = <0x14000 0x1000>;
216 compatible = "fsl,t4240-dcsr-nal", "fsl,dcsr-nal";
217 reg = <0x18000 0x1000>;
220 compatible = "fsl,t4240-dcsr-rcpm", "fsl,dcsr-rcpm";
221 reg = <0x22000 0x1000>;
224 compatible = "fsl,t4240-dcsr-snpc", "fsl,dcsr-snpc";
225 reg = <0x30000 0x1000 0x1022000 0x10000>;
228 compatible = "fsl,t4240-dcsr-snpc", "fsl,dcsr-snpc";
229 reg = <0x31000 0x1000 0x1042000 0x10000>;
232 compatible = "fsl,t4240-dcsr-snpc", "fsl,dcsr-snpc";
233 reg = <0x32000 0x1000 0x1062000 0x10000>;
235 dcsr-cpu-sb-proxy@100000 {
236 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
237 cpu-handle = <&cpu0>;
238 reg = <0x100000 0x1000 0x101000 0x1000>;
240 dcsr-cpu-sb-proxy@108000 {
241 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
242 cpu-handle = <&cpu1>;
243 reg = <0x108000 0x1000 0x109000 0x1000>;
245 dcsr-cpu-sb-proxy@110000 {
246 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
247 cpu-handle = <&cpu2>;
248 reg = <0x110000 0x1000 0x111000 0x1000>;
250 dcsr-cpu-sb-proxy@118000 {
251 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
252 cpu-handle = <&cpu3>;
253 reg = <0x118000 0x1000 0x119000 0x1000>;
255 dcsr-cpu-sb-proxy@120000 {
256 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
257 cpu-handle = <&cpu4>;
258 reg = <0x120000 0x1000 0x121000 0x1000>;
260 dcsr-cpu-sb-proxy@128000 {
261 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
262 cpu-handle = <&cpu5>;
263 reg = <0x128000 0x1000 0x129000 0x1000>;
265 dcsr-cpu-sb-proxy@130000 {
266 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
267 cpu-handle = <&cpu6>;
268 reg = <0x130000 0x1000 0x131000 0x1000>;
270 dcsr-cpu-sb-proxy@138000 {
271 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
272 cpu-handle = <&cpu7>;
273 reg = <0x138000 0x1000 0x139000 0x1000>;
275 dcsr-cpu-sb-proxy@140000 {
276 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
277 cpu-handle = <&cpu8>;
278 reg = <0x140000 0x1000 0x141000 0x1000>;
280 dcsr-cpu-sb-proxy@148000 {
281 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
282 cpu-handle = <&cpu9>;
283 reg = <0x148000 0x1000 0x149000 0x1000>;
285 dcsr-cpu-sb-proxy@150000 {
286 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
287 cpu-handle = <&cpu10>;
288 reg = <0x150000 0x1000 0x151000 0x1000>;
290 dcsr-cpu-sb-proxy@158000 {
291 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
292 cpu-handle = <&cpu11>;
293 reg = <0x158000 0x1000 0x159000 0x1000>;
298 #address-cells = <1>;
301 compatible = "simple-bus";
304 compatible = "fsl,soc-sram-error";
305 interrupts = <16 2 1 29>;
309 compatible = "fsl,corenet-law";
314 ddr1: memory-controller@8000 {
315 compatible = "fsl,qoriq-memory-controller-v4.7",
316 "fsl,qoriq-memory-controller";
317 reg = <0x8000 0x1000>;
318 interrupts = <16 2 1 23>;
321 ddr2: memory-controller@9000 {
322 compatible = "fsl,qoriq-memory-controller-v4.7",
323 "fsl,qoriq-memory-controller";
324 reg = <0x9000 0x1000>;
325 interrupts = <16 2 1 22>;
328 ddr3: memory-controller@a000 {
329 compatible = "fsl,qoriq-memory-controller-v4.7",
330 "fsl,qoriq-memory-controller";
331 reg = <0xa000 0x1000>;
332 interrupts = <16 2 1 21>;
335 cpc: l3-cache-controller@10000 {
336 compatible = "fsl,t4240-l3-cache-controller", "cache";
337 reg = <0x10000 0x1000
340 interrupts = <16 2 1 27
346 compatible = "fsl,corenet2-cf", "fsl,corenet-cf";
347 reg = <0x18000 0x1000>;
348 interrupts = <16 2 1 31>;
349 fsl,ccf-num-csdids = <32>;
350 fsl,ccf-num-snoopids = <32>;
354 compatible = "fsl,pamu-v1.0", "fsl,pamu";
355 reg = <0x20000 0x6000>;
356 fsl,portid-mapping = <0x8000>;
362 /include/ "qoriq-mpic4.3.dtsi"
364 guts: global-utilities@e0000 {
365 compatible = "fsl,t4240-device-config", "fsl,qoriq-device-config-2.0";
366 reg = <0xe0000 0xe00>;
368 fsl,liodn-bits = <12>;
371 clockgen: global-utilities@e1000 {
372 compatible = "fsl,t4240-clockgen", "fsl,qoriq-clockgen-2.0";
373 ranges = <0x0 0xe1000 0x1000>;
374 reg = <0xe1000 0x1000>;
375 #address-cells = <1>;
380 compatible = "fsl,qoriq-sysclk-2.0";
381 clock-output-names = "sysclk";
387 compatible = "fsl,qoriq-core-pll-2.0";
389 clock-output-names = "pll0", "pll0-div2", "pll0-div4";
395 compatible = "fsl,qoriq-core-pll-2.0";
397 clock-output-names = "pll1", "pll1-div2", "pll1-div4";
403 compatible = "fsl,qoriq-core-pll-2.0";
405 clock-output-names = "pll2", "pll2-div2", "pll2-div4";
411 compatible = "fsl,qoriq-core-pll-2.0";
413 clock-output-names = "pll3", "pll3-div2", "pll3-div4";
419 compatible = "fsl,qoriq-core-pll-2.0";
421 clock-output-names = "pll4", "pll4-div2", "pll4-div4";
427 compatible = "fsl,qoriq-core-mux-2.0";
428 clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
429 <&pll1 0>, <&pll1 1>, <&pll1 2>,
430 <&pll2 0>, <&pll2 1>, <&pll2 2>;
431 clock-names = "pll0", "pll0-div2", "pll0-div4",
432 "pll1", "pll1-div2", "pll1-div4",
433 "pll2", "pll2-div2", "pll2-div4";
434 clock-output-names = "cmux0";
440 compatible = "fsl,qoriq-core-mux-2.0";
441 clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
442 <&pll1 0>, <&pll1 1>, <&pll1 2>,
443 <&pll2 0>, <&pll2 1>, <&pll2 2>;
444 clock-names = "pll0", "pll0-div2", "pll0-div4",
445 "pll1", "pll1-div2", "pll1-div4",
446 "pll2", "pll2-div2", "pll2-div4";
447 clock-output-names = "cmux1";
453 compatible = "fsl,qoriq-core-mux-2.0";
454 clocks = <&pll3 0>, <&pll3 1>, <&pll3 2>,
455 <&pll4 0>, <&pll4 1>, <&pll4 2>;
456 clock-names = "pll3", "pll3-div2", "pll3-div4",
457 "pll4", "pll4-div2", "pll4-div4";
458 clock-output-names = "cmux2";
462 rcpm: global-utilities@e2000 {
463 compatible = "fsl,t4240-rcpm", "fsl,qoriq-rcpm-2.0";
464 reg = <0xe2000 0x1000>;
468 compatible = "fsl,t4240-sfp";
469 reg = <0xe8000 0x1000>;
472 serdes: serdes@ea000 {
473 compatible = "fsl,t4240-serdes";
474 reg = <0xea000 0x4000>;
477 /include/ "elo3-dma-0.dtsi"
478 /include/ "elo3-dma-1.dtsi"
479 /include/ "elo3-dma-2.dtsi"
481 /include/ "qoriq-espi-0.dtsi"
483 fsl,espi-num-chipselects = <4>;
486 /include/ "qoriq-esdhc-0.dtsi"
488 compatible = "fsl,t4240-esdhc", "fsl,esdhc";
491 /include/ "qoriq-i2c-0.dtsi"
492 /include/ "qoriq-i2c-1.dtsi"
493 /include/ "qoriq-duart-0.dtsi"
494 /include/ "qoriq-duart-1.dtsi"
495 /include/ "qoriq-gpio-0.dtsi"
496 /include/ "qoriq-gpio-1.dtsi"
497 /include/ "qoriq-gpio-2.dtsi"
498 /include/ "qoriq-gpio-3.dtsi"
499 /include/ "qoriq-usb2-mph-0.dtsi"
501 compatible = "fsl-usb2-mph-v2.5", "fsl-usb2-mph";
505 /include/ "qoriq-usb2-dr-0.dtsi"
507 compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr";
511 /include/ "qoriq-sata2-0.dtsi"
512 /include/ "qoriq-sata2-1.dtsi"
513 /include/ "qoriq-sec5.0-0.dtsi"
515 L2_1: l2-cache-controller@c20000 {
516 compatible = "fsl,t4240-l2-cache-controller";
517 reg = <0xc20000 0x40000>;
518 next-level-cache = <&cpc>;
520 L2_2: l2-cache-controller@c60000 {
521 compatible = "fsl,t4240-l2-cache-controller";
522 reg = <0xc60000 0x40000>;
523 next-level-cache = <&cpc>;
525 L2_3: l2-cache-controller@ca0000 {
526 compatible = "fsl,t4240-l2-cache-controller";
527 reg = <0xca0000 0x40000>;
528 next-level-cache = <&cpc>;