2 ** linux/atarihw.h -- This header defines some macros and pointers for
3 ** the various Atari custom hardware registers.
5 ** Copyright 1994 by Björn Brauel
8 ** Added definitions for TT specific chips.
10 ** 1996-09-13 lars brinkhoff <f93labr@dd.chalmers.se>:
11 ** Finally added definitions for the matrix/codec and the DSP56001 host
14 ** This file is subject to the terms and conditions of the GNU General Public
15 ** License. See the file COPYING in the main directory of this archive
20 #ifndef _LINUX_ATARIHW_H_
21 #define _LINUX_ATARIHW_H_
23 #include <linux/types.h>
24 #include <asm/bootinfo-atari.h>
25 #include <asm/raw_io.h>
28 extern u_long atari_mch_cookie;
29 extern u_long atari_mch_type;
30 extern u_long atari_switches;
31 extern int atari_rtc_year_offset;
32 extern int atari_dont_touch_floppy_select;
34 extern int atari_SCC_reset_done;
36 /* convenience macros for testing machine type */
37 #define MACH_IS_ST ((atari_mch_cookie >> 16) == ATARI_MCH_ST)
38 #define MACH_IS_STE ((atari_mch_cookie >> 16) == ATARI_MCH_STE && \
39 (atari_mch_cookie & 0xffff) == 0)
40 #define MACH_IS_MSTE ((atari_mch_cookie >> 16) == ATARI_MCH_STE && \
41 (atari_mch_cookie & 0xffff) == 0x10)
42 #define MACH_IS_TT ((atari_mch_cookie >> 16) == ATARI_MCH_TT)
43 #define MACH_IS_FALCON ((atari_mch_cookie >> 16) == ATARI_MCH_FALCON)
44 #define MACH_IS_MEDUSA (atari_mch_type == ATARI_MACH_MEDUSA)
45 #define MACH_IS_AB40 (atari_mch_type == ATARI_MACH_AB40)
47 /* values for atari_switches */
48 #define ATARI_SWITCH_IKBD 0x01
49 #define ATARI_SWITCH_MIDI 0x02
50 #define ATARI_SWITCH_SND6 0x04
51 #define ATARI_SWITCH_SND7 0x08
52 #define ATARI_SWITCH_OVSC_SHIFT 16
53 #define ATARI_SWITCH_OVSC_IKBD (ATARI_SWITCH_IKBD << ATARI_SWITCH_OVSC_SHIFT)
54 #define ATARI_SWITCH_OVSC_MIDI (ATARI_SWITCH_MIDI << ATARI_SWITCH_OVSC_SHIFT)
55 #define ATARI_SWITCH_OVSC_SND6 (ATARI_SWITCH_SND6 << ATARI_SWITCH_OVSC_SHIFT)
56 #define ATARI_SWITCH_OVSC_SND7 (ATARI_SWITCH_SND7 << ATARI_SWITCH_OVSC_SHIFT)
57 #define ATARI_SWITCH_OVSC_MASK 0xffff0000
60 * Define several Hardware-Chips for indication so that for the ATARI we do
61 * no longer decide whether it is a Falcon or other machine . It's just
62 * important what hardware the machine uses
65 /* ++roman 08/08/95: rewritten from ORing constants to a C bitfield */
67 #define ATARIHW_DECLARE(name) unsigned name : 1
68 #define ATARIHW_SET(name) (atari_hw_present.name = 1)
69 #define ATARIHW_PRESENT(name) (atari_hw_present.name)
71 struct atari_hw_present {
73 ATARIHW_DECLARE(STND_SHIFTER); /* ST-Shifter - no base low ! */
74 ATARIHW_DECLARE(EXTD_SHIFTER); /* STe-Shifter - 24 bit address */
75 ATARIHW_DECLARE(TT_SHIFTER); /* TT-Shifter */
76 ATARIHW_DECLARE(VIDEL_SHIFTER); /* Falcon-Shifter */
78 ATARIHW_DECLARE(YM_2149); /* Yamaha YM 2149 */
79 ATARIHW_DECLARE(PCM_8BIT); /* PCM-Sound in STe-ATARI */
80 ATARIHW_DECLARE(CODEC); /* CODEC Sound (Falcon) */
81 /* disk storage interfaces */
82 ATARIHW_DECLARE(TT_SCSI); /* Directly mapped NCR5380 */
83 ATARIHW_DECLARE(ST_SCSI); /* NCR5380 via ST-DMA (Falcon) */
84 ATARIHW_DECLARE(ACSI); /* Standard ACSI like in STs */
85 ATARIHW_DECLARE(IDE); /* IDE Interface */
86 ATARIHW_DECLARE(FDCSPEED); /* 8/16 MHz switch for FDC */
87 /* other I/O hardware */
88 ATARIHW_DECLARE(ST_MFP); /* The ST-MFP (there should be no Atari
89 without it... but who knows?) */
90 ATARIHW_DECLARE(TT_MFP); /* 2nd MFP */
91 ATARIHW_DECLARE(SCC); /* Serial Communications Contr. */
92 ATARIHW_DECLARE(ST_ESCC); /* SCC Z83230 in an ST */
93 ATARIHW_DECLARE(ANALOG_JOY); /* Paddle Interface for STe
95 ATARIHW_DECLARE(MICROWIRE); /* Microwire Interface */
97 ATARIHW_DECLARE(STND_DMA); /* 24 Bit limited ST-DMA */
98 ATARIHW_DECLARE(EXTD_DMA); /* 32 Bit ST-DMA */
99 ATARIHW_DECLARE(SCSI_DMA); /* DMA for the NCR5380 */
100 ATARIHW_DECLARE(SCC_DMA); /* DMA for the SCC */
101 /* real time clocks */
102 ATARIHW_DECLARE(TT_CLK); /* TT compatible clock chip */
103 ATARIHW_DECLARE(MSTE_CLK); /* Mega ST(E) clock chip */
104 /* supporting hardware */
105 ATARIHW_DECLARE(SCU); /* System Control Unit */
106 ATARIHW_DECLARE(BLITTER); /* Blitter */
107 ATARIHW_DECLARE(VME); /* VME Bus */
108 ATARIHW_DECLARE(DSP56K); /* DSP56k processor in Falcon */
111 extern struct atari_hw_present atari_hw_present;
114 /* Reading the MFP port register gives a machine independent delay, since the
115 * MFP always has a 8 MHz clock. This avoids problems with the varying length
116 * of nops on various machines. Somebody claimed that the tstb takes 600 ns.
119 __asm__ __volatile__ ( "tstb %0" : : "m" (st_mfp.par_dt_reg) : "cc" );
121 /* Do cache push/invalidate for DMA read/write. This function obeys the
122 * snooping on some machines (Medusa) and processors: The Medusa itself can
123 * snoop, but only the '040 can source data from its cache to DMA writes i.e.,
124 * reads from memory). Both '040 and '060 invalidate cache entries on snooped
125 * DMA reads (i.e., writes to memory).
129 #define atari_readb raw_inb
130 #define atari_writeb raw_outb
132 #define atari_inb_p raw_inb
133 #define atari_outb_p raw_outb
137 #include <linux/mm.h>
138 #include <asm/cacheflush.h>
140 static inline void dma_cache_maintenance( unsigned long paddr,
146 if (!MACH_IS_MEDUSA || CPU_IS_060)
147 cache_push( paddr, len );
151 cache_clear( paddr, len );
166 #define SHF_BAS (0xffff8200)
174 u_char volatile vcounthi;
176 u_char volatile vcountmid;
178 u_char volatile vcountlow;
179 u_char volatile syncmode;
184 # define shifter ((*(volatile struct SHIFTER *)SHF_BAS))
186 #define SHF_FBAS (0xffff820e)
192 # define shifter_f030 ((*(volatile struct SHIFTER_F030 *)SHF_FBAS))
195 #define SHF_TBAS (0xffff8200)
198 u_char bas_hi; /* video mem base addr, high and mid byte */
202 u_char vcount_hi; /* pointer to currently displayed byte */
207 u_short st_sync; /* ST compatible sync mode register, unused */
209 u_char bas_lo; /* video mem addr, low byte */
210 u_char char_dummy6[2+3*16];
212 u_short color_reg[16]; /* 16 color registers */
213 u_char st_shiftmode; /* ST compatible shift mode register, unused */
215 u_short tt_shiftmode; /* TT shift mode register */
219 #define shifter_tt ((*(volatile struct SHIFTER_TT *)SHF_TBAS))
221 /* values for shifter_tt->tt_shiftmode */
222 #define TT_SHIFTER_STLOW 0x0000
223 #define TT_SHIFTER_STMID 0x0100
224 #define TT_SHIFTER_STHIGH 0x0200
225 #define TT_SHIFTER_TTLOW 0x0700
226 #define TT_SHIFTER_TTMID 0x0400
227 #define TT_SHIFTER_TTHIGH 0x0600
228 #define TT_SHIFTER_MODEMASK 0x0700
229 #define TT_SHIFTER_NUMMODE 0x0008
230 #define TT_SHIFTER_PALETTE_MASK 0x000f
231 #define TT_SHIFTER_GRAYMODE 0x1000
233 /* 256 TT palette registers */
234 #define TT_PALETTE_BASE (0xffff8400)
235 #define tt_palette ((volatile u_short *)TT_PALETTE_BASE)
237 #define TT_PALETTE_RED_MASK 0x0f00
238 #define TT_PALETTE_GREEN_MASK 0x00f0
239 #define TT_PALETTE_BLUE_MASK 0x000f
242 ** Falcon030 VIDEL Video Controller
243 ** for description see File 'linux\tools\atari\hardware.txt
245 #define f030_col ((u_long *) 0xffff9800)
246 #define f030_xreg ((u_short*) 0xffff8282)
247 #define f030_yreg ((u_short*) 0xffff82a2)
248 #define f030_creg ((u_short*) 0xffff82c0)
249 #define f030_sreg ((u_short*) 0xffff8260)
250 #define f030_mreg ((u_short*) 0xffff820a)
251 #define f030_linewidth ((u_short*) 0xffff820e)
252 #define f030_hscroll ((u_char*) 0xffff8265)
254 #define VIDEL_BAS (0xffff8260)
279 #define videl ((*(volatile struct VIDEL *)VIDEL_BAS))
282 ** DMA/WD1772 Disk Controller
285 #define FWD_BAS (0xffff8604)
288 u_short fdc_acces_seccount;
289 u_short dma_mode_status;
290 u_char dma_vhi; /* Some extended ST-DMAs can handle 32 bit addresses */
298 # define dma_wd ((*(volatile struct DMA_WD *)FWD_BAS))
300 #define st_dma dma_wd
301 /* The two highest bytes of an extended DMA as a short; this is a must
304 #define st_dma_ext_dmahi (*((volatile unsigned short *)0xffff8608))
311 #define YM_BAS (0xffff8800)
314 u_char rd_data_reg_sel;
318 #define sound_ym ((*(volatile struct SOUND_YM *)YM_BAS))
322 #define TT_SCSI_DMA_BAS (0xffff8700)
343 #define tt_scsi_dma ((*(volatile struct TT_DMA *)TT_SCSI_DMA_BAS))
345 /* TT SCSI Controller 5380 */
347 #define TT_5380_BAS (0xffff8781)
365 #define tt_scsi ((*(volatile struct TT_5380 *)TT_5380_BAS))
366 #define tt_scsi_regp ((volatile char *)TT_5380_BAS)
370 ** Falcon DMA Sound Subsystem
373 #define MATRIX_BASE (0xffff8930)
378 u_char external_frequency_divider;
379 u_char internal_frequency_divider;
381 #define falcon_matrix (*(volatile struct MATRIX *)MATRIX_BASE)
383 #define CODEC_BASE (0xffff8936)
388 #define CODEC_SOURCE_ADC 1
389 #define CODEC_SOURCE_MATRIX 2
391 #define ADC_SOURCE_RIGHT_PSG 1
392 #define ADC_SOURCE_LEFT_PSG 2
394 #define CODEC_GAIN_RIGHT 0x0f
395 #define CODEC_GAIN_LEFT 0xf0
397 #define CODEC_ATTENUATION_RIGHT 0x0f
398 #define CODEC_ATTENUATION_LEFT 0xf0
401 #define CODEC_OVERFLOW_RIGHT 1
402 #define CODEC_OVERFLOW_LEFT 2
403 u_char unused2, unused3, unused4, unused5;
404 u_char gpio_directions;
405 #define CODEC_GPIO_IN 0
406 #define CODEC_GPIO_OUT 1
410 #define falcon_codec (*(volatile struct CODEC *)CODEC_BASE)
416 #define BLT_BAS (0xffff8a00)
420 u_short halftone[16];
437 # define blitter ((*(volatile struct BLITTER *)BLT_BAS))
444 #define SCC_BAS (0xffff8c81)
455 # define atari_scc ((*(volatile struct SCC*)SCC_BAS))
457 /* The ESCC (Z85230) in an Atari ST. The channels are reversed! */
458 # define st_escc ((*(volatile struct SCC*)0xfffffa31))
459 # define st_escc_dsr ((*(volatile char *)0xfffffa39))
461 /* TT SCC DMA Controller (same chip as SCSI DMA) */
463 #define TT_SCC_DMA_BAS (0xffff8c00)
464 #define tt_scc_dma ((*(volatile struct TT_DMA *)TT_SCC_DMA_BAS))
467 ** VIDEL Palette Register
470 #define FPL_BAS (0xffff9800)
475 # define videl_palette ((*(volatile struct VIDEL_PALETTE*)FPL_BAS))
479 ** Falcon DSP Host Interface
482 #define DSP56K_HOST_INTERFACE_BASE (0xffffa200)
483 struct DSP56K_HOST_INTERFACE {
485 #define DSP56K_ICR_RREQ 0x01
486 #define DSP56K_ICR_TREQ 0x02
487 #define DSP56K_ICR_HF0 0x08
488 #define DSP56K_ICR_HF1 0x10
489 #define DSP56K_ICR_HM0 0x20
490 #define DSP56K_ICR_HM1 0x40
491 #define DSP56K_ICR_INIT 0x80
494 #define DSP56K_CVR_HV_MASK 0x1f
495 #define DSP56K_CVR_HC 0x80
498 #define DSP56K_ISR_RXDF 0x01
499 #define DSP56K_ISR_TXDE 0x02
500 #define DSP56K_ISR_TRDY 0x04
501 #define DSP56K_ISR_HF2 0x08
502 #define DSP56K_ISR_HF3 0x10
503 #define DSP56K_ISR_DMA 0x40
504 #define DSP56K_ISR_HREQ 0x80
514 #define dsp56k_host_interface ((*(volatile struct DSP56K_HOST_INTERFACE *)DSP56K_HOST_INTERFACE_BASE))
520 #define MFP_BAS (0xfffffa01)
571 # define st_mfp ((*(volatile struct MFP*)MFP_BAS))
573 /* TT's second MFP */
575 #define TT_MFP_BAS (0xfffffa81)
576 # define tt_mfp ((*(volatile struct MFP*)TT_MFP_BAS))
579 /* TT System Control Unit */
581 #define TT_SCU_BAS (0xffff8e01)
599 #define tt_scu ((*(volatile struct TT_SCU *)TT_SCU_BAS))
601 /* TT real time clock */
603 #define TT_RTC_BAS (0xffff8961)
609 #define tt_rtc ((*(volatile struct TT_RTC *)TT_RTC_BAS))
615 /* constants for the ACIA registers */
617 /* baudrate selection and reset (Baudrate = clock/factor) */
623 /* character format */
624 #define ACIA_D7E2S (0<<2) /* 7 data, even parity, 2 stop */
625 #define ACIA_D7O2S (1<<2) /* 7 data, odd parity, 2 stop */
626 #define ACIA_D7E1S (2<<2) /* 7 data, even parity, 1 stop */
627 #define ACIA_D7O1S (3<<2) /* 7 data, odd parity, 1 stop */
628 #define ACIA_D8N2S (4<<2) /* 8 data, no parity, 2 stop */
629 #define ACIA_D8N1S (5<<2) /* 8 data, no parity, 1 stop */
630 #define ACIA_D8E1S (6<<2) /* 8 data, even parity, 1 stop */
631 #define ACIA_D8O1S (7<<2) /* 8 data, odd parity, 1 stop */
633 /* transmit control */
634 #define ACIA_RLTID (0<<5) /* RTS low, TxINT disabled */
635 #define ACIA_RLTIE (1<<5) /* RTS low, TxINT enabled */
636 #define ACIA_RHTID (2<<5) /* RTS high, TxINT disabled */
637 #define ACIA_RLTIDSB (3<<5) /* RTS low, TxINT disabled, send break */
639 /* receive control */
640 #define ACIA_RID (0<<7) /* RxINT disabled */
641 #define ACIA_RIE (1<<7) /* RxINT enabled */
643 /* status fields of the ACIA */
644 #define ACIA_RDRF 1 /* Receive Data Register Full */
645 #define ACIA_TDRE (1<<1) /* Transmit Data Register Empty */
646 #define ACIA_DCD (1<<2) /* Data Carrier Detect */
647 #define ACIA_CTS (1<<3) /* Clear To Send */
648 #define ACIA_FE (1<<4) /* Framing Error */
649 #define ACIA_OVRN (1<<5) /* Receiver Overrun */
650 #define ACIA_PE (1<<6) /* Parity Error */
651 #define ACIA_IRQ (1<<7) /* Interrupt Request */
653 #define ACIA_BAS (0xfffffc00)
664 # define acia ((*(volatile struct ACIA*)ACIA_BAS))
666 #define TT_DMASND_BAS (0xffff8900)
668 u_char int_ctrl; /* Falcon: Interrupt control */
689 u_char track_select; /* Falcon */
697 u_char rec_track_select;
701 u_short output_atten;
703 # define tt_dmasnd ((*(volatile struct TT_DMASND *)TT_DMASND_BAS))
705 #define DMASND_MFP_INT_REPLAY 0x01
706 #define DMASND_MFP_INT_RECORD 0x02
707 #define DMASND_TIMERA_INT_REPLAY 0x04
708 #define DMASND_TIMERA_INT_RECORD 0x08
710 #define DMASND_CTRL_OFF 0x00
711 #define DMASND_CTRL_ON 0x01
712 #define DMASND_CTRL_REPEAT 0x02
713 #define DMASND_CTRL_RECORD_ON 0x10
714 #define DMASND_CTRL_RECORD_OFF 0x00
715 #define DMASND_CTRL_RECORD_REPEAT 0x20
716 #define DMASND_CTRL_SELECT_REPLAY 0x00
717 #define DMASND_CTRL_SELECT_RECORD 0x80
718 #define DMASND_MODE_MONO 0x80
719 #define DMASND_MODE_STEREO 0x00
720 #define DMASND_MODE_8BIT 0x00
721 #define DMASND_MODE_16BIT 0x40 /* Falcon only */
722 #define DMASND_MODE_6KHZ 0x00 /* Falcon: mute */
723 #define DMASND_MODE_12KHZ 0x01
724 #define DMASND_MODE_25KHZ 0x02
725 #define DMASND_MODE_50KHZ 0x03
728 #define DMASNDSetBase(bufstart) \
730 tt_dmasnd.bas_hi = (unsigned char)(((bufstart) & 0xff0000) >> 16); \
731 tt_dmasnd.bas_mid = (unsigned char)(((bufstart) & 0x00ff00) >> 8); \
732 tt_dmasnd.bas_low = (unsigned char) ((bufstart) & 0x0000ff); \
735 #define DMASNDGetAdr() ((tt_dmasnd.addr_hi << 16) + \
736 (tt_dmasnd.addr_mid << 8) + \
737 (tt_dmasnd.addr_low))
739 #define DMASNDSetEnd(bufend) \
741 tt_dmasnd.end_hi = (unsigned char)(((bufend) & 0xff0000) >> 16); \
742 tt_dmasnd.end_mid = (unsigned char)(((bufend) & 0x00ff00) >> 8); \
743 tt_dmasnd.end_low = (unsigned char) ((bufend) & 0x0000ff); \
747 #define TT_MICROWIRE_BAS (0xffff8922)
748 struct TT_MICROWIRE {
752 # define tt_microwire ((*(volatile struct TT_MICROWIRE *)TT_MICROWIRE_BAS))
754 #define MW_LM1992_ADDR 0x0400
756 #define MW_LM1992_VOLUME(dB) \
757 (0x0c0 | ((dB) < -80 ? 0 : (dB) > 0 ? 40 : (((dB) + 80) / 2)))
758 #define MW_LM1992_BALLEFT(dB) \
759 (0x140 | ((dB) < -40 ? 0 : (dB) > 0 ? 20 : (((dB) + 40) / 2)))
760 #define MW_LM1992_BALRIGHT(dB) \
761 (0x100 | ((dB) < -40 ? 0 : (dB) > 0 ? 20 : (((dB) + 40) / 2)))
762 #define MW_LM1992_TREBLE(dB) \
763 (0x080 | ((dB) < -12 ? 0 : (dB) > 12 ? 12 : (((dB) / 2) + 6)))
764 #define MW_LM1992_BASS(dB) \
765 (0x040 | ((dB) < -12 ? 0 : (dB) > 12 ? 12 : (((dB) / 2) + 6)))
767 #define MW_LM1992_PSG_LOW 0x000
768 #define MW_LM1992_PSG_HIGH 0x001
769 #define MW_LM1992_PSG_OFF 0x002
771 #define MSTE_RTC_BAS (0xfffffc21)
807 #define mste_rtc ((*(volatile struct MSTE_RTC *)MSTE_RTC_BAS))
810 ** EtherNAT add-on card for Falcon - combined ethernet and USB adapter
813 #define ATARI_ETHERNAT_PHYS_ADDR 0x80000000
815 #endif /* linux/atarihw.h */