Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jmorris...
[sfrench/cifs-2.6.git] / arch / ia64 / include / asm / xen / interface.h
1 /******************************************************************************
2  * arch-ia64/hypervisor-if.h
3  *
4  * Guest OS interface to IA64 Xen.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a copy
7  * of this software and associated documentation files (the "Software"), to
8  * deal in the Software without restriction, including without limitation the
9  * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10  * sell copies of the Software, and to permit persons to whom the Software is
11  * furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22  * DEALINGS IN THE SOFTWARE.
23  *
24  * Copyright by those who contributed. (in alphabetical order)
25  *
26  * Anthony Xu <anthony.xu@intel.com>
27  * Eddie Dong <eddie.dong@intel.com>
28  * Fred Yang <fred.yang@intel.com>
29  * Kevin Tian <kevin.tian@intel.com>
30  * Alex Williamson <alex.williamson@hp.com>
31  * Chris Wright <chrisw@sous-sol.org>
32  * Christian Limpach <Christian.Limpach@cl.cam.ac.uk>
33  * Dietmar Hahn <dietmar.hahn@fujitsu-siemens.com>
34  * Hollis Blanchard <hollisb@us.ibm.com>
35  * Isaku Yamahata <yamahata@valinux.co.jp>
36  * Jan Beulich <jbeulich@novell.com>
37  * John Levon <john.levon@sun.com>
38  * Kazuhiro Suzuki <kaz@jp.fujitsu.com>
39  * Keir Fraser <keir.fraser@citrix.com>
40  * Kouya Shimura <kouya@jp.fujitsu.com>
41  * Masaki Kanno <kanno.masaki@jp.fujitsu.com>
42  * Matt Chapman <matthewc@hp.com>
43  * Matthew Chapman <matthewc@hp.com>
44  * Samuel Thibault <samuel.thibault@eu.citrix.com>
45  * Tomonari Horikoshi <t.horikoshi@jp.fujitsu.com>
46  * Tristan Gingold <tgingold@free.fr>
47  * Tsunehisa Doi <Doi.Tsunehisa@jp.fujitsu.com>
48  * Yutaka Ezaki <yutaka.ezaki@jp.fujitsu.com>
49  * Zhang Xin <xing.z.zhang@intel.com>
50  * Zhang xiantao <xiantao.zhang@intel.com>
51  * dan.magenheimer@hp.com
52  * ian.pratt@cl.cam.ac.uk
53  * michael.fetterman@cl.cam.ac.uk
54  */
55
56 #ifndef _ASM_IA64_XEN_INTERFACE_H
57 #define _ASM_IA64_XEN_INTERFACE_H
58
59 #define __DEFINE_GUEST_HANDLE(name, type)       \
60         typedef struct { type *p; } __guest_handle_ ## name
61
62 #define DEFINE_GUEST_HANDLE_STRUCT(name)        \
63         __DEFINE_GUEST_HANDLE(name, struct name)
64 #define DEFINE_GUEST_HANDLE(name)       __DEFINE_GUEST_HANDLE(name, name)
65 #define GUEST_HANDLE(name)              __guest_handle_ ## name
66 #define GUEST_HANDLE_64(name)           GUEST_HANDLE(name)
67 #define set_xen_guest_handle(hnd, val)  do { (hnd).p = val; } while (0)
68
69 #ifndef __ASSEMBLY__
70 /* Explicitly size integers that represent pfns in the public interface
71  * with Xen so that we could have one ABI that works for 32 and 64 bit
72  * guests. */
73 typedef unsigned long xen_pfn_t;
74 typedef unsigned long xen_ulong_t;
75 /* Guest handles for primitive C types. */
76 __DEFINE_GUEST_HANDLE(uchar, unsigned char);
77 __DEFINE_GUEST_HANDLE(uint, unsigned int);
78 __DEFINE_GUEST_HANDLE(ulong, unsigned long);
79
80 DEFINE_GUEST_HANDLE(char);
81 DEFINE_GUEST_HANDLE(int);
82 DEFINE_GUEST_HANDLE(long);
83 DEFINE_GUEST_HANDLE(void);
84 DEFINE_GUEST_HANDLE(uint64_t);
85 DEFINE_GUEST_HANDLE(uint32_t);
86
87 DEFINE_GUEST_HANDLE(xen_pfn_t);
88 #define PRI_xen_pfn     "lx"
89 #endif
90
91 /* Arch specific VIRQs definition */
92 #define VIRQ_ITC        VIRQ_ARCH_0     /* V. Virtual itc timer */
93 #define VIRQ_MCA_CMC    VIRQ_ARCH_1     /* MCA cmc interrupt */
94 #define VIRQ_MCA_CPE    VIRQ_ARCH_2     /* MCA cpe interrupt */
95
96 /* Maximum number of virtual CPUs in multi-processor guests. */
97 /* keep sizeof(struct shared_page) <= PAGE_SIZE.
98  * this is checked in arch/ia64/xen/hypervisor.c. */
99 #define MAX_VIRT_CPUS   64
100
101 #ifndef __ASSEMBLY__
102
103 #define INVALID_MFN     (~0UL)
104
105 union vac {
106         unsigned long value;
107         struct {
108                 int a_int:1;
109                 int a_from_int_cr:1;
110                 int a_to_int_cr:1;
111                 int a_from_psr:1;
112                 int a_from_cpuid:1;
113                 int a_cover:1;
114                 int a_bsw:1;
115                 long reserved:57;
116         };
117 };
118
119 union vdc {
120         unsigned long value;
121         struct {
122                 int d_vmsw:1;
123                 int d_extint:1;
124                 int d_ibr_dbr:1;
125                 int d_pmc:1;
126                 int d_to_pmd:1;
127                 int d_itm:1;
128                 long reserved:58;
129         };
130 };
131
132 struct mapped_regs {
133         union vac vac;
134         union vdc vdc;
135         unsigned long virt_env_vaddr;
136         unsigned long reserved1[29];
137         unsigned long vhpi;
138         unsigned long reserved2[95];
139         union {
140                 unsigned long vgr[16];
141                 unsigned long bank1_regs[16];   /* bank1 regs (r16-r31)
142                                                    when bank0 active */
143         };
144         union {
145                 unsigned long vbgr[16];
146                 unsigned long bank0_regs[16];   /* bank0 regs (r16-r31)
147                                                    when bank1 active */
148         };
149         unsigned long vnat;
150         unsigned long vbnat;
151         unsigned long vcpuid[5];
152         unsigned long reserved3[11];
153         unsigned long vpsr;
154         unsigned long vpr;
155         unsigned long reserved4[76];
156         union {
157                 unsigned long vcr[128];
158                 struct {
159                         unsigned long dcr;      /* CR0 */
160                         unsigned long itm;
161                         unsigned long iva;
162                         unsigned long rsv1[5];
163                         unsigned long pta;      /* CR8 */
164                         unsigned long rsv2[7];
165                         unsigned long ipsr;     /* CR16 */
166                         unsigned long isr;
167                         unsigned long rsv3;
168                         unsigned long iip;
169                         unsigned long ifa;
170                         unsigned long itir;
171                         unsigned long iipa;
172                         unsigned long ifs;
173                         unsigned long iim;      /* CR24 */
174                         unsigned long iha;
175                         unsigned long rsv4[38];
176                         unsigned long lid;      /* CR64 */
177                         unsigned long ivr;
178                         unsigned long tpr;
179                         unsigned long eoi;
180                         unsigned long irr[4];
181                         unsigned long itv;      /* CR72 */
182                         unsigned long pmv;
183                         unsigned long cmcv;
184                         unsigned long rsv5[5];
185                         unsigned long lrr0;     /* CR80 */
186                         unsigned long lrr1;
187                         unsigned long rsv6[46];
188                 };
189         };
190         union {
191                 unsigned long reserved5[128];
192                 struct {
193                         unsigned long precover_ifs;
194                         unsigned long unat;     /* not sure if this is needed
195                                                    until NaT arch is done */
196                         int interrupt_collection_enabled; /* virtual psr.ic */
197
198                         /* virtual interrupt deliverable flag is
199                          * evtchn_upcall_mask in shared info area now.
200                          * interrupt_mask_addr is the address
201                          * of evtchn_upcall_mask for current vcpu
202                          */
203                         unsigned char *interrupt_mask_addr;
204                         int pending_interruption;
205                         unsigned char vpsr_pp;
206                         unsigned char vpsr_dfh;
207                         unsigned char hpsr_dfh;
208                         unsigned char hpsr_mfh;
209                         unsigned long reserved5_1[4];
210                         int metaphysical_mode;  /* 1 = use metaphys mapping
211                                                    0 = use virtual */
212                         int banknum;            /* 0 or 1, which virtual
213                                                    register bank is active */
214                         unsigned long rrs[8];   /* region registers */
215                         unsigned long krs[8];   /* kernel registers */
216                         unsigned long tmp[16];  /* temp registers
217                                                    (e.g. for hyperprivops) */
218
219                         /* itc paravirtualization
220                          * vAR.ITC = mAR.ITC + itc_offset
221                          * itc_last is one which was lastly passed to
222                          * the guest OS in order to prevent it from
223                          * going backwords.
224                          */
225                         unsigned long itc_offset;
226                         unsigned long itc_last;
227                 };
228         };
229 };
230
231 struct arch_vcpu_info {
232         /* nothing */
233 };
234
235 /*
236  * This structure is used for magic page in domain pseudo physical address
237  * space and the result of XENMEM_machine_memory_map.
238  * As the XENMEM_machine_memory_map result,
239  * xen_memory_map::nr_entries indicates the size in bytes
240  * including struct xen_ia64_memmap_info. Not the number of entries.
241  */
242 struct xen_ia64_memmap_info {
243         uint64_t efi_memmap_size;       /* size of EFI memory map */
244         uint64_t efi_memdesc_size;      /* size of an EFI memory map
245                                          * descriptor */
246         uint32_t efi_memdesc_version;   /* memory descriptor version */
247         void *memdesc[0];               /* array of efi_memory_desc_t */
248 };
249
250 struct arch_shared_info {
251         /* PFN of the start_info page.  */
252         unsigned long start_info_pfn;
253
254         /* Interrupt vector for event channel.  */
255         int evtchn_vector;
256
257         /* PFN of memmap_info page */
258         unsigned int memmap_info_num_pages;     /* currently only = 1 case is
259                                                    supported. */
260         unsigned long memmap_info_pfn;
261
262         uint64_t pad[31];
263 };
264
265 struct xen_callback {
266         unsigned long ip;
267 };
268 typedef struct xen_callback xen_callback_t;
269
270 #endif /* !__ASSEMBLY__ */
271
272 #include <asm/pvclock-abi.h>
273
274 /* Size of the shared_info area (this is not related to page size).  */
275 #define XSI_SHIFT                       14
276 #define XSI_SIZE                        (1 << XSI_SHIFT)
277 /* Log size of mapped_regs area (64 KB - only 4KB is used).  */
278 #define XMAPPEDREGS_SHIFT               12
279 #define XMAPPEDREGS_SIZE                (1 << XMAPPEDREGS_SHIFT)
280 /* Offset of XASI (Xen arch shared info) wrt XSI_BASE.  */
281 #define XMAPPEDREGS_OFS                 XSI_SIZE
282
283 /* Hyperprivops.  */
284 #define HYPERPRIVOP_START               0x1
285 #define HYPERPRIVOP_RFI                 (HYPERPRIVOP_START + 0x0)
286 #define HYPERPRIVOP_RSM_DT              (HYPERPRIVOP_START + 0x1)
287 #define HYPERPRIVOP_SSM_DT              (HYPERPRIVOP_START + 0x2)
288 #define HYPERPRIVOP_COVER               (HYPERPRIVOP_START + 0x3)
289 #define HYPERPRIVOP_ITC_D               (HYPERPRIVOP_START + 0x4)
290 #define HYPERPRIVOP_ITC_I               (HYPERPRIVOP_START + 0x5)
291 #define HYPERPRIVOP_SSM_I               (HYPERPRIVOP_START + 0x6)
292 #define HYPERPRIVOP_GET_IVR             (HYPERPRIVOP_START + 0x7)
293 #define HYPERPRIVOP_GET_TPR             (HYPERPRIVOP_START + 0x8)
294 #define HYPERPRIVOP_SET_TPR             (HYPERPRIVOP_START + 0x9)
295 #define HYPERPRIVOP_EOI                 (HYPERPRIVOP_START + 0xa)
296 #define HYPERPRIVOP_SET_ITM             (HYPERPRIVOP_START + 0xb)
297 #define HYPERPRIVOP_THASH               (HYPERPRIVOP_START + 0xc)
298 #define HYPERPRIVOP_PTC_GA              (HYPERPRIVOP_START + 0xd)
299 #define HYPERPRIVOP_ITR_D               (HYPERPRIVOP_START + 0xe)
300 #define HYPERPRIVOP_GET_RR              (HYPERPRIVOP_START + 0xf)
301 #define HYPERPRIVOP_SET_RR              (HYPERPRIVOP_START + 0x10)
302 #define HYPERPRIVOP_SET_KR              (HYPERPRIVOP_START + 0x11)
303 #define HYPERPRIVOP_FC                  (HYPERPRIVOP_START + 0x12)
304 #define HYPERPRIVOP_GET_CPUID           (HYPERPRIVOP_START + 0x13)
305 #define HYPERPRIVOP_GET_PMD             (HYPERPRIVOP_START + 0x14)
306 #define HYPERPRIVOP_GET_EFLAG           (HYPERPRIVOP_START + 0x15)
307 #define HYPERPRIVOP_SET_EFLAG           (HYPERPRIVOP_START + 0x16)
308 #define HYPERPRIVOP_RSM_BE              (HYPERPRIVOP_START + 0x17)
309 #define HYPERPRIVOP_GET_PSR             (HYPERPRIVOP_START + 0x18)
310 #define HYPERPRIVOP_SET_RR0_TO_RR4      (HYPERPRIVOP_START + 0x19)
311 #define HYPERPRIVOP_MAX                 (0x1a)
312
313 /* Fast and light hypercalls.  */
314 #define __HYPERVISOR_ia64_fast_eoi      __HYPERVISOR_arch_1
315
316 /* Xencomm macros.  */
317 #define XENCOMM_INLINE_MASK             0xf800000000000000UL
318 #define XENCOMM_INLINE_FLAG             0x8000000000000000UL
319
320 #ifndef __ASSEMBLY__
321
322 /*
323  * Optimization features.
324  * The hypervisor may do some special optimizations for guests. This hypercall
325  * can be used to switch on/of these special optimizations.
326  */
327 #define __HYPERVISOR_opt_feature        0x700UL
328
329 #define XEN_IA64_OPTF_OFF               0x0
330 #define XEN_IA64_OPTF_ON                0x1
331
332 /*
333  * If this feature is switched on, the hypervisor inserts the
334  * tlb entries without calling the guests traphandler.
335  * This is useful in guests using region 7 for identity mapping
336  * like the linux kernel does.
337  */
338 #define XEN_IA64_OPTF_IDENT_MAP_REG7    1
339
340 /* Identity mapping of region 4 addresses in HVM. */
341 #define XEN_IA64_OPTF_IDENT_MAP_REG4    2
342
343 /* Identity mapping of region 5 addresses in HVM. */
344 #define XEN_IA64_OPTF_IDENT_MAP_REG5    3
345
346 #define XEN_IA64_OPTF_IDENT_MAP_NOT_SET  (0)
347
348 struct xen_ia64_opt_feature {
349         unsigned long cmd;      /* Which feature */
350         unsigned char on;       /* Switch feature on/off */
351         union {
352                 struct {
353                         /* The page protection bit mask of the pte.
354                          * This will be or'ed with the pte. */
355                         unsigned long pgprot;
356                         unsigned long key;      /* A protection key for itir.*/
357                 };
358         };
359 };
360
361 #endif /* __ASSEMBLY__ */
362
363 #endif /* _ASM_IA64_XEN_INTERFACE_H */