Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input
[sfrench/cifs-2.6.git] / arch / ia64 / include / asm / native / inst.h
1 /******************************************************************************
2  * arch/ia64/include/asm/native/inst.h
3  *
4  * Copyright (c) 2008 Isaku Yamahata <yamahata at valinux co jp>
5  *                    VA Linux Systems Japan K.K.
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; either version 2 of the License, or
10  * (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
20  *
21  */
22
23 #define DO_SAVE_MIN             IA64_NATIVE_DO_SAVE_MIN
24
25 #define __paravirt_switch_to                    ia64_native_switch_to
26 #define __paravirt_leave_syscall                ia64_native_leave_syscall
27 #define __paravirt_work_processed_syscall       ia64_native_work_processed_syscall
28 #define __paravirt_leave_kernel                 ia64_native_leave_kernel
29 #define __paravirt_pending_syscall_end          ia64_work_pending_syscall_end
30 #define __paravirt_work_processed_syscall_target \
31                                                 ia64_work_processed_syscall
32
33 #ifdef CONFIG_PARAVIRT_GUEST_ASM_CLOBBER_CHECK
34 # define PARAVIRT_POISON        0xdeadbeefbaadf00d
35 # define CLOBBER(clob)                          \
36         ;;                                      \
37         movl clob = PARAVIRT_POISON;            \
38         ;;
39 # define CLOBBER_PRED(pred_clob)                \
40         ;;                                      \
41         cmp.eq pred_clob, p0 = r0, r0           \
42         ;;
43 #else
44 # define CLOBBER(clob)                  /* nothing */
45 # define CLOBBER_PRED(pred_clob)        /* nothing */
46 #endif
47
48 #define MOV_FROM_IFA(reg)       \
49         mov reg = cr.ifa
50
51 #define MOV_FROM_ITIR(reg)      \
52         mov reg = cr.itir
53
54 #define MOV_FROM_ISR(reg)       \
55         mov reg = cr.isr
56
57 #define MOV_FROM_IHA(reg)       \
58         mov reg = cr.iha
59
60 #define MOV_FROM_IPSR(pred, reg)        \
61 (pred)  mov reg = cr.ipsr
62
63 #define MOV_FROM_IIM(reg)       \
64         mov reg = cr.iim
65
66 #define MOV_FROM_IIP(reg)       \
67         mov reg = cr.iip
68
69 #define MOV_FROM_IVR(reg, clob) \
70         mov reg = cr.ivr        \
71         CLOBBER(clob)
72
73 #define MOV_FROM_PSR(pred, reg, clob)   \
74 (pred)  mov reg = psr                   \
75         CLOBBER(clob)
76
77 #define MOV_TO_IFA(reg, clob)   \
78         mov cr.ifa = reg        \
79         CLOBBER(clob)
80
81 #define MOV_TO_ITIR(pred, reg, clob)    \
82 (pred)  mov cr.itir = reg               \
83         CLOBBER(clob)
84
85 #define MOV_TO_IHA(pred, reg, clob)     \
86 (pred)  mov cr.iha = reg                \
87         CLOBBER(clob)
88
89 #define MOV_TO_IPSR(pred, reg, clob)            \
90 (pred)  mov cr.ipsr = reg                       \
91         CLOBBER(clob)
92
93 #define MOV_TO_IFS(pred, reg, clob)     \
94 (pred)  mov cr.ifs = reg                \
95         CLOBBER(clob)
96
97 #define MOV_TO_IIP(reg, clob)   \
98         mov cr.iip = reg        \
99         CLOBBER(clob)
100
101 #define MOV_TO_KR(kr, reg, clob0, clob1)        \
102         mov IA64_KR(kr) = reg                   \
103         CLOBBER(clob0)                          \
104         CLOBBER(clob1)
105
106 #define ITC_I(pred, reg, clob)  \
107 (pred)  itc.i reg               \
108         CLOBBER(clob)
109
110 #define ITC_D(pred, reg, clob)  \
111 (pred)  itc.d reg               \
112         CLOBBER(clob)
113
114 #define ITC_I_AND_D(pred_i, pred_d, reg, clob)  \
115 (pred_i) itc.i reg;                             \
116 (pred_d) itc.d reg                              \
117         CLOBBER(clob)
118
119 #define THASH(pred, reg0, reg1, clob)           \
120 (pred)  thash reg0 = reg1                       \
121         CLOBBER(clob)
122
123 #define SSM_PSR_IC_AND_DEFAULT_BITS_AND_SRLZ_I(clob0, clob1)            \
124         ssm psr.ic | PSR_DEFAULT_BITS                                   \
125         CLOBBER(clob0)                                                  \
126         CLOBBER(clob1)                                                  \
127         ;;                                                              \
128         srlz.i /* guarantee that interruption collectin is on */        \
129         ;;
130
131 #define SSM_PSR_IC_AND_SRLZ_D(clob0, clob1)     \
132         ssm psr.ic                              \
133         CLOBBER(clob0)                          \
134         CLOBBER(clob1)                          \
135         ;;                                      \
136         srlz.d
137
138 #define RSM_PSR_IC(clob)        \
139         rsm psr.ic              \
140         CLOBBER(clob)
141
142 #define SSM_PSR_I(pred, pred_clob, clob)        \
143 (pred)  ssm psr.i                               \
144         CLOBBER(clob)                           \
145         CLOBBER_PRED(pred_clob)
146
147 #define RSM_PSR_I(pred, clob0, clob1)   \
148 (pred)  rsm psr.i                       \
149         CLOBBER(clob0)                  \
150         CLOBBER(clob1)
151
152 #define RSM_PSR_I_IC(clob0, clob1, clob2)       \
153         rsm psr.i | psr.ic                      \
154         CLOBBER(clob0)                          \
155         CLOBBER(clob1)                          \
156         CLOBBER(clob2)
157
158 #define RSM_PSR_DT              \
159         rsm psr.dt
160
161 #define SSM_PSR_DT_AND_SRLZ_I   \
162         ssm psr.dt              \
163         ;;                      \
164         srlz.i
165
166 #define BSW_0(clob0, clob1, clob2)      \
167         bsw.0                           \
168         CLOBBER(clob0)                  \
169         CLOBBER(clob1)                  \
170         CLOBBER(clob2)
171
172 #define BSW_1(clob0, clob1)     \
173         bsw.1                   \
174         CLOBBER(clob0)          \
175         CLOBBER(clob1)
176
177 #define COVER   \
178         cover
179
180 #define RFI     \
181         rfi