1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_CRIS_ARCH_UNISTD_H_
3 #define _ASM_CRIS_ARCH_UNISTD_H_
5 /* XXX - _foo needs to be __foo, while __NR_bar could be _NR_bar. */
7 * Don't remove the .ifnc tests; they are an insurance against
8 * any hard-to-spot gcc register allocation bugs.
10 #define _syscall0(type,name) \
13 register long __a __asm__ ("r10"); \
14 register long __n_ __asm__ ("r9") = (__NR_##name); \
15 __asm__ __volatile__ (".ifnc %0%1,$r10$r9\n\t" \
27 #define _syscall1(type,name,type1,arg1) \
28 type name(type1 arg1) \
30 register long __a __asm__ ("r10") = (long) arg1; \
31 register long __n_ __asm__ ("r9") = (__NR_##name); \
32 __asm__ __volatile__ (".ifnc %0%1,$r10$r9\n\t" \
37 : "r" (__n_), "0" (__a)); \
44 #define _syscall2(type,name,type1,arg1,type2,arg2) \
45 type name(type1 arg1,type2 arg2) \
47 register long __a __asm__ ("r10") = (long) arg1; \
48 register long __b __asm__ ("r11") = (long) arg2; \
49 register long __n_ __asm__ ("r9") = (__NR_##name); \
50 __asm__ __volatile__ (".ifnc %0%1%3,$r10$r9$r11\n\t" \
55 : "r" (__n_), "0" (__a), "r" (__b)); \
62 #define _syscall3(type,name,type1,arg1,type2,arg2,type3,arg3) \
63 type name(type1 arg1,type2 arg2,type3 arg3) \
65 register long __a __asm__ ("r10") = (long) arg1; \
66 register long __b __asm__ ("r11") = (long) arg2; \
67 register long __c __asm__ ("r12") = (long) arg3; \
68 register long __n_ __asm__ ("r9") = (__NR_##name); \
69 __asm__ __volatile__ (".ifnc %0%1%3%4,$r10$r9$r11$r12\n\t" \
74 : "r" (__n_), "0" (__a), "r" (__b), "r" (__c)); \
81 #define _syscall4(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \
82 type name (type1 arg1, type2 arg2, type3 arg3, type4 arg4) \
84 register long __a __asm__ ("r10") = (long) arg1; \
85 register long __b __asm__ ("r11") = (long) arg2; \
86 register long __c __asm__ ("r12") = (long) arg3; \
87 register long __d __asm__ ("r13") = (long) arg4; \
88 register long __n_ __asm__ ("r9") = (__NR_##name); \
89 __asm__ __volatile__ (".ifnc %0%1%3%4%5,$r10$r9$r11$r12$r13\n\t" \
94 : "r" (__n_), "0" (__a), "r" (__b), \
95 "r" (__c), "r" (__d)); \
102 #define _syscall5(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4, \
104 type name (type1 arg1,type2 arg2,type3 arg3,type4 arg4,type5 arg5) \
106 register long __a __asm__ ("r10") = (long) arg1; \
107 register long __b __asm__ ("r11") = (long) arg2; \
108 register long __c __asm__ ("r12") = (long) arg3; \
109 register long __d __asm__ ("r13") = (long) arg4; \
110 register long __n_ __asm__ ("r9") = (__NR_##name); \
111 __asm__ __volatile__ (".ifnc %0%1%3%4%5,$r10$r9$r11$r12$r13\n\t" \
117 : "r" (__n_), "0" (__a), "r" (__b), \
118 "r" (__c), "r" (__d), "g" (arg5)); \
125 #define _syscall6(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4, \
126 type5,arg5,type6,arg6) \
127 type name (type1 arg1,type2 arg2,type3 arg3,type4 arg4,type5 arg5,type6 arg6) \
129 register long __a __asm__ ("r10") = (long) arg1; \
130 register long __b __asm__ ("r11") = (long) arg2; \
131 register long __c __asm__ ("r12") = (long) arg3; \
132 register long __d __asm__ ("r13") = (long) arg4; \
133 register long __n_ __asm__ ("r9") = (__NR_##name); \
134 __asm__ __volatile__ (".ifnc %0%1%3%4%5,$r10$r9$r11$r12$r13\n\t" \
137 "move %6,$mof\n\tmove %7,$srp\n\t" \
140 : "r" (__n_), "0" (__a), "r" (__b), \
141 "r" (__c), "r" (__d), "g" (arg5), "g" (arg6)\