1 // SPDX-License-Identifier: GPL-2.0
3 * Allocator for I/O pins. All pins are allocated to GPIO at bootup.
4 * Unassigned pins and GPIO pins can be allocated to a fixed interface
5 * or the I/O processor instead.
7 * Copyright (c) 2005-2007 Axis Communications AB.
10 #include <linux/init.h>
11 #include <linux/errno.h>
12 #include <linux/kernel.h>
13 #include <linux/string.h>
14 #include <linux/spinlock.h>
15 #include <hwregs/reg_map.h>
16 #include <hwregs/reg_rdwr.h>
18 #include <hwregs/pinmux_defs.h>
19 #include <hwregs/clkgen_defs.h>
27 static char pins[PINS];
28 static DEFINE_SPINLOCK(pinmux_lock);
30 static void crisv32_pinmux_set(int port);
33 crisv32_pinmux_init(void)
35 static int initialized;
39 REG_WR_INT(pinmux, regi_pinmux, rw_hwprot, 0);
40 crisv32_pinmux_alloc(PORT_A, 0, 31, pinmux_gpio);
41 crisv32_pinmux_alloc(PORT_B, 0, 31, pinmux_gpio);
42 crisv32_pinmux_alloc(PORT_C, 0, 15, pinmux_gpio);
49 crisv32_pinmux_alloc(int port, int first_pin, int last_pin, enum pin_mode mode)
54 crisv32_pinmux_init();
59 spin_lock_irqsave(&pinmux_lock, flags);
61 for (i = first_pin; i <= last_pin; i++) {
62 if ((pins[port * PORT_PINS + i] != pinmux_none) &&
63 (pins[port * PORT_PINS + i] != pinmux_gpio) &&
64 (pins[port * PORT_PINS + i] != mode)) {
65 spin_unlock_irqrestore(&pinmux_lock, flags);
67 panic("Pinmux alloc failed!\n");
73 for (i = first_pin; i <= last_pin; i++)
74 pins[port * PORT_PINS + i] = mode;
76 crisv32_pinmux_set(port);
78 spin_unlock_irqrestore(&pinmux_lock, flags);
84 crisv32_pinmux_alloc_fixed(enum fixed_function function)
87 char saved[sizeof pins];
89 reg_pinmux_rw_hwprot hwprot;
90 reg_clkgen_rw_clk_ctrl clk_ctrl;
92 spin_lock_irqsave(&pinmux_lock, flags);
94 /* Save internal data for recovery */
95 memcpy(saved, pins, sizeof pins);
97 crisv32_pinmux_init(); /* must be done before we read rw_hwprot */
99 hwprot = REG_RD(pinmux, regi_pinmux, rw_hwprot);
100 clk_ctrl = REG_RD(clkgen, regi_clkgen, rw_clk_ctrl);
104 clk_ctrl.eth = regk_clkgen_yes;
105 clk_ctrl.dma0_1_eth = regk_clkgen_yes;
106 ret = crisv32_pinmux_alloc(PORT_B, 8, 23, pinmux_fixed);
107 ret |= crisv32_pinmux_alloc(PORT_B, 24, 25, pinmux_fixed);
108 hwprot.eth = hwprot.eth_mdio = regk_pinmux_yes;
111 ret = crisv32_pinmux_alloc(PORT_B, 0, 7, pinmux_fixed);
112 hwprot.geth = regk_pinmux_yes;
115 clk_ctrl.ccd_tg_100 = clk_ctrl.ccd_tg_200 = regk_clkgen_yes;
116 ret = crisv32_pinmux_alloc(PORT_B, 27, 29, pinmux_fixed);
117 hwprot.tg_clk = regk_pinmux_yes;
120 clk_ctrl.ccd_tg_100 = clk_ctrl.ccd_tg_200 = regk_clkgen_yes;
121 ret = crisv32_pinmux_alloc(PORT_B, 27, 31, pinmux_fixed);
122 ret |= crisv32_pinmux_alloc(PORT_C, 0, 15, pinmux_fixed);
123 hwprot.tg = hwprot.tg_clk = regk_pinmux_yes;
126 clk_ctrl.strdma0_2_video = regk_clkgen_yes;
127 ret = crisv32_pinmux_alloc(PORT_A, 8, 18, pinmux_fixed);
128 hwprot.vout = hwprot.vout_sync = regk_pinmux_yes;
131 clk_ctrl.sser_ser_dma6_7 = regk_clkgen_yes;
132 ret = crisv32_pinmux_alloc(PORT_A, 24, 25, pinmux_fixed);
133 hwprot.ser1 = regk_pinmux_yes;
136 clk_ctrl.sser_ser_dma6_7 = regk_clkgen_yes;
137 ret = crisv32_pinmux_alloc(PORT_A, 26, 27, pinmux_fixed);
138 hwprot.ser2 = regk_pinmux_yes;
141 clk_ctrl.sser_ser_dma6_7 = regk_clkgen_yes;
142 ret = crisv32_pinmux_alloc(PORT_A, 28, 29, pinmux_fixed);
143 hwprot.ser3 = regk_pinmux_yes;
146 clk_ctrl.sser_ser_dma6_7 = regk_clkgen_yes;
147 ret = crisv32_pinmux_alloc(PORT_A, 30, 31, pinmux_fixed);
148 hwprot.ser4 = regk_pinmux_yes;
151 clk_ctrl.sser_ser_dma6_7 = regk_clkgen_yes;
152 ret = crisv32_pinmux_alloc(PORT_A, 19, 23, pinmux_fixed);
153 hwprot.sser = regk_pinmux_yes;
156 hwprot.pio = regk_pinmux_yes;
160 ret = crisv32_pinmux_alloc(PORT_A, 30, 30, pinmux_fixed);
161 hwprot.pwm0 = regk_pinmux_yes;
164 ret = crisv32_pinmux_alloc(PORT_A, 31, 31, pinmux_fixed);
165 hwprot.pwm1 = regk_pinmux_yes;
168 ret = crisv32_pinmux_alloc(PORT_B, 26, 26, pinmux_fixed);
169 hwprot.pwm2 = regk_pinmux_yes;
172 ret = crisv32_pinmux_alloc(PORT_A, 0, 1, pinmux_fixed);
173 hwprot.i2c0 = regk_pinmux_yes;
176 ret = crisv32_pinmux_alloc(PORT_A, 2, 3, pinmux_fixed);
177 hwprot.i2c1 = regk_pinmux_yes;
179 case pinmux_i2c1_3wire:
180 ret = crisv32_pinmux_alloc(PORT_A, 2, 3, pinmux_fixed);
181 ret |= crisv32_pinmux_alloc(PORT_A, 7, 7, pinmux_fixed);
182 hwprot.i2c1 = hwprot.i2c1_sen = regk_pinmux_yes;
184 case pinmux_i2c1_sda1:
185 ret = crisv32_pinmux_alloc(PORT_A, 2, 4, pinmux_fixed);
186 hwprot.i2c1 = hwprot.i2c1_sda1 = regk_pinmux_yes;
188 case pinmux_i2c1_sda2:
189 ret = crisv32_pinmux_alloc(PORT_A, 2, 3, pinmux_fixed);
190 ret |= crisv32_pinmux_alloc(PORT_A, 5, 5, pinmux_fixed);
191 hwprot.i2c1 = hwprot.i2c1_sda2 = regk_pinmux_yes;
193 case pinmux_i2c1_sda3:
194 ret = crisv32_pinmux_alloc(PORT_A, 2, 3, pinmux_fixed);
195 ret |= crisv32_pinmux_alloc(PORT_A, 6, 6, pinmux_fixed);
196 hwprot.i2c1 = hwprot.i2c1_sda3 = regk_pinmux_yes;
204 REG_WR(pinmux, regi_pinmux, rw_hwprot, hwprot);
205 REG_WR(clkgen, regi_clkgen, rw_clk_ctrl, clk_ctrl);
207 memcpy(pins, saved, sizeof pins);
209 spin_unlock_irqrestore(&pinmux_lock, flags);
215 crisv32_pinmux_set(int port)
220 int pin = port * PORT_PINS;
222 for (i = 0; (i < PORT_PINS) && (pin < PINS); i++, pin++) {
223 if (pins[pin] == pinmux_gpio)
224 gpio_val |= (1 << i);
225 else if (pins[pin] == pinmux_iop)
229 REG_WRITE(int, regi_pinmux + REG_RD_ADDR_pinmux_rw_gio_pa + 4 * port,
231 REG_WRITE(int, regi_pinmux + REG_RD_ADDR_pinmux_rw_iop_pa + 4 * port,
235 crisv32_pinmux_dump();
240 crisv32_pinmux_dealloc(int port, int first_pin, int last_pin)
245 crisv32_pinmux_init();
247 if (port > PORTS || port < 0)
250 spin_lock_irqsave(&pinmux_lock, flags);
252 for (i = first_pin; i <= last_pin; i++)
253 pins[port * PORT_PINS + i] = pinmux_none;
255 crisv32_pinmux_set(port);
256 spin_unlock_irqrestore(&pinmux_lock, flags);
262 crisv32_pinmux_dealloc_fixed(enum fixed_function function)
265 char saved[sizeof pins];
267 reg_pinmux_rw_hwprot hwprot;
269 spin_lock_irqsave(&pinmux_lock, flags);
271 /* Save internal data for recovery */
272 memcpy(saved, pins, sizeof pins);
274 crisv32_pinmux_init(); /* must be done before we read rw_hwprot */
276 hwprot = REG_RD(pinmux, regi_pinmux, rw_hwprot);
280 ret = crisv32_pinmux_dealloc(PORT_B, 8, 23);
281 ret |= crisv32_pinmux_dealloc(PORT_B, 24, 25);
282 ret |= crisv32_pinmux_dealloc(PORT_B, 0, 7);
283 hwprot.eth = hwprot.eth_mdio = hwprot.geth = regk_pinmux_no;
286 ret = crisv32_pinmux_dealloc(PORT_B, 27, 29);
287 hwprot.tg_clk = regk_pinmux_no;
290 ret = crisv32_pinmux_dealloc(PORT_B, 27, 31);
291 ret |= crisv32_pinmux_dealloc(PORT_C, 0, 15);
292 hwprot.tg = hwprot.tg_clk = regk_pinmux_no;
295 ret = crisv32_pinmux_dealloc(PORT_A, 8, 18);
296 hwprot.vout = hwprot.vout_sync = regk_pinmux_no;
299 ret = crisv32_pinmux_dealloc(PORT_A, 24, 25);
300 hwprot.ser1 = regk_pinmux_no;
303 ret = crisv32_pinmux_dealloc(PORT_A, 26, 27);
304 hwprot.ser2 = regk_pinmux_no;
307 ret = crisv32_pinmux_dealloc(PORT_A, 28, 29);
308 hwprot.ser3 = regk_pinmux_no;
311 ret = crisv32_pinmux_dealloc(PORT_A, 30, 31);
312 hwprot.ser4 = regk_pinmux_no;
315 ret = crisv32_pinmux_dealloc(PORT_A, 19, 23);
316 hwprot.sser = regk_pinmux_no;
319 ret = crisv32_pinmux_dealloc(PORT_A, 30, 30);
320 hwprot.pwm0 = regk_pinmux_no;
323 ret = crisv32_pinmux_dealloc(PORT_A, 31, 31);
324 hwprot.pwm1 = regk_pinmux_no;
327 ret = crisv32_pinmux_dealloc(PORT_B, 26, 26);
328 hwprot.pwm2 = regk_pinmux_no;
331 ret = crisv32_pinmux_dealloc(PORT_A, 0, 1);
332 hwprot.i2c0 = regk_pinmux_no;
335 ret = crisv32_pinmux_dealloc(PORT_A, 2, 3);
336 hwprot.i2c1 = regk_pinmux_no;
338 case pinmux_i2c1_3wire:
339 ret = crisv32_pinmux_dealloc(PORT_A, 2, 3);
340 ret |= crisv32_pinmux_dealloc(PORT_A, 7, 7);
341 hwprot.i2c1 = hwprot.i2c1_sen = regk_pinmux_no;
343 case pinmux_i2c1_sda1:
344 ret = crisv32_pinmux_dealloc(PORT_A, 2, 4);
345 hwprot.i2c1_sda1 = regk_pinmux_no;
347 case pinmux_i2c1_sda2:
348 ret = crisv32_pinmux_dealloc(PORT_A, 2, 3);
349 ret |= crisv32_pinmux_dealloc(PORT_A, 5, 5);
350 hwprot.i2c1_sda2 = regk_pinmux_no;
352 case pinmux_i2c1_sda3:
353 ret = crisv32_pinmux_dealloc(PORT_A, 2, 3);
354 ret |= crisv32_pinmux_dealloc(PORT_A, 6, 6);
355 hwprot.i2c1_sda3 = regk_pinmux_no;
363 REG_WR(pinmux, regi_pinmux, rw_hwprot, hwprot);
365 memcpy(pins, saved, sizeof pins);
367 spin_unlock_irqrestore(&pinmux_lock, flags);
373 crisv32_pinmux_dump(void)
378 crisv32_pinmux_init();
380 for (i = 0; i < PORTS; i++) {
382 printk(KERN_DEBUG "Port %c\n", 'A'+i);
383 for (j = 0; (j < PORT_PINS) && (pin < PINS); j++, pin++)
385 " Pin %d = %d\n", j, pins[i * PORT_PINS + j]);
389 __initcall(crisv32_pinmux_init);