arch/arm64/boot/dts/ti/k3-am65.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for AM6 SoC Family
   4  *
   5  * Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/
   6  */
   7
   8 #include <dt-bindings/gpio/gpio.h>
   9 #include <dt-bindings/interrupt-controller/irq.h>
  10 #include <dt-bindings/interrupt-controller/arm-gic.h>
  11
  12 / {
  13         model = "Texas Instruments K3 AM654 SoC";
  14         compatible = "ti,am654";
  15         interrupt-parent = <&gic500>;
  16         #address-cells = <2>;
  17         #size-cells = <2>;
  18
  19         chosen { };
  20
  21         firmware {
  22                 optee {
  23                         compatible = "linaro,optee-tz";
  24                         method = "smc";
  25                 };
  26
  27                 psci: psci {
  28                         compatible = "arm,psci-1.0";
  29                         method = "smc";
  30                 };
  31         };
  32
  33         a53_timer0: timer-cl0-cpu0 {
  34                 compatible = "arm,armv8-timer";
  35                 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, /* cntpsirq */
  36                              <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, /* cntpnsirq */
  37                              <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, /* cntvirq */
  38                              <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; /* cnthpirq */
  39         };
  40
  41         pmu: pmu {
  42                 compatible = "arm,armv8-pmuv3";
  43                 /* Recommendation from GIC500 TRM Table A.3 */
  44                 interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
  45         };
  46
  47         cbass_main: interconnect@100000 {
  48                 compatible = "simple-bus";
  49                 #address-cells = <1>;
  50                 #size-cells = <1>;
  51                 ranges = <0x00100000 0x00 0x00100000 0x00020000>, /* ctrl mmr */
  52                          <0x00600000 0x00 0x00600000 0x00001100>, /* GPIO */
  53                          <0x00900000 0x00 0x00900000 0x00012000>, /* serdes */
  54                          <0x01000000 0x00 0x01000000 0x0af02400>, /* Most peripherals */
  55                          <0x30800000 0x00 0x30800000 0x0bc00000>, /* MAIN NAVSS */
  56                          /* MCUSS Range */
  57                          <0x28380000 0x00 0x28380000 0x03880000>,
  58                          <0x40200000 0x00 0x40200000 0x00900100>,
  59                          <0x42040000 0x00 0x42040000 0x03ac2400>,
  60                          <0x45100000 0x00 0x45100000 0x00c24000>,
  61                          <0x46000000 0x00 0x46000000 0x00200000>,
  62                          <0x47000000 0x00 0x47000000 0x00068400>;
  63
  64                 cbass_mcu: interconnect@28380000 {
  65                         compatible = "simple-bus";
  66                         #address-cells = <1>;
  67                         #size-cells = <1>;
  68                         ranges = <0x28380000 0x28380000 0x03880000>, /* MCU NAVSS*/
  69                                  <0x40200000 0x40200000 0x00900100>, /* First peripheral window */
  70                                  <0x42040000 0x42040000 0x03ac2400>, /* WKUP */
  71                                  <0x45100000 0x45100000 0x00c24000>, /* MMRs, remaining NAVSS */
  72                                  <0x46000000 0x46000000 0x00200000>, /* CPSW */
  73                                  <0x47000000 0x47000000 0x00068400>; /* OSPI space 1 */
  74
  75                         cbass_wakeup: interconnect@42040000 {
  76                                 compatible = "simple-bus";
  77                                 #address-cells = <1>;
  78                                 #size-cells = <1>;
  79                                 /* WKUP  Basic peripherals */
  80                                 ranges = <0x42040000 0x42040000 0x03ac2400>;
  81                         };
  82                 };
  83         };
  84 };
  85
  86 /* Now include the peripherals for each bus segments */
  87 #include "k3-am65-main.dtsi"