arch/arm64/boot/dts/renesas/ulcb-kf.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the Kingfisher (ULCB extension) board
   4  *
   5  * Copyright (C) 2017 Renesas Electronics Corp.
   6  * Copyright (C) 2017 Cogent Embedded, Inc.
   7  */
   8
   9 / {
  10         aliases {
  11                 serial1 = &hscif0;
  12                 serial2 = &scif1;
  13         };
  14 };
  15
  16 &can0 {
  17         pinctrl-0 = <&can0_pins>;
  18         pinctrl-names = "default";
  19         status = "okay";
  20 };
  21
  22 &can1 {
  23         pinctrl-0 = <&can1_pins>;
  24         pinctrl-names = "default";
  25         status = "okay";
  26 };
  27
  28 &ehci0 {
  29         dr_mode = "otg";
  30         status = "okay";
  31 };
  32
  33 &hscif0 {
  34         pinctrl-0 = <&hscif0_pins>;
  35         pinctrl-names = "default";
  36         uart-has-rtscts;
  37
  38         status = "okay";
  39 };
  40
  41 &hsusb {
  42         dr_mode = "otg";
  43         status = "okay";
  44 };
  45
  46 &i2c2 {
  47         gpio_exp_74: gpio@74 {
  48                 compatible = "ti,tca9539";
  49                 reg = <0x74>;
  50                 gpio-controller;
  51                 #gpio-cells = <2>;
  52                 interrupt-controller;
  53                 interrupt-parent = <&gpio6>;
  54                 interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
  55
  56                 hub_pwen {
  57                         gpio-hog;
  58                         gpios = <6 GPIO_ACTIVE_HIGH>;
  59                         output-high;
  60                         line-name = "HUB pwen";
  61                 };
  62
  63                 hub_rst {
  64                         gpio-hog;
  65                         gpios = <7 GPIO_ACTIVE_HIGH>;
  66                         output-high;
  67                         line-name = "HUB rst";
  68                 };
  69
  70                 otg_offvbusn {
  71                         gpio-hog;
  72                         gpios = <8 GPIO_ACTIVE_HIGH>;
  73                         output-low;
  74                         line-name = "OTG OFFVBUSn";
  75                 };
  76
  77                 otg_extlpn {
  78                         gpio-hog;
  79                         gpios = <9 GPIO_ACTIVE_HIGH>;
  80                         output-high;
  81                         line-name = "OTG EXTLPn";
  82                 };
  83         };
  84
  85         gpio_exp_75: gpio@75 {
  86                 compatible = "ti,tca9539";
  87                 reg = <0x75>;
  88                 gpio-controller;
  89                 #gpio-cells = <2>;
  90                 interrupt-controller;
  91                 interrupt-parent = <&gpio6>;
  92                 interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
  93         };
  94
  95         i2cswitch2: i2c-switch@71 {
  96                 compatible = "nxp,pca9548";
  97                 #address-cells = <1>;
  98                 #size-cells = <0>;
  99                 reg = <0x71>;
 100                 reset-gpios = <&gpio5 3 GPIO_ACTIVE_LOW>;
 101         };
 102 };
 103
 104 &i2c4 {
 105         gpio_exp_76: gpio@76 {
 106                 compatible = "ti,tca9539";
 107                 reg = <0x76>;
 108                 gpio-controller;
 109                 #gpio-cells = <2>;
 110                 interrupt-controller;
 111                 interrupt-parent = <&gpio7>;
 112                 interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
 113         };
 114
 115         gpio_exp_77: gpio@77 {
 116                 compatible = "ti,tca9539";
 117                 reg = <0x77>;
 118                 gpio-controller;
 119                 #gpio-cells = <2>;
 120                 interrupt-controller;
 121                 interrupt-parent = <&gpio5>;
 122                 interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
 123         };
 124
 125         i2cswitch4: i2c-switch@71 {
 126                 compatible = "nxp,pca9548";
 127                 #address-cells = <1>;
 128                 #size-cells = <0>;
 129                 reg = <0x71>;
 130                 reset-gpios = <&gpio3 15 GPIO_ACTIVE_LOW>;
 131         };
 132 };
 133
 134 &ohci0 {
 135         dr_mode = "otg";
 136         status = "okay";
 137 };
 138
 139 &pcie_bus_clk {
 140         clock-frequency = <100000000>;
 141 };
 142
 143 &pciec0 {
 144         status = "okay";
 145 };
 146
 147 &pciec1 {
 148         status = "okay";
 149 };
 150
 151 &pfc {
 152         can0_pins: can0 {
 153                 groups = "can0_data_a";
 154                 function = "can0";
 155         };
 156
 157         can1_pins: can1 {
 158                 groups = "can1_data";
 159                 function = "can1";
 160         };
 161
 162         hscif0_pins: hscif0 {
 163                 groups = "hscif0_data", "hscif0_ctrl";
 164                 function = "hscif0";
 165         };
 166
 167         scif1_pins: scif1 {
 168                 groups = "scif1_data_b", "scif1_ctrl";
 169                 function = "scif1";
 170         };
 171
 172         usb0_pins: usb0 {
 173                 groups = "usb0";
 174                 function = "usb0";
 175         };
 176 };
 177
 178 &scif1 {
 179         pinctrl-0 = <&scif1_pins>;
 180         pinctrl-names = "default";
 181         uart-has-rtscts;
 182
 183         status = "okay";
 184 };
 185
 186 &usb2_phy0 {
 187         pinctrl-0 = <&usb0_pins>;
 188         pinctrl-names = "default";
 189
 190         status = "okay";
 191 };
 192
 193 &xhci0 {
 194         status = "okay";
 195 };