1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the Condor board
5 * Copyright (C) 2018 Renesas Electronics Corp.
6 * Copyright (C) 2018 Cogent Embedded, Inc.
10 #include "r8a77980.dtsi"
13 model = "Renesas Condor board based on r8a77980";
14 compatible = "renesas,condor", "renesas,r8a77980";
22 stdout-path = "serial0:115200n8";
26 device_type = "memory";
27 /* first 128MB is reserved for secure area. */
28 reg = <0 0x48000000 0 0x78000000>;
32 compatible = "regulator-fixed";
33 regulator-name = "D3.3V";
34 regulator-min-microvolt = <3300000>;
35 regulator-max-microvolt = <3300000>;
40 vddq_vin01: regulator-1 {
41 compatible = "regulator-fixed";
42 regulator-name = "VDDQ_VIN01";
43 regulator-min-microvolt = <1800000>;
44 regulator-max-microvolt = <1800000>;
51 pinctrl-0 = <&avb_pins>;
52 pinctrl-names = "default";
54 phy-mode = "rgmii-id";
56 renesas,no-ether-link;
59 phy0: ethernet-phy@0 {
62 interrupt-parent = <&gpio1>;
63 interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
68 pinctrl-0 = <&canfd0_pins>;
69 pinctrl-names = "default";
78 clock-frequency = <16666666>;
82 clock-frequency = <32768>;
86 pinctrl-0 = <&i2c0_pins>;
87 pinctrl-names = "default";
90 clock-frequency = <400000>;
92 io_expander0: gpio@20 {
93 compatible = "onnn,pca9654";
99 io_expander1: gpio@21 {
100 compatible = "onnn,pca9654";
108 pinctrl-0 = <&mmc_pins>;
109 pinctrl-1 = <&mmc_pins_uhs>;
110 pinctrl-names = "default", "state_uhs";
112 vmmc-supply = <&d3_3v>;
113 vqmmc-supply = <&vddq_vin01>;
122 groups = "avb_mdio", "avb_rgmii";
126 canfd0_pins: canfd0 {
127 groups = "canfd0_data_a";
137 groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
139 power-source = <3300>;
142 mmc_pins_uhs: mmc_uhs {
143 groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
145 power-source = <1800>;
149 groups = "scif0_data";
153 scif_clk_pins: scif_clk {
154 groups = "scif_clk_b";
155 function = "scif_clk";
160 pinctrl-0 = <&scif0_pins>, <&scif_clk_pins>;
161 pinctrl-names = "default";
167 clock-frequency = <14745600>;