arch/arm64/boot/dts/renesas/r8a7796.dtsi

   1 /*
   2  * Device Tree Source for the r8a7796 SoC
   3  *
   4  * Copyright (C) 2016 Renesas Electronics Corp.
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 #include <dt-bindings/clock/r8a7796-cpg-mssr.h>
  12 #include <dt-bindings/interrupt-controller/arm-gic.h>
  13 #include <dt-bindings/power/r8a7796-sysc.h>
  14
  15 #define CPG_AUDIO_CLK_I         R8A7796_CLK_S0D4
  16
  17 / {
  18         compatible = "renesas,r8a7796";
  19         #address-cells = <2>;
  20         #size-cells = <2>;
  21
  22         aliases {
  23                 i2c0 = &i2c0;
  24                 i2c1 = &i2c1;
  25                 i2c2 = &i2c2;
  26                 i2c3 = &i2c3;
  27                 i2c4 = &i2c4;
  28                 i2c5 = &i2c5;
  29                 i2c6 = &i2c6;
  30                 i2c7 = &i2c_dvfs;
  31         };
  32
  33         /*
  34          * The external audio clocks are configured as 0 Hz fixed frequency
  35          * clocks by default.
  36          * Boards that provide audio clocks should override them.
  37          */
  38         audio_clk_a: audio_clk_a {
  39                 compatible = "fixed-clock";
  40                 #clock-cells = <0>;
  41                 clock-frequency = <0>;
  42         };
  43
  44         audio_clk_b: audio_clk_b {
  45                 compatible = "fixed-clock";
  46                 #clock-cells = <0>;
  47                 clock-frequency = <0>;
  48         };
  49
  50         audio_clk_c: audio_clk_c {
  51                 compatible = "fixed-clock";
  52                 #clock-cells = <0>;
  53                 clock-frequency = <0>;
  54         };
  55
  56         /* External CAN clock - to be overridden by boards that provide it */
  57         can_clk: can {
  58                 compatible = "fixed-clock";
  59                 #clock-cells = <0>;
  60                 clock-frequency = <0>;
  61         };
  62
  63         cpus {
  64                 #address-cells = <1>;
  65                 #size-cells = <0>;
  66
  67                 a57_0: cpu@0 {
  68                         compatible = "arm,cortex-a57", "arm,armv8";
  69                         reg = <0x0>;
  70                         device_type = "cpu";
  71                         power-domains = <&sysc R8A7796_PD_CA57_CPU0>;
  72                         next-level-cache = <&L2_CA57>;
  73                         enable-method = "psci";
  74                         clocks =<&cpg CPG_CORE R8A7796_CLK_Z>;
  75                         operating-points-v2 = <&cluster0_opp>;
  76                         #cooling-cells = <2>;
  77                 };
  78
  79                 a57_1: cpu@1 {
  80                         compatible = "arm,cortex-a57","arm,armv8";
  81                         reg = <0x1>;
  82                         device_type = "cpu";
  83                         power-domains = <&sysc R8A7796_PD_CA57_CPU1>;
  84                         next-level-cache = <&L2_CA57>;
  85                         enable-method = "psci";
  86                         clocks =<&cpg CPG_CORE R8A7796_CLK_Z>;
  87                         operating-points-v2 = <&cluster0_opp>;
  88                         #cooling-cells = <2>;
  89                 };
  90
  91                 a53_0: cpu@100 {
  92                         compatible = "arm,cortex-a53", "arm,armv8";
  93                         reg = <0x100>;
  94                         device_type = "cpu";
  95                         power-domains = <&sysc R8A7796_PD_CA53_CPU0>;
  96                         next-level-cache = <&L2_CA53>;
  97                         enable-method = "psci";
  98                         clocks =<&cpg CPG_CORE R8A7796_CLK_Z2>;
  99                         operating-points-v2 = <&cluster1_opp>;
 100                 };
 101
 102                 a53_1: cpu@101 {
 103                         compatible = "arm,cortex-a53","arm,armv8";
 104                         reg = <0x101>;
 105                         device_type = "cpu";
 106                         power-domains = <&sysc R8A7796_PD_CA53_CPU1>;
 107                         next-level-cache = <&L2_CA53>;
 108                         enable-method = "psci";
 109                         clocks =<&cpg CPG_CORE R8A7796_CLK_Z2>;
 110                         operating-points-v2 = <&cluster1_opp>;
 111                 };
 112
 113                 a53_2: cpu@102 {
 114                         compatible = "arm,cortex-a53","arm,armv8";
 115                         reg = <0x102>;
 116                         device_type = "cpu";
 117                         power-domains = <&sysc R8A7796_PD_CA53_CPU2>;
 118                         next-level-cache = <&L2_CA53>;
 119                         enable-method = "psci";
 120                         clocks =<&cpg CPG_CORE R8A7796_CLK_Z2>;
 121                         operating-points-v2 = <&cluster1_opp>;
 122                 };
 123
 124                 a53_3: cpu@103 {
 125                         compatible = "arm,cortex-a53","arm,armv8";
 126                         reg = <0x103>;
 127                         device_type = "cpu";
 128                         power-domains = <&sysc R8A7796_PD_CA53_CPU3>;
 129                         next-level-cache = <&L2_CA53>;
 130                         enable-method = "psci";
 131                         clocks =<&cpg CPG_CORE R8A7796_CLK_Z2>;
 132                         operating-points-v2 = <&cluster1_opp>;
 133                 };
 134
 135                 L2_CA57: cache-controller-0 {
 136                         compatible = "cache";
 137                         power-domains = <&sysc R8A7796_PD_CA57_SCU>;
 138                         cache-unified;
 139                         cache-level = <2>;
 140                 };
 141
 142                 L2_CA53: cache-controller-1 {
 143                         compatible = "cache";
 144                         power-domains = <&sysc R8A7796_PD_CA53_SCU>;
 145                         cache-unified;
 146                         cache-level = <2>;
 147                 };
 148         };
 149
 150         extal_clk: extal {
 151                 compatible = "fixed-clock";
 152                 #clock-cells = <0>;
 153                 /* This value must be overridden by the board */
 154                 clock-frequency = <0>;
 155         };
 156
 157         extalr_clk: extalr {
 158                 compatible = "fixed-clock";
 159                 #clock-cells = <0>;
 160                 /* This value must be overridden by the board */
 161                 clock-frequency = <0>;
 162         };
 163
 164         cluster0_opp: opp_table0 {
 165                 compatible = "operating-points-v2";
 166                 opp-shared;
 167
 168                 opp-500000000 {
 169                         opp-hz = /bits/ 64 <500000000>;
 170                         opp-microvolt = <820000>;
 171                         clock-latency-ns = <300000>;
 172                 };
 173                 opp-1000000000 {
 174                         opp-hz = /bits/ 64 <1000000000>;
 175                         opp-microvolt = <820000>;
 176                         clock-latency-ns = <300000>;
 177                 };
 178                 opp-1500000000 {
 179                         opp-hz = /bits/ 64 <1500000000>;
 180                         opp-microvolt = <820000>;
 181                         clock-latency-ns = <300000>;
 182                 };
 183                 opp-1600000000 {
 184                         opp-hz = /bits/ 64 <1600000000>;
 185                         opp-microvolt = <900000>;
 186                         clock-latency-ns = <300000>;
 187                         turbo-mode;
 188                 };
 189                 opp-1700000000 {
 190                         opp-hz = /bits/ 64 <1700000000>;
 191                         opp-microvolt = <900000>;
 192                         clock-latency-ns = <300000>;
 193                         turbo-mode;
 194                 };
 195                 opp-1800000000 {
 196                         opp-hz = /bits/ 64 <1800000000>;
 197                         opp-microvolt = <960000>;
 198                         clock-latency-ns = <300000>;
 199                         turbo-mode;
 200                 };
 201         };
 202
 203         cluster1_opp: opp_table1 {
 204                 compatible = "operating-points-v2";
 205                 opp-shared;
 206
 207                 opp-800000000 {
 208                         opp-hz = /bits/ 64 <800000000>;
 209                         opp-microvolt = <820000>;
 210                         clock-latency-ns = <300000>;
 211                 };
 212                 opp-1000000000 {
 213                         opp-hz = /bits/ 64 <1000000000>;
 214                         opp-microvolt = <820000>;
 215                         clock-latency-ns = <300000>;
 216                 };
 217                 opp-1200000000 {
 218                         opp-hz = /bits/ 64 <1200000000>;
 219                         opp-microvolt = <820000>;
 220                         clock-latency-ns = <300000>;
 221                 };
 222                 opp-1300000000 {
 223                         opp-hz = /bits/ 64 <1300000000>;
 224                         opp-microvolt = <820000>;
 225                         clock-latency-ns = <300000>;
 226                         turbo-mode;
 227                 };
 228         };
 229
 230         /* External PCIe clock - can be overridden by the board */
 231         pcie_bus_clk: pcie_bus {
 232                 compatible = "fixed-clock";
 233                 #clock-cells = <0>;
 234                 clock-frequency = <0>;
 235         };
 236
 237         pmu_a57 {
 238                 compatible = "arm,cortex-a57-pmu";
 239                 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 240                                       <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 241                 interrupt-affinity = <&a57_0>, <&a57_1>;
 242         };
 243
 244         pmu_a53 {
 245                 compatible = "arm,cortex-a53-pmu";
 246                 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
 247                                       <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
 248                                       <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
 249                                       <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
 250                 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>;
 251         };
 252
 253         psci {
 254                 compatible = "arm,psci-1.0", "arm,psci-0.2";
 255                 method = "smc";
 256         };
 257
 258         /* External SCIF clock - to be overridden by boards that provide it */
 259         scif_clk: scif {
 260                 compatible = "fixed-clock";
 261                 #clock-cells = <0>;
 262                 clock-frequency = <0>;
 263         };
 264
 265         soc {
 266                 compatible = "simple-bus";
 267                 interrupt-parent = <&gic>;
 268                 #address-cells = <2>;
 269                 #size-cells = <2>;
 270                 ranges;
 271
 272                 gic: interrupt-controller@f1010000 {
 273                         compatible = "arm,gic-400";
 274                         #interrupt-cells = <3>;
 275                         #address-cells = <0>;
 276                         interrupt-controller;
 277                         reg = <0x0 0xf1010000 0 0x1000>,
 278                               <0x0 0xf1020000 0 0x20000>,
 279                               <0x0 0xf1040000 0 0x20000>,
 280                               <0x0 0xf1060000 0 0x20000>;
 281                         interrupts = <GIC_PPI 9
 282                                         (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
 283                         clocks = <&cpg CPG_MOD 408>;
 284                         clock-names = "clk";
 285                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 286                         resets = <&cpg 408>;
 287                 };
 288
 289                 wdt0: watchdog@e6020000 {
 290                         compatible = "renesas,r8a7796-wdt",
 291                                      "renesas,rcar-gen3-wdt";
 292                         reg = <0 0xe6020000 0 0x0c>;
 293                         clocks = <&cpg CPG_MOD 402>;
 294                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 295                         resets = <&cpg 402>;
 296                         status = "disabled";
 297                 };
 298
 299                 gpio0: gpio@e6050000 {
 300                         compatible = "renesas,gpio-r8a7796",
 301                                      "renesas,rcar-gen3-gpio";
 302                         reg = <0 0xe6050000 0 0x50>;
 303                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 304                         #gpio-cells = <2>;
 305                         gpio-controller;
 306                         gpio-ranges = <&pfc 0 0 16>;
 307                         #interrupt-cells = <2>;
 308                         interrupt-controller;
 309                         clocks = <&cpg CPG_MOD 912>;
 310                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 311                         resets = <&cpg 912>;
 312                 };
 313
 314                 gpio1: gpio@e6051000 {
 315                         compatible = "renesas,gpio-r8a7796",
 316                                      "renesas,rcar-gen3-gpio";
 317                         reg = <0 0xe6051000 0 0x50>;
 318                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 319                         #gpio-cells = <2>;
 320                         gpio-controller;
 321                         gpio-ranges = <&pfc 0 32 29>;
 322                         #interrupt-cells = <2>;
 323                         interrupt-controller;
 324                         clocks = <&cpg CPG_MOD 911>;
 325                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 326                         resets = <&cpg 911>;
 327                 };
 328
 329                 gpio2: gpio@e6052000 {
 330                         compatible = "renesas,gpio-r8a7796",
 331                                      "renesas,rcar-gen3-gpio";
 332                         reg = <0 0xe6052000 0 0x50>;
 333                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 334                         #gpio-cells = <2>;
 335                         gpio-controller;
 336                         gpio-ranges = <&pfc 0 64 15>;
 337                         #interrupt-cells = <2>;
 338                         interrupt-controller;
 339                         clocks = <&cpg CPG_MOD 910>;
 340                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 341                         resets = <&cpg 910>;
 342                 };
 343
 344                 gpio3: gpio@e6053000 {
 345                         compatible = "renesas,gpio-r8a7796",
 346                                      "renesas,rcar-gen3-gpio";
 347                         reg = <0 0xe6053000 0 0x50>;
 348                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 349                         #gpio-cells = <2>;
 350                         gpio-controller;
 351                         gpio-ranges = <&pfc 0 96 16>;
 352                         #interrupt-cells = <2>;
 353                         interrupt-controller;
 354                         clocks = <&cpg CPG_MOD 909>;
 355                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 356                         resets = <&cpg 909>;
 357                 };
 358
 359                 gpio4: gpio@e6054000 {
 360                         compatible = "renesas,gpio-r8a7796",
 361                                      "renesas,rcar-gen3-gpio";
 362                         reg = <0 0xe6054000 0 0x50>;
 363                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 364                         #gpio-cells = <2>;
 365                         gpio-controller;
 366                         gpio-ranges = <&pfc 0 128 18>;
 367                         #interrupt-cells = <2>;
 368                         interrupt-controller;
 369                         clocks = <&cpg CPG_MOD 908>;
 370                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 371                         resets = <&cpg 908>;
 372                 };
 373
 374                 gpio5: gpio@e6055000 {
 375                         compatible = "renesas,gpio-r8a7796",
 376                                      "renesas,rcar-gen3-gpio";
 377                         reg = <0 0xe6055000 0 0x50>;
 378                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 379                         #gpio-cells = <2>;
 380                         gpio-controller;
 381                         gpio-ranges = <&pfc 0 160 26>;
 382                         #interrupt-cells = <2>;
 383                         interrupt-controller;
 384                         clocks = <&cpg CPG_MOD 907>;
 385                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 386                         resets = <&cpg 907>;
 387                 };
 388
 389                 gpio6: gpio@e6055400 {
 390                         compatible = "renesas,gpio-r8a7796",
 391                                      "renesas,rcar-gen3-gpio";
 392                         reg = <0 0xe6055400 0 0x50>;
 393                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 394                         #gpio-cells = <2>;
 395                         gpio-controller;
 396                         gpio-ranges = <&pfc 0 192 32>;
 397                         #interrupt-cells = <2>;
 398                         interrupt-controller;
 399                         clocks = <&cpg CPG_MOD 906>;
 400                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 401                         resets = <&cpg 906>;
 402                 };
 403
 404                 gpio7: gpio@e6055800 {
 405                         compatible = "renesas,gpio-r8a7796",
 406                                      "renesas,rcar-gen3-gpio";
 407                         reg = <0 0xe6055800 0 0x50>;
 408                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 409                         #gpio-cells = <2>;
 410                         gpio-controller;
 411                         gpio-ranges = <&pfc 0 224 4>;
 412                         #interrupt-cells = <2>;
 413                         interrupt-controller;
 414                         clocks = <&cpg CPG_MOD 905>;
 415                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 416                         resets = <&cpg 905>;
 417                 };
 418
 419                 pfc: pin-controller@e6060000 {
 420                         compatible = "renesas,pfc-r8a7796";
 421                         reg = <0 0xe6060000 0 0x50c>;
 422                 };
 423
 424                 ipmmu_vi0: mmu@febd0000 {
 425                         compatible = "renesas,ipmmu-r8a7796";
 426                         reg = <0 0xfebd0000 0 0x1000>;
 427                         renesas,ipmmu-main = <&ipmmu_mm 9>;
 428                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 429                         #iommu-cells = <1>;
 430                 };
 431
 432                 ipmmu_vc0: mmu@fe6b0000 {
 433                         compatible = "renesas,ipmmu-r8a7796";
 434                         reg = <0 0xfe6b0000 0 0x1000>;
 435                         renesas,ipmmu-main = <&ipmmu_mm 8>;
 436                         power-domains = <&sysc R8A7796_PD_A3VC>;
 437                         #iommu-cells = <1>;
 438                         status = "disabled";
 439                 };
 440
 441                 ipmmu_pv0: mmu@fd800000 {
 442                         compatible = "renesas,ipmmu-r8a7796";
 443                         reg = <0 0xfd800000 0 0x1000>;
 444                         renesas,ipmmu-main = <&ipmmu_mm 5>;
 445                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 446                         #iommu-cells = <1>;
 447                 };
 448
 449                 ipmmu_pv1: mmu@fd950000 {
 450                         compatible = "renesas,ipmmu-r8a7796";
 451                         reg = <0 0xfd950000 0 0x1000>;
 452                         renesas,ipmmu-main = <&ipmmu_mm 6>;
 453                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 454                         #iommu-cells = <1>;
 455                         status = "disabled";
 456                 };
 457
 458                 ipmmu_ir: mmu@ff8b0000 {
 459                         compatible = "renesas,ipmmu-r8a7796";
 460                         reg = <0 0xff8b0000 0 0x1000>;
 461                         renesas,ipmmu-main = <&ipmmu_mm 3>;
 462                         power-domains = <&sysc R8A7796_PD_A3IR>;
 463                         #iommu-cells = <1>;
 464                         status = "disabled";
 465                 };
 466
 467                 ipmmu_hc: mmu@e6570000 {
 468                         compatible = "renesas,ipmmu-r8a7796";
 469                         reg = <0 0xe6570000 0 0x1000>;
 470                         renesas,ipmmu-main = <&ipmmu_mm 2>;
 471                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 472                         #iommu-cells = <1>;
 473                         status = "disabled";
 474                 };
 475
 476                 ipmmu_rt: mmu@ffc80000 {
 477                         compatible = "renesas,ipmmu-r8a7796";
 478                         reg = <0 0xffc80000 0 0x1000>;
 479                         renesas,ipmmu-main = <&ipmmu_mm 7>;
 480                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 481                         #iommu-cells = <1>;
 482                         status = "disabled";
 483                 };
 484
 485                 ipmmu_mp: mmu@ec670000 {
 486                         compatible = "renesas,ipmmu-r8a7796";
 487                         reg = <0 0xec670000 0 0x1000>;
 488                         renesas,ipmmu-main = <&ipmmu_mm 4>;
 489                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 490                         #iommu-cells = <1>;
 491                 };
 492
 493                 ipmmu_ds0: mmu@e6740000 {
 494                         compatible = "renesas,ipmmu-r8a7796";
 495                         reg = <0 0xe6740000 0 0x1000>;
 496                         renesas,ipmmu-main = <&ipmmu_mm 0>;
 497                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 498                         #iommu-cells = <1>;
 499                 };
 500
 501                 ipmmu_ds1: mmu@e7740000 {
 502                         compatible = "renesas,ipmmu-r8a7796";
 503                         reg = <0 0xe7740000 0 0x1000>;
 504                         renesas,ipmmu-main = <&ipmmu_mm 1>;
 505                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 506                         #iommu-cells = <1>;
 507                 };
 508
 509                 ipmmu_mm: mmu@e67b0000 {
 510                         compatible = "renesas,ipmmu-r8a7796";
 511                         reg = <0 0xe67b0000 0 0x1000>;
 512                         interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
 513                                      <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
 514                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 515                         #iommu-cells = <1>;
 516                 };
 517
 518                 cpg: clock-controller@e6150000 {
 519                         compatible = "renesas,r8a7796-cpg-mssr";
 520                         reg = <0 0xe6150000 0 0x1000>;
 521                         clocks = <&extal_clk>, <&extalr_clk>;
 522                         clock-names = "extal", "extalr";
 523                         #clock-cells = <2>;
 524                         #power-domain-cells = <0>;
 525                         #reset-cells = <1>;
 526                 };
 527
 528                 rst: reset-controller@e6160000 {
 529                         compatible = "renesas,r8a7796-rst";
 530                         reg = <0 0xe6160000 0 0x0200>;
 531                 };
 532
 533                 prr: chipid@fff00044 {
 534                         compatible = "renesas,prr";
 535                         reg = <0 0xfff00044 0 4>;
 536                 };
 537
 538                 sysc: system-controller@e6180000 {
 539                         compatible = "renesas,r8a7796-sysc";
 540                         reg = <0 0xe6180000 0 0x0400>;
 541                         #power-domain-cells = <1>;
 542                 };
 543
 544                 intc_ex: interrupt-controller@e61c0000 {
 545                         compatible = "renesas,intc-ex-r8a7796", "renesas,irqc";
 546                         #interrupt-cells = <2>;
 547                         interrupt-controller;
 548                         reg = <0 0xe61c0000 0 0x200>;
 549                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
 550                                       GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
 551                                       GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
 552                                       GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
 553                                       GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
 554                                       GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 555                         clocks = <&cpg CPG_MOD 407>;
 556                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 557                         resets = <&cpg 407>;
 558                 };
 559
 560                 i2c_dvfs: i2c@e60b0000 {
 561                         #address-cells = <1>;
 562                         #size-cells = <0>;
 563                         compatible = "renesas,iic-r8a7796",
 564                                      "renesas,rcar-gen3-iic",
 565                                      "renesas,rmobile-iic";
 566                         reg = <0 0xe60b0000 0 0x425>;
 567                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 568                         clocks = <&cpg CPG_MOD 926>;
 569                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 570                         resets = <&cpg 926>;
 571                         dmas = <&dmac0 0x11>, <&dmac0 0x10>;
 572                         dma-names = "tx", "rx";
 573                         status = "disabled";
 574                 };
 575
 576                 pwm0: pwm@e6e30000 {
 577                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
 578                         reg = <0 0xe6e30000 0 8>;
 579                         #pwm-cells = <2>;
 580                         clocks = <&cpg CPG_MOD 523>;
 581                         resets = <&cpg 523>;
 582                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 583                         status = "disabled";
 584                 };
 585
 586                 pwm1: pwm@e6e31000 {
 587                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
 588                         reg = <0 0xe6e31000 0 8>;
 589                         #pwm-cells = <2>;
 590                         clocks = <&cpg CPG_MOD 523>;
 591                         resets = <&cpg 523>;
 592                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 593                         status = "disabled";
 594                 };
 595
 596                 pwm2: pwm@e6e32000 {
 597                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
 598                         reg = <0 0xe6e32000 0 8>;
 599                         #pwm-cells = <2>;
 600                         clocks = <&cpg CPG_MOD 523>;
 601                         resets = <&cpg 523>;
 602                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 603                         status = "disabled";
 604                 };
 605
 606                 pwm3: pwm@e6e33000 {
 607                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
 608                         reg = <0 0xe6e33000 0 8>;
 609                         #pwm-cells = <2>;
 610                         clocks = <&cpg CPG_MOD 523>;
 611                         resets = <&cpg 523>;
 612                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 613                         status = "disabled";
 614                 };
 615
 616                 pwm4: pwm@e6e34000 {
 617                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
 618                         reg = <0 0xe6e34000 0 8>;
 619                         #pwm-cells = <2>;
 620                         clocks = <&cpg CPG_MOD 523>;
 621                         resets = <&cpg 523>;
 622                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 623                         status = "disabled";
 624                 };
 625
 626                 pwm5: pwm@e6e35000 {
 627                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
 628                         reg = <0 0xe6e35000 0 8>;
 629                         #pwm-cells = <2>;
 630                         clocks = <&cpg CPG_MOD 523>;
 631                         resets = <&cpg 523>;
 632                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 633                         status = "disabled";
 634                 };
 635
 636                 pwm6: pwm@e6e36000 {
 637                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
 638                         reg = <0 0xe6e36000 0 8>;
 639                         #pwm-cells = <2>;
 640                         clocks = <&cpg CPG_MOD 523>;
 641                         resets = <&cpg 523>;
 642                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 643                         status = "disabled";
 644                 };
 645
 646                 i2c0: i2c@e6500000 {
 647                         #address-cells = <1>;
 648                         #size-cells = <0>;
 649                         compatible = "renesas,i2c-r8a7796",
 650                                      "renesas,rcar-gen3-i2c";
 651                         reg = <0 0xe6500000 0 0x40>;
 652                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 653                         clocks = <&cpg CPG_MOD 931>;
 654                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 655                         resets = <&cpg 931>;
 656                         dmas = <&dmac1 0x91>, <&dmac1 0x90>,
 657                                <&dmac2 0x91>, <&dmac2 0x90>;
 658                         dma-names = "tx", "rx", "tx", "rx";
 659                         i2c-scl-internal-delay-ns = <110>;
 660                         status = "disabled";
 661                 };
 662
 663                 i2c1: i2c@e6508000 {
 664                         #address-cells = <1>;
 665                         #size-cells = <0>;
 666                         compatible = "renesas,i2c-r8a7796",
 667                                      "renesas,rcar-gen3-i2c";
 668                         reg = <0 0xe6508000 0 0x40>;
 669                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 670                         clocks = <&cpg CPG_MOD 930>;
 671                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 672                         resets = <&cpg 930>;
 673                         dmas = <&dmac1 0x93>, <&dmac1 0x92>,
 674                                <&dmac2 0x93>, <&dmac2 0x92>;
 675                         dma-names = "tx", "rx", "tx", "rx";
 676                         i2c-scl-internal-delay-ns = <6>;
 677                         status = "disabled";
 678                 };
 679
 680                 i2c2: i2c@e6510000 {
 681                         #address-cells = <1>;
 682                         #size-cells = <0>;
 683                         compatible = "renesas,i2c-r8a7796",
 684                                      "renesas,rcar-gen3-i2c";
 685                         reg = <0 0xe6510000 0 0x40>;
 686                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 687                         clocks = <&cpg CPG_MOD 929>;
 688                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 689                         resets = <&cpg 929>;
 690                         dmas = <&dmac1 0x95>, <&dmac1 0x94>,
 691                                <&dmac2 0x95>, <&dmac2 0x94>;
 692                         dma-names = "tx", "rx", "tx", "rx";
 693                         i2c-scl-internal-delay-ns = <6>;
 694                         status = "disabled";
 695                 };
 696
 697                 i2c3: i2c@e66d0000 {
 698                         #address-cells = <1>;
 699                         #size-cells = <0>;
 700                         compatible = "renesas,i2c-r8a7796",
 701                                      "renesas,rcar-gen3-i2c";
 702                         reg = <0 0xe66d0000 0 0x40>;
 703                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 704                         clocks = <&cpg CPG_MOD 928>;
 705                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 706                         resets = <&cpg 928>;
 707                         dmas = <&dmac0 0x97>, <&dmac0 0x96>;
 708                         dma-names = "tx", "rx";
 709                         i2c-scl-internal-delay-ns = <110>;
 710                         status = "disabled";
 711                 };
 712
 713                 i2c4: i2c@e66d8000 {
 714                         #address-cells = <1>;
 715                         #size-cells = <0>;
 716                         compatible = "renesas,i2c-r8a7796",
 717                                      "renesas,rcar-gen3-i2c";
 718                         reg = <0 0xe66d8000 0 0x40>;
 719                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 720                         clocks = <&cpg CPG_MOD 927>;
 721                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 722                         resets = <&cpg 927>;
 723                         dmas = <&dmac0 0x99>, <&dmac0 0x98>;
 724                         dma-names = "tx", "rx";
 725                         i2c-scl-internal-delay-ns = <110>;
 726                         status = "disabled";
 727                 };
 728
 729                 i2c5: i2c@e66e0000 {
 730                         #address-cells = <1>;
 731                         #size-cells = <0>;
 732                         compatible = "renesas,i2c-r8a7796",
 733                                      "renesas,rcar-gen3-i2c";
 734                         reg = <0 0xe66e0000 0 0x40>;
 735                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 736                         clocks = <&cpg CPG_MOD 919>;
 737                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 738                         resets = <&cpg 919>;
 739                         dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
 740                         dma-names = "tx", "rx";
 741                         i2c-scl-internal-delay-ns = <110>;
 742                         status = "disabled";
 743                 };
 744
 745                 i2c6: i2c@e66e8000 {
 746                         #address-cells = <1>;
 747                         #size-cells = <0>;
 748                         compatible = "renesas,i2c-r8a7796",
 749                                      "renesas,rcar-gen3-i2c";
 750                         reg = <0 0xe66e8000 0 0x40>;
 751                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 752                         clocks = <&cpg CPG_MOD 918>;
 753                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 754                         resets = <&cpg 918>;
 755                         dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
 756                         dma-names = "tx", "rx";
 757                         i2c-scl-internal-delay-ns = <6>;
 758                         status = "disabled";
 759                 };
 760
 761                 can0: can@e6c30000 {
 762                         compatible = "renesas,can-r8a7796",
 763                                      "renesas,rcar-gen3-can";
 764                         reg = <0 0xe6c30000 0 0x1000>;
 765                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
 766                         clocks = <&cpg CPG_MOD 916>,
 767                                <&cpg CPG_CORE R8A7796_CLK_CANFD>,
 768                                <&can_clk>;
 769                         clock-names = "clkp1", "clkp2", "can_clk";
 770                         assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
 771                         assigned-clock-rates = <40000000>;
 772                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 773                         resets = <&cpg 916>;
 774                         status = "disabled";
 775                 };
 776
 777                 can1: can@e6c38000 {
 778                         compatible = "renesas,can-r8a7796",
 779                                      "renesas,rcar-gen3-can";
 780                         reg = <0 0xe6c38000 0 0x1000>;
 781                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
 782                         clocks = <&cpg CPG_MOD 915>,
 783                                <&cpg CPG_CORE R8A7796_CLK_CANFD>,
 784                                <&can_clk>;
 785                         clock-names = "clkp1", "clkp2", "can_clk";
 786                         assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
 787                         assigned-clock-rates = <40000000>;
 788                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 789                         resets = <&cpg 915>;
 790                         status = "disabled";
 791                 };
 792
 793                 canfd: can@e66c0000 {
 794                         compatible = "renesas,r8a7796-canfd",
 795                                      "renesas,rcar-gen3-canfd";
 796                         reg = <0 0xe66c0000 0 0x8000>;
 797                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
 798                                    <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 799                         clocks = <&cpg CPG_MOD 914>,
 800                                <&cpg CPG_CORE R8A7796_CLK_CANFD>,
 801                                <&can_clk>;
 802                         clock-names = "fck", "canfd", "can_clk";
 803                         assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
 804                         assigned-clock-rates = <40000000>;
 805                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 806                         resets = <&cpg 914>;
 807                         status = "disabled";
 808
 809                         channel0 {
 810                                 status = "disabled";
 811                         };
 812
 813                         channel1 {
 814                                 status = "disabled";
 815                         };
 816                 };
 817
 818                 drif00: rif@e6f40000 {
 819                         compatible = "renesas,r8a7796-drif",
 820                                      "renesas,rcar-gen3-drif";
 821                         reg = <0 0xe6f40000 0 0x64>;
 822                         interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
 823                         clocks = <&cpg CPG_MOD 515>;
 824                         clock-names = "fck";
 825                         dmas = <&dmac1 0x20>, <&dmac2 0x20>;
 826                         dma-names = "rx", "rx";
 827                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 828                         resets = <&cpg 515>;
 829                         renesas,bonding = <&drif01>;
 830                         status = "disabled";
 831                 };
 832
 833                 drif01: rif@e6f50000 {
 834                         compatible = "renesas,r8a7796-drif",
 835                                      "renesas,rcar-gen3-drif";
 836                         reg = <0 0xe6f50000 0 0x64>;
 837                         interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
 838                         clocks = <&cpg CPG_MOD 514>;
 839                         clock-names = "fck";
 840                         dmas = <&dmac1 0x22>, <&dmac2 0x22>;
 841                         dma-names = "rx", "rx";
 842                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 843                         resets = <&cpg 514>;
 844                         renesas,bonding = <&drif00>;
 845                         status = "disabled";
 846                 };
 847
 848                 drif10: rif@e6f60000 {
 849                         compatible = "renesas,r8a7796-drif",
 850                                      "renesas,rcar-gen3-drif";
 851                         reg = <0 0xe6f60000 0 0x64>;
 852                         interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
 853                         clocks = <&cpg CPG_MOD 513>;
 854                         clock-names = "fck";
 855                         dmas = <&dmac1 0x24>, <&dmac2 0x24>;
 856                         dma-names = "rx", "rx";
 857                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 858                         resets = <&cpg 513>;
 859                         renesas,bonding = <&drif11>;
 860                         status = "disabled";
 861                 };
 862
 863                 drif11: rif@e6f70000 {
 864                         compatible = "renesas,r8a7796-drif",
 865                                      "renesas,rcar-gen3-drif";
 866                         reg = <0 0xe6f70000 0 0x64>;
 867                         interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
 868                         clocks = <&cpg CPG_MOD 512>;
 869                         clock-names = "fck";
 870                         dmas = <&dmac1 0x26>, <&dmac2 0x26>;
 871                         dma-names = "rx", "rx";
 872                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 873                         resets = <&cpg 512>;
 874                         renesas,bonding = <&drif10>;
 875                         status = "disabled";
 876                 };
 877
 878                 drif20: rif@e6f80000 {
 879                         compatible = "renesas,r8a7796-drif",
 880                                      "renesas,rcar-gen3-drif";
 881                         reg = <0 0xe6f80000 0 0x64>;
 882                         interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
 883                         clocks = <&cpg CPG_MOD 511>;
 884                         clock-names = "fck";
 885                         dmas = <&dmac1 0x28>, <&dmac2 0x28>;
 886                         dma-names = "rx", "rx";
 887                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 888                         resets = <&cpg 511>;
 889                         renesas,bonding = <&drif21>;
 890                         status = "disabled";
 891                 };
 892
 893                 drif21: rif@e6f90000 {
 894                         compatible = "renesas,r8a7796-drif",
 895                                      "renesas,rcar-gen3-drif";
 896                         reg = <0 0xe6f90000 0 0x64>;
 897                         interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
 898                         clocks = <&cpg CPG_MOD 510>;
 899                         clock-names = "fck";
 900                         dmas = <&dmac1 0x2a>, <&dmac2 0x2a>;
 901                         dma-names = "rx", "rx";
 902                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 903                         resets = <&cpg 510>;
 904                         renesas,bonding = <&drif20>;
 905                         status = "disabled";
 906                 };
 907
 908                 drif30: rif@e6fa0000 {
 909                         compatible = "renesas,r8a7796-drif",
 910                                      "renesas,rcar-gen3-drif";
 911                         reg = <0 0xe6fa0000 0 0x64>;
 912                         interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
 913                         clocks = <&cpg CPG_MOD 509>;
 914                         clock-names = "fck";
 915                         dmas = <&dmac1 0x2c>, <&dmac2 0x2c>;
 916                         dma-names = "rx", "rx";
 917                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 918                         resets = <&cpg 509>;
 919                         renesas,bonding = <&drif31>;
 920                         status = "disabled";
 921                 };
 922
 923                 drif31: rif@e6fb0000 {
 924                         compatible = "renesas,r8a7796-drif",
 925                                      "renesas,rcar-gen3-drif";
 926                         reg = <0 0xe6fb0000 0 0x64>;
 927                         interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
 928                         clocks = <&cpg CPG_MOD 508>;
 929                         clock-names = "fck";
 930                         dmas = <&dmac1 0x2e>, <&dmac2 0x2e>;
 931                         dma-names = "rx", "rx";
 932                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 933                         resets = <&cpg 508>;
 934                         renesas,bonding = <&drif30>;
 935                         status = "disabled";
 936                 };
 937
 938                 avb: ethernet@e6800000 {
 939                         compatible = "renesas,etheravb-r8a7796",
 940                                      "renesas,etheravb-rcar-gen3";
 941                         reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
 942                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
 943                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
 944                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
 945                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
 946                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
 947                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
 948                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
 949                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
 950                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
 951                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
 952                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
 953                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
 954                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
 955                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
 956                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
 957                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 958                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 959                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
 960                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 961                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
 962                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
 963                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
 964                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
 965                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
 966                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 967                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
 968                                           "ch4", "ch5", "ch6", "ch7",
 969                                           "ch8", "ch9", "ch10", "ch11",
 970                                           "ch12", "ch13", "ch14", "ch15",
 971                                           "ch16", "ch17", "ch18", "ch19",
 972                                           "ch20", "ch21", "ch22", "ch23",
 973                                           "ch24";
 974                         clocks = <&cpg CPG_MOD 812>;
 975                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 976                         resets = <&cpg 812>;
 977                         phy-mode = "rgmii";
 978                         iommus = <&ipmmu_ds0 16>;
 979                         #address-cells = <1>;
 980                         #size-cells = <0>;
 981                         status = "disabled";
 982                 };
 983
 984                 hscif0: serial@e6540000 {
 985                         compatible = "renesas,hscif-r8a7796",
 986                                      "renesas,rcar-gen3-hscif",
 987                                      "renesas,hscif";
 988                         reg = <0 0xe6540000 0 0x60>;
 989                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 990                         clocks = <&cpg CPG_MOD 520>,
 991                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 992                                  <&scif_clk>;
 993                         clock-names = "fck", "brg_int", "scif_clk";
 994                         dmas = <&dmac1 0x31>, <&dmac1 0x30>,
 995                                <&dmac2 0x31>, <&dmac2 0x30>;
 996                         dma-names = "tx", "rx", "tx", "rx";
 997                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 998                         resets = <&cpg 520>;
 999                         status = "disabled";
1000                 };
1001
1002                 hscif1: serial@e6550000 {
1003                         compatible = "renesas,hscif-r8a7796",
1004                                      "renesas,rcar-gen3-hscif",
1005                                      "renesas,hscif";
1006                         reg = <0 0xe6550000 0 0x60>;
1007                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
1008                         clocks = <&cpg CPG_MOD 519>,
1009                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1010                                  <&scif_clk>;
1011                         clock-names = "fck", "brg_int", "scif_clk";
1012                         dmas = <&dmac1 0x33>, <&dmac1 0x32>,
1013                                <&dmac2 0x33>, <&dmac2 0x32>;
1014                         dma-names = "tx", "rx", "tx", "rx";
1015                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1016                         resets = <&cpg 519>;
1017                         status = "disabled";
1018                 };
1019
1020                 hscif2: serial@e6560000 {
1021                         compatible = "renesas,hscif-r8a7796",
1022                                      "renesas,rcar-gen3-hscif",
1023                                      "renesas,hscif";
1024                         reg = <0 0xe6560000 0 0x60>;
1025                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
1026                         clocks = <&cpg CPG_MOD 518>,
1027                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1028                                  <&scif_clk>;
1029                         clock-names = "fck", "brg_int", "scif_clk";
1030                         dmas = <&dmac1 0x35>, <&dmac1 0x34>,
1031                                <&dmac2 0x35>, <&dmac2 0x34>;
1032                         dma-names = "tx", "rx", "tx", "rx";
1033                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1034                         resets = <&cpg 518>;
1035                         status = "disabled";
1036                 };
1037
1038                 hscif3: serial@e66a0000 {
1039                         compatible = "renesas,hscif-r8a7796",
1040                                      "renesas,rcar-gen3-hscif",
1041                                      "renesas,hscif";
1042                         reg = <0 0xe66a0000 0 0x60>;
1043                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
1044                         clocks = <&cpg CPG_MOD 517>,
1045                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1046                                  <&scif_clk>;
1047                         clock-names = "fck", "brg_int", "scif_clk";
1048                         dmas = <&dmac0 0x37>, <&dmac0 0x36>;
1049                         dma-names = "tx", "rx";
1050                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1051                         resets = <&cpg 517>;
1052                         status = "disabled";
1053                 };
1054
1055                 hscif4: serial@e66b0000 {
1056                         compatible = "renesas,hscif-r8a7796",
1057                                      "renesas,rcar-gen3-hscif",
1058                                      "renesas,hscif";
1059                         reg = <0 0xe66b0000 0 0x60>;
1060                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
1061                         clocks = <&cpg CPG_MOD 516>,
1062                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1063                                  <&scif_clk>;
1064                         clock-names = "fck", "brg_int", "scif_clk";
1065                         dmas = <&dmac0 0x39>, <&dmac0 0x38>;
1066                         dma-names = "tx", "rx";
1067                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1068                         resets = <&cpg 516>;
1069                         status = "disabled";
1070                 };
1071
1072                 scif0: serial@e6e60000 {
1073                         compatible = "renesas,scif-r8a7796",
1074                                      "renesas,rcar-gen3-scif", "renesas,scif";
1075                         reg = <0 0xe6e60000 0 64>;
1076                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1077                         clocks = <&cpg CPG_MOD 207>,
1078                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1079                                  <&scif_clk>;
1080                         clock-names = "fck", "brg_int", "scif_clk";
1081                         dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1082                                <&dmac2 0x51>, <&dmac2 0x50>;
1083                         dma-names = "tx", "rx", "tx", "rx";
1084                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1085                         resets = <&cpg 207>;
1086                         status = "disabled";
1087                 };
1088
1089                 scif1: serial@e6e68000 {
1090                         compatible = "renesas,scif-r8a7796",
1091                                      "renesas,rcar-gen3-scif", "renesas,scif";
1092                         reg = <0 0xe6e68000 0 64>;
1093                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1094                         clocks = <&cpg CPG_MOD 206>,
1095                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1096                                  <&scif_clk>;
1097                         clock-names = "fck", "brg_int", "scif_clk";
1098                         dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1099                                <&dmac2 0x53>, <&dmac2 0x52>;
1100                         dma-names = "tx", "rx", "tx", "rx";
1101                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1102                         resets = <&cpg 206>;
1103                         status = "disabled";
1104                 };
1105
1106                 scif2: serial@e6e88000 {
1107                         compatible = "renesas,scif-r8a7796",
1108                                      "renesas,rcar-gen3-scif", "renesas,scif";
1109                         reg = <0 0xe6e88000 0 64>;
1110                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1111                         clocks = <&cpg CPG_MOD 310>,
1112                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1113                                  <&scif_clk>;
1114                         clock-names = "fck", "brg_int", "scif_clk";
1115                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1116                         resets = <&cpg 310>;
1117                         status = "disabled";
1118                 };
1119
1120                 scif3: serial@e6c50000 {
1121                         compatible = "renesas,scif-r8a7796",
1122                                      "renesas,rcar-gen3-scif", "renesas,scif";
1123                         reg = <0 0xe6c50000 0 64>;
1124                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1125                         clocks = <&cpg CPG_MOD 204>,
1126                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1127                                  <&scif_clk>;
1128                         clock-names = "fck", "brg_int", "scif_clk";
1129                         dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1130                         dma-names = "tx", "rx";
1131                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1132                         resets = <&cpg 204>;
1133                         status = "disabled";
1134                 };
1135
1136                 scif4: serial@e6c40000 {
1137                         compatible = "renesas,scif-r8a7796",
1138                                      "renesas,rcar-gen3-scif", "renesas,scif";
1139                         reg = <0 0xe6c40000 0 64>;
1140                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1141                         clocks = <&cpg CPG_MOD 203>,
1142                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1143                                  <&scif_clk>;
1144                         clock-names = "fck", "brg_int", "scif_clk";
1145                         dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1146                         dma-names = "tx", "rx";
1147                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1148                         resets = <&cpg 203>;
1149                         status = "disabled";
1150                 };
1151
1152                 scif5: serial@e6f30000 {
1153                         compatible = "renesas,scif-r8a7796",
1154                                      "renesas,rcar-gen3-scif", "renesas,scif";
1155                         reg = <0 0xe6f30000 0 64>;
1156                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1157                         clocks = <&cpg CPG_MOD 202>,
1158                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1159                                  <&scif_clk>;
1160                         clock-names = "fck", "brg_int", "scif_clk";
1161                         dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1162                                <&dmac2 0x5b>, <&dmac2 0x5a>;
1163                         dma-names = "tx", "rx", "tx", "rx";
1164                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1165                         resets = <&cpg 202>;
1166                         status = "disabled";
1167                 };
1168
1169                 msiof0: spi@e6e90000 {
1170                         compatible = "renesas,msiof-r8a7796",
1171                                      "renesas,rcar-gen3-msiof";
1172                         reg = <0 0xe6e90000 0 0x0064>;
1173                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1174                         clocks = <&cpg CPG_MOD 211>;
1175                         dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1176                                <&dmac2 0x41>, <&dmac2 0x40>;
1177                         dma-names = "tx", "rx", "tx", "rx";
1178                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1179                         resets = <&cpg 211>;
1180                         #address-cells = <1>;
1181                         #size-cells = <0>;
1182                         status = "disabled";
1183                 };
1184
1185                 msiof1: spi@e6ea0000 {
1186                         compatible = "renesas,msiof-r8a7796",
1187                                      "renesas,rcar-gen3-msiof";
1188                         reg = <0 0xe6ea0000 0 0x0064>;
1189                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1190                         clocks = <&cpg CPG_MOD 210>;
1191                         dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1192                                <&dmac2 0x43>, <&dmac2 0x42>;
1193                         dma-names = "tx", "rx", "tx", "rx";
1194                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1195                         resets = <&cpg 210>;
1196                         #address-cells = <1>;
1197                         #size-cells = <0>;
1198                         status = "disabled";
1199                 };
1200
1201                 msiof2: spi@e6c00000 {
1202                         compatible = "renesas,msiof-r8a7796",
1203                                      "renesas,rcar-gen3-msiof";
1204                         reg = <0 0xe6c00000 0 0x0064>;
1205                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1206                         clocks = <&cpg CPG_MOD 209>;
1207                         dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1208                         dma-names = "tx", "rx";
1209                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1210                         resets = <&cpg 209>;
1211                         #address-cells = <1>;
1212                         #size-cells = <0>;
1213                         status = "disabled";
1214                 };
1215
1216                 msiof3: spi@e6c10000 {
1217                         compatible = "renesas,msiof-r8a7796",
1218                                      "renesas,rcar-gen3-msiof";
1219                         reg = <0 0xe6c10000 0 0x0064>;
1220                         interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1221                         clocks = <&cpg CPG_MOD 208>;
1222                         dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1223                         dma-names = "tx", "rx";
1224                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1225                         resets = <&cpg 208>;
1226                         #address-cells = <1>;
1227                         #size-cells = <0>;
1228                         status = "disabled";
1229                 };
1230
1231                 dmac0: dma-controller@e6700000 {
1232                         compatible = "renesas,dmac-r8a7796",
1233                                      "renesas,rcar-dmac";
1234                         reg = <0 0xe6700000 0 0x10000>;
1235                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
1236                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
1237                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
1238                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
1239                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
1240                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
1241                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
1242                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
1243                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
1244                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
1245                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
1246                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
1247                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
1248                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
1249                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
1250                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
1251                                       GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
1252                         interrupt-names = "error",
1253                                         "ch0", "ch1", "ch2", "ch3",
1254                                         "ch4", "ch5", "ch6", "ch7",
1255                                         "ch8", "ch9", "ch10", "ch11",
1256                                         "ch12", "ch13", "ch14", "ch15";
1257                         clocks = <&cpg CPG_MOD 219>;
1258                         clock-names = "fck";
1259                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1260                         resets = <&cpg 219>;
1261                         #dma-cells = <1>;
1262                         dma-channels = <16>;
1263                         iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
1264                                <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
1265                                <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
1266                                <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
1267                                <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
1268                                <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
1269                                <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
1270                                <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
1271                 };
1272
1273                 dmac1: dma-controller@e7300000 {
1274                         compatible = "renesas,dmac-r8a7796",
1275                                      "renesas,rcar-dmac";
1276                         reg = <0 0xe7300000 0 0x10000>;
1277                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
1278                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
1279                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
1280                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
1281                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
1282                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
1283                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
1284                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
1285                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
1286                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
1287                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
1288                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
1289                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
1290                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
1291                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
1292                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
1293                                       GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
1294                         interrupt-names = "error",
1295                                         "ch0", "ch1", "ch2", "ch3",
1296                                         "ch4", "ch5", "ch6", "ch7",
1297                                         "ch8", "ch9", "ch10", "ch11",
1298                                         "ch12", "ch13", "ch14", "ch15";
1299                         clocks = <&cpg CPG_MOD 218>;
1300                         clock-names = "fck";
1301                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1302                         resets = <&cpg 218>;
1303                         #dma-cells = <1>;
1304                         dma-channels = <16>;
1305                         iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
1306                                <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
1307                                <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
1308                                <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
1309                                <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
1310                                <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
1311                                <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
1312                                <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
1313                 };
1314
1315                 dmac2: dma-controller@e7310000 {
1316                         compatible = "renesas,dmac-r8a7796",
1317                                      "renesas,rcar-dmac";
1318                         reg = <0 0xe7310000 0 0x10000>;
1319                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
1320                                       GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
1321                                       GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
1322                                       GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
1323                                       GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
1324                                       GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
1325                                       GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
1326                                       GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
1327                                       GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
1328                                       GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
1329                                       GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
1330                                       GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
1331                                       GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
1332                                       GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
1333                                       GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
1334                                       GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
1335                                       GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
1336                         interrupt-names = "error",
1337                                         "ch0", "ch1", "ch2", "ch3",
1338                                         "ch4", "ch5", "ch6", "ch7",
1339                                         "ch8", "ch9", "ch10", "ch11",
1340                                         "ch12", "ch13", "ch14", "ch15";
1341                         clocks = <&cpg CPG_MOD 217>;
1342                         clock-names = "fck";
1343                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1344                         resets = <&cpg 217>;
1345                         #dma-cells = <1>;
1346                         dma-channels = <16>;
1347                         iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
1348                                <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
1349                                <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
1350                                <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
1351                                <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
1352                                <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
1353                                <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
1354                                <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
1355                 };
1356
1357                 audma0: dma-controller@ec700000 {
1358                         compatible = "renesas,dmac-r8a7796",
1359                                      "renesas,rcar-dmac";
1360                         reg = <0 0xec700000 0 0x10000>;
1361                         interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
1362                                       GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
1363                                       GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
1364                                       GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
1365                                       GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
1366                                       GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
1367                                       GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
1368                                       GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
1369                                       GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
1370                                       GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
1371                                       GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
1372                                       GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
1373                                       GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
1374                                       GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
1375                                       GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
1376                                       GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
1377                                       GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
1378                         interrupt-names = "error",
1379                                         "ch0", "ch1", "ch2", "ch3",
1380                                         "ch4", "ch5", "ch6", "ch7",
1381                                         "ch8", "ch9", "ch10", "ch11",
1382                                         "ch12", "ch13", "ch14", "ch15";
1383                         clocks = <&cpg CPG_MOD 502>;
1384                         clock-names = "fck";
1385                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1386                         resets = <&cpg 502>;
1387                         #dma-cells = <1>;
1388                         dma-channels = <16>;
1389                         iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
1390                                <&ipmmu_mp 2>, <&ipmmu_mp 3>,
1391                                <&ipmmu_mp 4>, <&ipmmu_mp 5>,
1392                                <&ipmmu_mp 6>, <&ipmmu_mp 7>,
1393                                <&ipmmu_mp 8>, <&ipmmu_mp 9>,
1394                                <&ipmmu_mp 10>, <&ipmmu_mp 11>,
1395                                <&ipmmu_mp 12>, <&ipmmu_mp 13>,
1396                                <&ipmmu_mp 14>, <&ipmmu_mp 15>;
1397                 };
1398
1399                 audma1: dma-controller@ec720000 {
1400                         compatible = "renesas,dmac-r8a7796",
1401                                      "renesas,rcar-dmac";
1402                         reg = <0 0xec720000 0 0x10000>;
1403                         interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
1404                                       GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
1405                                       GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
1406                                       GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
1407                                       GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
1408                                       GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
1409                                       GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
1410                                       GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
1411                                       GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
1412                                       GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
1413                                       GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
1414                                       GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
1415                                       GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
1416                                       GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
1417                                       GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
1418                                       GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
1419                                       GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
1420                         interrupt-names = "error",
1421                                         "ch0", "ch1", "ch2", "ch3",
1422                                         "ch4", "ch5", "ch6", "ch7",
1423                                         "ch8", "ch9", "ch10", "ch11",
1424                                         "ch12", "ch13", "ch14", "ch15";
1425                         clocks = <&cpg CPG_MOD 501>;
1426                         clock-names = "fck";
1427                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1428                         resets = <&cpg 501>;
1429                         #dma-cells = <1>;
1430                         dma-channels = <16>;
1431                         iommus = <&ipmmu_mp 16>, <&ipmmu_mp 17>,
1432                                <&ipmmu_mp 18>, <&ipmmu_mp 19>,
1433                                <&ipmmu_mp 20>, <&ipmmu_mp 21>,
1434                                <&ipmmu_mp 22>, <&ipmmu_mp 23>,
1435                                <&ipmmu_mp 24>, <&ipmmu_mp 25>,
1436                                <&ipmmu_mp 26>, <&ipmmu_mp 27>,
1437                                <&ipmmu_mp 28>, <&ipmmu_mp 29>,
1438                                <&ipmmu_mp 30>, <&ipmmu_mp 31>;
1439                 };
1440
1441                 usb_dmac0: dma-controller@e65a0000 {
1442                         compatible = "renesas,r8a7796-usb-dmac",
1443                                      "renesas,usb-dmac";
1444                         reg = <0 0xe65a0000 0 0x100>;
1445                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
1446                                       GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
1447                         interrupt-names = "ch0", "ch1";
1448                         clocks = <&cpg CPG_MOD 330>;
1449                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1450                         resets = <&cpg 330>;
1451                         #dma-cells = <1>;
1452                         dma-channels = <2>;
1453                 };
1454
1455                 usb_dmac1: dma-controller@e65b0000 {
1456                         compatible = "renesas,r8a7796-usb-dmac",
1457                                      "renesas,usb-dmac";
1458                         reg = <0 0xe65b0000 0 0x100>;
1459                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
1460                                       GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
1461                         interrupt-names = "ch0", "ch1";
1462                         clocks = <&cpg CPG_MOD 331>;
1463                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1464                         resets = <&cpg 331>;
1465                         #dma-cells = <1>;
1466                         dma-channels = <2>;
1467                 };
1468
1469                 hsusb: usb@e6590000 {
1470                         compatible = "renesas,usbhs-r8a7796",
1471                                      "renesas,rcar-gen3-usbhs";
1472                         reg = <0 0xe6590000 0 0x100>;
1473                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
1474                         clocks = <&cpg CPG_MOD 704>;
1475                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
1476                                <&usb_dmac1 0>, <&usb_dmac1 1>;
1477                         dma-names = "ch0", "ch1", "ch2", "ch3";
1478                         renesas,buswait = <11>;
1479                         phys = <&usb2_phy0>;
1480                         phy-names = "usb";
1481                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1482                         resets = <&cpg 704>;
1483                         status = "disabled";
1484                 };
1485
1486                 usb3_phy0: usb-phy@e65ee000 {
1487                         compatible = "renesas,r8a7796-usb3-phy",
1488                                      "renesas,rcar-gen3-usb3-phy";
1489                         reg = <0 0xe65ee000 0 0x90>;
1490                         clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
1491                                  <&usb_extal_clk>;
1492                         clock-names = "usb3-if", "usb3s_clk", "usb_extal";
1493                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1494                         resets = <&cpg 328>;
1495                         #phy-cells = <0>;
1496                         status = "disabled";
1497                 };
1498
1499                 xhci0: usb@ee000000 {
1500                         compatible = "renesas,xhci-r8a7796",
1501                                      "renesas,rcar-gen3-xhci";
1502                         reg = <0 0xee000000 0 0xc00>;
1503                         interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1504                         clocks = <&cpg CPG_MOD 328>;
1505                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1506                         resets = <&cpg 328>;
1507                         status = "disabled";
1508                 };
1509
1510                 usb3_peri0: usb@ee020000 {
1511                         compatible = "renesas,r8a7796-usb3-peri",
1512                                      "renesas,rcar-gen3-usb3-peri";
1513                         reg = <0 0xee020000 0 0x400>;
1514                         interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
1515                         clocks = <&cpg CPG_MOD 328>;
1516                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1517                         resets = <&cpg 328>;
1518                         status = "disabled";
1519                 };
1520
1521                 ohci0: usb@ee080000 {
1522                         compatible = "generic-ohci";
1523                         reg = <0 0xee080000 0 0x100>;
1524                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1525                         clocks = <&cpg CPG_MOD 703>;
1526                         phys = <&usb2_phy0>;
1527                         phy-names = "usb";
1528                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1529                         resets = <&cpg 703>;
1530                         status = "disabled";
1531                 };
1532
1533                 ehci0: usb@ee080100 {
1534                         compatible = "generic-ehci";
1535                         reg = <0 0xee080100 0 0x100>;
1536                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1537                         clocks = <&cpg CPG_MOD 703>;
1538                         phys = <&usb2_phy0>;
1539                         phy-names = "usb";
1540                         companion= <&ohci0>;
1541                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1542                         resets = <&cpg 703>;
1543                         status = "disabled";
1544                 };
1545
1546                 usb2_phy0: usb-phy@ee080200 {
1547                         compatible = "renesas,usb2-phy-r8a7796",
1548                                      "renesas,rcar-gen3-usb2-phy";
1549                         reg = <0 0xee080200 0 0x700>;
1550                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1551                         clocks = <&cpg CPG_MOD 703>;
1552                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1553                         resets = <&cpg 703>;
1554                         #phy-cells = <0>;
1555                         status = "disabled";
1556                 };
1557
1558                 ohci1: usb@ee0a0000 {
1559                         compatible = "generic-ohci";
1560                         reg = <0 0xee0a0000 0 0x100>;
1561                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1562                         clocks = <&cpg CPG_MOD 702>;
1563                         phys = <&usb2_phy1>;
1564                         phy-names = "usb";
1565                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1566                         resets = <&cpg 702>;
1567                         status = "disabled";
1568                 };
1569
1570                 ehci1: usb@ee0a0100 {
1571                         compatible = "generic-ehci";
1572                         reg = <0 0xee0a0100 0 0x100>;
1573                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1574                         clocks = <&cpg CPG_MOD 702>;
1575                         phys = <&usb2_phy1>;
1576                         phy-names = "usb";
1577                         companion= <&ohci1>;
1578                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1579                         resets = <&cpg 702>;
1580                         status = "disabled";
1581                 };
1582
1583                 usb2_phy1: usb-phy@ee0a0200 {
1584                         compatible = "renesas,usb2-phy-r8a7796",
1585                                      "renesas,rcar-gen3-usb2-phy";
1586                         reg = <0 0xee0a0200 0 0x700>;
1587                         clocks = <&cpg CPG_MOD 702>;
1588                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1589                         resets = <&cpg 702>;
1590                         #phy-cells = <0>;
1591                         status = "disabled";
1592                 };
1593
1594                 sdhi0: sd@ee100000 {
1595                         compatible = "renesas,sdhi-r8a7796",
1596                                      "renesas,rcar-gen3-sdhi";
1597                         reg = <0 0xee100000 0 0x2000>;
1598                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1599                         clocks = <&cpg CPG_MOD 314>;
1600                         max-frequency = <200000000>;
1601                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1602                         resets = <&cpg 314>;
1603                         status = "disabled";
1604                 };
1605
1606                 sdhi1: sd@ee120000 {
1607                         compatible = "renesas,sdhi-r8a7796",
1608                                      "renesas,rcar-gen3-sdhi";
1609                         reg = <0 0xee120000 0 0x2000>;
1610                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1611                         clocks = <&cpg CPG_MOD 313>;
1612                         max-frequency = <200000000>;
1613                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1614                         resets = <&cpg 313>;
1615                         status = "disabled";
1616                 };
1617
1618                 sdhi2: sd@ee140000 {
1619                         compatible = "renesas,sdhi-r8a7796",
1620                                      "renesas,rcar-gen3-sdhi";
1621                         reg = <0 0xee140000 0 0x2000>;
1622                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1623                         clocks = <&cpg CPG_MOD 312>;
1624                         max-frequency = <200000000>;
1625                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1626                         resets = <&cpg 312>;
1627                         status = "disabled";
1628                 };
1629
1630                 sdhi3: sd@ee160000 {
1631                         compatible = "renesas,sdhi-r8a7796",
1632                                      "renesas,rcar-gen3-sdhi";
1633                         reg = <0 0xee160000 0 0x2000>;
1634                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1635                         clocks = <&cpg CPG_MOD 311>;
1636                         max-frequency = <200000000>;
1637                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1638                         resets = <&cpg 311>;
1639                         status = "disabled";
1640                 };
1641
1642                 tsc: thermal@e6198000 {
1643                         compatible = "renesas,r8a7796-thermal";
1644                         reg = <0 0xe6198000 0 0x100>,
1645                               <0 0xe61a0000 0 0x100>,
1646                               <0 0xe61a8000 0 0x100>;
1647                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
1648                                      <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
1649                                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
1650                         clocks = <&cpg CPG_MOD 522>;
1651                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1652                         resets = <&cpg 522>;
1653                         #thermal-sensor-cells = <1>;
1654                         status = "okay";
1655                 };
1656
1657                 rcar_sound: sound@ec500000 {
1658                         /*
1659                          * #sound-dai-cells is required
1660                          *
1661                          * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1662                          * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1663                          */
1664                         /*
1665                          * #clock-cells is required for audio_clkout0/1/2/3
1666                          *
1667                          * clkout       : #clock-cells = <0>;   <&rcar_sound>;
1668                          * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
1669                          */
1670                         compatible =  "renesas,rcar_sound-r8a7796", "renesas,rcar_sound-gen3";
1671                         reg =   <0 0xec500000 0 0x1000>, /* SCU */
1672                                 <0 0xec5a0000 0 0x100>,  /* ADG */
1673                                 <0 0xec540000 0 0x1000>, /* SSIU */
1674                                 <0 0xec541000 0 0x280>,  /* SSI */
1675                                 <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
1676                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1677
1678                         clocks = <&cpg CPG_MOD 1005>,
1679                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1680                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1681                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1682                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1683                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1684                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1685                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1686                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1687                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1688                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1689                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1690                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1691                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1692                                  <&audio_clk_a>, <&audio_clk_b>,
1693                                  <&audio_clk_c>,
1694                                  <&cpg CPG_CORE R8A7796_CLK_S0D4>;
1695                         clock-names = "ssi-all",
1696                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1697                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1698                                       "ssi.1", "ssi.0",
1699                                       "src.9", "src.8", "src.7", "src.6",
1700                                       "src.5", "src.4", "src.3", "src.2",
1701                                       "src.1", "src.0",
1702                                       "mix.1", "mix.0",
1703                                       "ctu.1", "ctu.0",
1704                                       "dvc.0", "dvc.1",
1705                                       "clk_a", "clk_b", "clk_c", "clk_i";
1706                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1707                         resets = <&cpg 1005>,
1708                                  <&cpg 1006>, <&cpg 1007>,
1709                                  <&cpg 1008>, <&cpg 1009>,
1710                                  <&cpg 1010>, <&cpg 1011>,
1711                                  <&cpg 1012>, <&cpg 1013>,
1712                                  <&cpg 1014>, <&cpg 1015>;
1713                         reset-names = "ssi-all",
1714                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1715                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1716                                       "ssi.1", "ssi.0";
1717                         status = "disabled";
1718
1719                         rcar_sound,dvc {
1720                                 dvc0: dvc-0 {
1721                                         dmas = <&audma1 0xbc>;
1722                                         dma-names = "tx";
1723                                 };
1724                                 dvc1: dvc-1 {
1725                                         dmas = <&audma1 0xbe>;
1726                                         dma-names = "tx";
1727                                 };
1728                         };
1729
1730                         rcar_sound,mix {
1731                                 mix0: mix-0 { };
1732                                 mix1: mix-1 { };
1733                         };
1734
1735                         rcar_sound,ctu {
1736                                 ctu00: ctu-0 { };
1737                                 ctu01: ctu-1 { };
1738                                 ctu02: ctu-2 { };
1739                                 ctu03: ctu-3 { };
1740                                 ctu10: ctu-4 { };
1741                                 ctu11: ctu-5 { };
1742                                 ctu12: ctu-6 { };
1743                                 ctu13: ctu-7 { };
1744                         };
1745
1746                         rcar_sound,src {
1747                                 src0: src-0 {
1748                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1749                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
1750                                         dma-names = "rx", "tx";
1751                                 };
1752                                 src1: src-1 {
1753                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1754                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
1755                                         dma-names = "rx", "tx";
1756                                 };
1757                                 src2: src-2 {
1758                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1759                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
1760                                         dma-names = "rx", "tx";
1761                                 };
1762                                 src3: src-3 {
1763                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1764                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1765                                         dma-names = "rx", "tx";
1766                                 };
1767                                 src4: src-4 {
1768                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1769                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1770                                         dma-names = "rx", "tx";
1771                                 };
1772                                 src5: src-5 {
1773                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1774                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1775                                         dma-names = "rx", "tx";
1776                                 };
1777                                 src6: src-6 {
1778                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1779                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
1780                                         dma-names = "rx", "tx";
1781                                 };
1782                                 src7: src-7 {
1783                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1784                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
1785                                         dma-names = "rx", "tx";
1786                                 };
1787                                 src8: src-8 {
1788                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1789                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
1790                                         dma-names = "rx", "tx";
1791                                 };
1792                                 src9: src-9 {
1793                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1794                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
1795                                         dma-names = "rx", "tx";
1796                                 };
1797                         };
1798
1799                         rcar_sound,ssi {
1800                                 ssi0: ssi-0 {
1801                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1802                                         dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1803                                         dma-names = "rx", "tx", "rxu", "txu";
1804                                 };
1805                                 ssi1: ssi-1 {
1806                                         interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1807                                         dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1808                                         dma-names = "rx", "tx", "rxu", "txu";
1809                                 };
1810                                 ssi2: ssi-2 {
1811                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1812                                         dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1813                                         dma-names = "rx", "tx", "rxu", "txu";
1814                                 };
1815                                 ssi3: ssi-3 {
1816                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1817                                         dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1818                                         dma-names = "rx", "tx", "rxu", "txu";
1819                                 };
1820                                 ssi4: ssi-4 {
1821                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1822                                         dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1823                                         dma-names = "rx", "tx", "rxu", "txu";
1824                                 };
1825                                 ssi5: ssi-5 {
1826                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1827                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1828                                         dma-names = "rx", "tx", "rxu", "txu";
1829                                 };
1830                                 ssi6: ssi-6 {
1831                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1832                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1833                                         dma-names = "rx", "tx", "rxu", "txu";
1834                                 };
1835                                 ssi7: ssi-7 {
1836                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1837                                         dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1838                                         dma-names = "rx", "tx", "rxu", "txu";
1839                                 };
1840                                 ssi8: ssi-8 {
1841                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1842                                         dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1843                                         dma-names = "rx", "tx", "rxu", "txu";
1844                                 };
1845                                 ssi9: ssi-9 {
1846                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1847                                         dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1848                                         dma-names = "rx", "tx", "rxu", "txu";
1849                                 };
1850                         };
1851                 };
1852
1853                 pciec0: pcie@fe000000 {
1854                         reg = <0 0xfe000000 0 0x80000>;
1855                         /* placeholder */
1856                 };
1857
1858                 pciec1: pcie@ee800000 {
1859                         reg = <0 0xee800000 0 0x80000>;
1860                         /* placeholder */
1861                 };
1862
1863                 fdp1@fe940000 {
1864                         compatible = "renesas,fdp1";
1865                         reg = <0 0xfe940000 0 0x2400>;
1866                         interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
1867                         clocks = <&cpg CPG_MOD 119>;
1868                         power-domains = <&sysc R8A7796_PD_A3VC>;
1869                         resets = <&cpg 119>;
1870                         renesas,fcp = <&fcpf0>;
1871                 };
1872
1873                 fcpf0: fcp@fe950000 {
1874                         compatible = "renesas,fcpf";
1875                         reg = <0 0xfe950000 0 0x200>;
1876                         clocks = <&cpg CPG_MOD 615>;
1877                         power-domains = <&sysc R8A7796_PD_A3VC>;
1878                         resets = <&cpg 615>;
1879                 };
1880
1881                 vspb: vsp@fe960000 {
1882                         compatible = "renesas,vsp2";
1883                         reg = <0 0xfe960000 0 0x8000>;
1884                         interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1885                         clocks = <&cpg CPG_MOD 626>;
1886                         power-domains = <&sysc R8A7796_PD_A3VC>;
1887                         resets = <&cpg 626>;
1888
1889                         renesas,fcp = <&fcpvb0>;
1890                 };
1891
1892                 fcpvb0: fcp@fe96f000 {
1893                         compatible = "renesas,fcpv";
1894                         reg = <0 0xfe96f000 0 0x200>;
1895                         clocks = <&cpg CPG_MOD 607>;
1896                         power-domains = <&sysc R8A7796_PD_A3VC>;
1897                         resets = <&cpg 607>;
1898                 };
1899
1900                 vspi0: vsp@fe9a0000 {
1901                         compatible = "renesas,vsp2";
1902                         reg = <0 0xfe9a0000 0 0x8000>;
1903                         interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
1904                         clocks = <&cpg CPG_MOD 631>;
1905                         power-domains = <&sysc R8A7796_PD_A3VC>;
1906                         resets = <&cpg 631>;
1907
1908                         renesas,fcp = <&fcpvi0>;
1909                 };
1910
1911                 fcpvi0: fcp@fe9af000 {
1912                         compatible = "renesas,fcpv";
1913                         reg = <0 0xfe9af000 0 0x200>;
1914                         clocks = <&cpg CPG_MOD 611>;
1915                         power-domains = <&sysc R8A7796_PD_A3VC>;
1916                         resets = <&cpg 611>;
1917                         iommus = <&ipmmu_vc0 19>;
1918                 };
1919
1920                 vspd0: vsp@fea20000 {
1921                         compatible = "renesas,vsp2";
1922                         reg = <0 0xfea20000 0 0x8000>;
1923                         interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
1924                         clocks = <&cpg CPG_MOD 623>;
1925                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1926                         resets = <&cpg 623>;
1927
1928                         renesas,fcp = <&fcpvd0>;
1929                 };
1930
1931                 fcpvd0: fcp@fea27000 {
1932                         compatible = "renesas,fcpv";
1933                         reg = <0 0xfea27000 0 0x200>;
1934                         clocks = <&cpg CPG_MOD 603>;
1935                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1936                         resets = <&cpg 603>;
1937                         iommus = <&ipmmu_vi0 8>;
1938                 };
1939
1940                 vspd1: vsp@fea28000 {
1941                         compatible = "renesas,vsp2";
1942                         reg = <0 0xfea28000 0 0x8000>;
1943                         interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
1944                         clocks = <&cpg CPG_MOD 622>;
1945                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1946                         resets = <&cpg 622>;
1947
1948                         renesas,fcp = <&fcpvd1>;
1949                 };
1950
1951                 fcpvd1: fcp@fea2f000 {
1952                         compatible = "renesas,fcpv";
1953                         reg = <0 0xfea2f000 0 0x200>;
1954                         clocks = <&cpg CPG_MOD 602>;
1955                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1956                         resets = <&cpg 602>;
1957                         iommus = <&ipmmu_vi0 9>;
1958                 };
1959
1960                 vspd2: vsp@fea30000 {
1961                         compatible = "renesas,vsp2";
1962                         reg = <0 0xfea30000 0 0x8000>;
1963                         interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
1964                         clocks = <&cpg CPG_MOD 621>;
1965                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1966                         resets = <&cpg 621>;
1967
1968                         renesas,fcp = <&fcpvd2>;
1969                 };
1970
1971                 fcpvd2: fcp@fea37000 {
1972                         compatible = "renesas,fcpv";
1973                         reg = <0 0xfea37000 0 0x200>;
1974                         clocks = <&cpg CPG_MOD 601>;
1975                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1976                         resets = <&cpg 601>;
1977                         iommus = <&ipmmu_vi0 10>;
1978                 };
1979
1980                 hdmi0: hdmi@fead0000 {
1981                         compatible = "renesas,r8a7796-hdmi", "renesas,rcar-gen3-hdmi";
1982                         reg = <0 0xfead0000 0 0x10000>;
1983                         interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
1984                         clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7796_CLK_HDMI>;
1985                         clock-names = "iahb", "isfr";
1986                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1987                         resets = <&cpg 729>;
1988                         status = "disabled";
1989
1990                         ports {
1991                                 #address-cells = <1>;
1992                                 #size-cells = <0>;
1993                                 port@0 {
1994                                         reg = <0>;
1995                                         dw_hdmi0_in: endpoint {
1996                                                 remote-endpoint = <&du_out_hdmi0>;
1997                                         };
1998                                 };
1999                                 port@1 {
2000                                         reg = <1>;
2001                                 };
2002                         };
2003                 };
2004
2005                 du: display@feb00000 {
2006                         compatible = "renesas,du-r8a7796";
2007                         reg = <0 0xfeb00000 0 0x70000>,
2008                               <0 0xfeb90000 0 0x14>;
2009                         reg-names = "du", "lvds.0";
2010                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2011                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
2012                                      <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
2013                         clocks = <&cpg CPG_MOD 724>,
2014                                  <&cpg CPG_MOD 723>,
2015                                  <&cpg CPG_MOD 722>,
2016                                  <&cpg CPG_MOD 727>;
2017                         clock-names = "du.0", "du.1", "du.2", "lvds.0";
2018                         status = "disabled";
2019
2020                         vsps = <&vspd0 &vspd1 &vspd2>;
2021
2022                         ports {
2023                                 #address-cells = <1>;
2024                                 #size-cells = <0>;
2025
2026                                 port@0 {
2027                                         reg = <0>;
2028                                         du_out_rgb: endpoint {
2029                                         };
2030                                 };
2031                                 port@1 {
2032                                         reg = <1>;
2033                                         du_out_hdmi0: endpoint {
2034                                                 remote-endpoint = <&dw_hdmi0_in>;
2035                                         };
2036                                 };
2037                                 port@2 {
2038                                         reg = <2>;
2039                                         du_out_lvds0: endpoint {
2040                                         };
2041                                 };
2042                         };
2043                 };
2044
2045                 imr-lx4@fe860000 {
2046                         compatible = "renesas,r8a7796-imr-lx4",
2047                                      "renesas,imr-lx4";
2048                         reg = <0 0xfe860000 0 0x2000>;
2049                         interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
2050                         clocks = <&cpg CPG_MOD 823>;
2051                         power-domains = <&sysc R8A7796_PD_A3VC>;
2052                         resets = <&cpg 823>;
2053                 };
2054
2055                 imr-lx4@fe870000 {
2056                         compatible = "renesas,r8a7796-imr-lx4",
2057                                      "renesas,imr-lx4";
2058                         reg = <0 0xfe870000 0 0x2000>;
2059                         interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
2060                         clocks = <&cpg CPG_MOD 822>;
2061                         power-domains = <&sysc R8A7796_PD_A3VC>;
2062                         resets = <&cpg 822>;
2063                 };
2064         };
2065
2066         timer {
2067                 compatible = "arm,armv8-timer";
2068                 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
2069                                       <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
2070                                       <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
2071                                       <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
2072         };
2073
2074         thermal-zones {
2075                 sensor_thermal1: sensor-thermal1 {
2076                         polling-delay-passive = <250>;
2077                         polling-delay = <1000>;
2078                         thermal-sensors = <&tsc 0>;
2079
2080                         trips {
2081                                 sensor1_passive: sensor1-passive {
2082                                         temperature = <95000>;
2083                                         hysteresis = <2000>;
2084                                         type = "passive";
2085                                 };
2086                                 sensor1_crit: sensor1-crit {
2087                                         temperature = <120000>;
2088                                         hysteresis = <2000>;
2089                                         type = "critical";
2090                                 };
2091                         };
2092
2093                         cooling-maps {
2094                                 map0 {
2095                                         trip = <&sensor1_passive>;
2096                                         cooling-device = <&a57_0 5 5>;
2097                                 };
2098                         };
2099                 };
2100
2101                 sensor_thermal2: sensor-thermal2 {
2102                         polling-delay-passive = <250>;
2103                         polling-delay = <1000>;
2104                         thermal-sensors = <&tsc 1>;
2105
2106                         trips {
2107                                 sensor2_passive: sensor2-passive {
2108                                         temperature = <95000>;
2109                                         hysteresis = <2000>;
2110                                         type = "passive";
2111                                 };
2112                                 sensor2_crit: sensor2-crit {
2113                                         temperature = <120000>;
2114                                         hysteresis = <2000>;
2115                                         type = "critical";
2116                                 };
2117                         };
2118
2119                         cooling-maps {
2120                                 map0 {
2121                                         trip = <&sensor2_passive>;
2122                                         cooling-device = <&a57_0 5 5>;
2123                                 };
2124                         };
2125                 };
2126
2127                 sensor_thermal3: sensor-thermal3 {
2128                         polling-delay-passive = <250>;
2129                         polling-delay = <1000>;
2130                         thermal-sensors = <&tsc 2>;
2131
2132                         trips {
2133                                 sensor3_passive: sensor3-passive {
2134                                         temperature = <95000>;
2135                                         hysteresis = <2000>;
2136                                         type = "passive";
2137                                 };
2138                                 sensor3_crit: sensor3-crit {
2139                                         temperature = <120000>;
2140                                         hysteresis = <2000>;
2141                                         type = "critical";
2142                                 };
2143                         };
2144
2145                         cooling-maps {
2146                                 map0 {
2147                                         trip = <&sensor3_passive>;
2148                                         cooling-device = <&a57_0 5 5>;
2149                                 };
2150                         };
2151                 };
2152         };
2153
2154         /* External USB clocks - can be overridden by the board */
2155         usb3s0_clk: usb3s0 {
2156                 compatible = "fixed-clock";
2157                 #clock-cells = <0>;
2158                 clock-frequency = <0>;
2159         };
2160
2161         usb_extal_clk: usb_extal {
2162                 compatible = "fixed-clock";
2163                 #clock-cells = <0>;
2164                 clock-frequency = <0>;
2165         };
2166 };