arch/arm64/boot/dts/renesas/r8a7796.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the R-Car M3-W (R8A77960) SoC
   4  *
   5  * Copyright (C) 2016-2017 Renesas Electronics Corp.
   6  */
   7
   8 #include <dt-bindings/clock/r8a7796-cpg-mssr.h>
   9 #include <dt-bindings/interrupt-controller/arm-gic.h>
  10 #include <dt-bindings/power/r8a7796-sysc.h>
  11
  12 #define CPG_AUDIO_CLK_I         R8A7796_CLK_S0D4
  13
  14 / {
  15         compatible = "renesas,r8a7796";
  16         #address-cells = <2>;
  17         #size-cells = <2>;
  18
  19         aliases {
  20                 i2c0 = &i2c0;
  21                 i2c1 = &i2c1;
  22                 i2c2 = &i2c2;
  23                 i2c3 = &i2c3;
  24                 i2c4 = &i2c4;
  25                 i2c5 = &i2c5;
  26                 i2c6 = &i2c6;
  27                 i2c7 = &i2c_dvfs;
  28         };
  29
  30         /*
  31          * The external audio clocks are configured as 0 Hz fixed frequency
  32          * clocks by default.
  33          * Boards that provide audio clocks should override them.
  34          */
  35         audio_clk_a: audio_clk_a {
  36                 compatible = "fixed-clock";
  37                 #clock-cells = <0>;
  38                 clock-frequency = <0>;
  39         };
  40
  41         audio_clk_b: audio_clk_b {
  42                 compatible = "fixed-clock";
  43                 #clock-cells = <0>;
  44                 clock-frequency = <0>;
  45         };
  46
  47         audio_clk_c: audio_clk_c {
  48                 compatible = "fixed-clock";
  49                 #clock-cells = <0>;
  50                 clock-frequency = <0>;
  51         };
  52
  53         /* External CAN clock - to be overridden by boards that provide it */
  54         can_clk: can {
  55                 compatible = "fixed-clock";
  56                 #clock-cells = <0>;
  57                 clock-frequency = <0>;
  58         };
  59
  60         cluster0_opp: opp_table0 {
  61                 compatible = "operating-points-v2";
  62                 opp-shared;
  63
  64                 opp-500000000 {
  65                         opp-hz = /bits/ 64 <500000000>;
  66                         opp-microvolt = <820000>;
  67                         clock-latency-ns = <300000>;
  68                 };
  69                 opp-1000000000 {
  70                         opp-hz = /bits/ 64 <1000000000>;
  71                         opp-microvolt = <820000>;
  72                         clock-latency-ns = <300000>;
  73                 };
  74                 opp-1500000000 {
  75                         opp-hz = /bits/ 64 <1500000000>;
  76                         opp-microvolt = <820000>;
  77                         clock-latency-ns = <300000>;
  78                 };
  79                 opp-1600000000 {
  80                         opp-hz = /bits/ 64 <1600000000>;
  81                         opp-microvolt = <900000>;
  82                         clock-latency-ns = <300000>;
  83                         turbo-mode;
  84                 };
  85                 opp-1700000000 {
  86                         opp-hz = /bits/ 64 <1700000000>;
  87                         opp-microvolt = <900000>;
  88                         clock-latency-ns = <300000>;
  89                         turbo-mode;
  90                 };
  91                 opp-1800000000 {
  92                         opp-hz = /bits/ 64 <1800000000>;
  93                         opp-microvolt = <960000>;
  94                         clock-latency-ns = <300000>;
  95                         turbo-mode;
  96                 };
  97         };
  98
  99         cluster1_opp: opp_table1 {
 100                 compatible = "operating-points-v2";
 101                 opp-shared;
 102
 103                 opp-800000000 {
 104                         opp-hz = /bits/ 64 <800000000>;
 105                         opp-microvolt = <820000>;
 106                         clock-latency-ns = <300000>;
 107                 };
 108                 opp-1000000000 {
 109                         opp-hz = /bits/ 64 <1000000000>;
 110                         opp-microvolt = <820000>;
 111                         clock-latency-ns = <300000>;
 112                 };
 113                 opp-1200000000 {
 114                         opp-hz = /bits/ 64 <1200000000>;
 115                         opp-microvolt = <820000>;
 116                         clock-latency-ns = <300000>;
 117                 };
 118                 opp-1300000000 {
 119                         opp-hz = /bits/ 64 <1300000000>;
 120                         opp-microvolt = <820000>;
 121                         clock-latency-ns = <300000>;
 122                         turbo-mode;
 123                 };
 124         };
 125
 126         cpus {
 127                 #address-cells = <1>;
 128                 #size-cells = <0>;
 129
 130                 a57_0: cpu@0 {
 131                         compatible = "arm,cortex-a57", "arm,armv8";
 132                         reg = <0x0>;
 133                         device_type = "cpu";
 134                         power-domains = <&sysc R8A7796_PD_CA57_CPU0>;
 135                         next-level-cache = <&L2_CA57>;
 136                         enable-method = "psci";
 137                         clocks = <&cpg CPG_CORE R8A7796_CLK_Z>;
 138                         operating-points-v2 = <&cluster0_opp>;
 139                         #cooling-cells = <2>;
 140                 };
 141
 142                 a57_1: cpu@1 {
 143                         compatible = "arm,cortex-a57", "arm,armv8";
 144                         reg = <0x1>;
 145                         device_type = "cpu";
 146                         power-domains = <&sysc R8A7796_PD_CA57_CPU1>;
 147                         next-level-cache = <&L2_CA57>;
 148                         enable-method = "psci";
 149                         clocks = <&cpg CPG_CORE R8A7796_CLK_Z>;
 150                         operating-points-v2 = <&cluster0_opp>;
 151                         #cooling-cells = <2>;
 152                 };
 153
 154                 a53_0: cpu@100 {
 155                         compatible = "arm,cortex-a53", "arm,armv8";
 156                         reg = <0x100>;
 157                         device_type = "cpu";
 158                         power-domains = <&sysc R8A7796_PD_CA53_CPU0>;
 159                         next-level-cache = <&L2_CA53>;
 160                         enable-method = "psci";
 161                         clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
 162                         operating-points-v2 = <&cluster1_opp>;
 163                 };
 164
 165                 a53_1: cpu@101 {
 166                         compatible = "arm,cortex-a53", "arm,armv8";
 167                         reg = <0x101>;
 168                         device_type = "cpu";
 169                         power-domains = <&sysc R8A7796_PD_CA53_CPU1>;
 170                         next-level-cache = <&L2_CA53>;
 171                         enable-method = "psci";
 172                         clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
 173                         operating-points-v2 = <&cluster1_opp>;
 174                 };
 175
 176                 a53_2: cpu@102 {
 177                         compatible = "arm,cortex-a53", "arm,armv8";
 178                         reg = <0x102>;
 179                         device_type = "cpu";
 180                         power-domains = <&sysc R8A7796_PD_CA53_CPU2>;
 181                         next-level-cache = <&L2_CA53>;
 182                         enable-method = "psci";
 183                         clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
 184                         operating-points-v2 = <&cluster1_opp>;
 185                 };
 186
 187                 a53_3: cpu@103 {
 188                         compatible = "arm,cortex-a53", "arm,armv8";
 189                         reg = <0x103>;
 190                         device_type = "cpu";
 191                         power-domains = <&sysc R8A7796_PD_CA53_CPU3>;
 192                         next-level-cache = <&L2_CA53>;
 193                         enable-method = "psci";
 194                         clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
 195                         operating-points-v2 = <&cluster1_opp>;
 196                 };
 197
 198                 L2_CA57: cache-controller-0 {
 199                         compatible = "cache";
 200                         power-domains = <&sysc R8A7796_PD_CA57_SCU>;
 201                         cache-unified;
 202                         cache-level = <2>;
 203                 };
 204
 205                 L2_CA53: cache-controller-1 {
 206                         compatible = "cache";
 207                         power-domains = <&sysc R8A7796_PD_CA53_SCU>;
 208                         cache-unified;
 209                         cache-level = <2>;
 210                 };
 211         };
 212
 213         extal_clk: extal {
 214                 compatible = "fixed-clock";
 215                 #clock-cells = <0>;
 216                 /* This value must be overridden by the board */
 217                 clock-frequency = <0>;
 218         };
 219
 220         extalr_clk: extalr {
 221                 compatible = "fixed-clock";
 222                 #clock-cells = <0>;
 223                 /* This value must be overridden by the board */
 224                 clock-frequency = <0>;
 225         };
 226
 227         /* External PCIe clock - can be overridden by the board */
 228         pcie_bus_clk: pcie_bus {
 229                 compatible = "fixed-clock";
 230                 #clock-cells = <0>;
 231                 clock-frequency = <0>;
 232         };
 233
 234         pmu_a53 {
 235                 compatible = "arm,cortex-a53-pmu";
 236                 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
 237                                       <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
 238                                       <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
 239                                       <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
 240                 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>;
 241         };
 242
 243         pmu_a57 {
 244                 compatible = "arm,cortex-a57-pmu";
 245                 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 246                                       <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 247                 interrupt-affinity = <&a57_0>, <&a57_1>;
 248         };
 249
 250         psci {
 251                 compatible = "arm,psci-1.0", "arm,psci-0.2";
 252                 method = "smc";
 253         };
 254
 255         /* External SCIF clock - to be overridden by boards that provide it */
 256         scif_clk: scif {
 257                 compatible = "fixed-clock";
 258                 #clock-cells = <0>;
 259                 clock-frequency = <0>;
 260         };
 261
 262         soc {
 263                 compatible = "simple-bus";
 264                 interrupt-parent = <&gic>;
 265                 #address-cells = <2>;
 266                 #size-cells = <2>;
 267                 ranges;
 268
 269                 rwdt: watchdog@e6020000 {
 270                         compatible = "renesas,r8a7796-wdt",
 271                                      "renesas,rcar-gen3-wdt";
 272                         reg = <0 0xe6020000 0 0x0c>;
 273                         clocks = <&cpg CPG_MOD 402>;
 274                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 275                         resets = <&cpg 402>;
 276                         status = "disabled";
 277                 };
 278
 279                 gpio0: gpio@e6050000 {
 280                         compatible = "renesas,gpio-r8a7796",
 281                                      "renesas,rcar-gen3-gpio";
 282                         reg = <0 0xe6050000 0 0x50>;
 283                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 284                         #gpio-cells = <2>;
 285                         gpio-controller;
 286                         gpio-ranges = <&pfc 0 0 16>;
 287                         #interrupt-cells = <2>;
 288                         interrupt-controller;
 289                         clocks = <&cpg CPG_MOD 912>;
 290                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 291                         resets = <&cpg 912>;
 292                 };
 293
 294                 gpio1: gpio@e6051000 {
 295                         compatible = "renesas,gpio-r8a7796",
 296                                      "renesas,rcar-gen3-gpio";
 297                         reg = <0 0xe6051000 0 0x50>;
 298                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 299                         #gpio-cells = <2>;
 300                         gpio-controller;
 301                         gpio-ranges = <&pfc 0 32 29>;
 302                         #interrupt-cells = <2>;
 303                         interrupt-controller;
 304                         clocks = <&cpg CPG_MOD 911>;
 305                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 306                         resets = <&cpg 911>;
 307                 };
 308
 309                 gpio2: gpio@e6052000 {
 310                         compatible = "renesas,gpio-r8a7796",
 311                                      "renesas,rcar-gen3-gpio";
 312                         reg = <0 0xe6052000 0 0x50>;
 313                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 314                         #gpio-cells = <2>;
 315                         gpio-controller;
 316                         gpio-ranges = <&pfc 0 64 15>;
 317                         #interrupt-cells = <2>;
 318                         interrupt-controller;
 319                         clocks = <&cpg CPG_MOD 910>;
 320                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 321                         resets = <&cpg 910>;
 322                 };
 323
 324                 gpio3: gpio@e6053000 {
 325                         compatible = "renesas,gpio-r8a7796",
 326                                      "renesas,rcar-gen3-gpio";
 327                         reg = <0 0xe6053000 0 0x50>;
 328                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 329                         #gpio-cells = <2>;
 330                         gpio-controller;
 331                         gpio-ranges = <&pfc 0 96 16>;
 332                         #interrupt-cells = <2>;
 333                         interrupt-controller;
 334                         clocks = <&cpg CPG_MOD 909>;
 335                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 336                         resets = <&cpg 909>;
 337                 };
 338
 339                 gpio4: gpio@e6054000 {
 340                         compatible = "renesas,gpio-r8a7796",
 341                                      "renesas,rcar-gen3-gpio";
 342                         reg = <0 0xe6054000 0 0x50>;
 343                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 344                         #gpio-cells = <2>;
 345                         gpio-controller;
 346                         gpio-ranges = <&pfc 0 128 18>;
 347                         #interrupt-cells = <2>;
 348                         interrupt-controller;
 349                         clocks = <&cpg CPG_MOD 908>;
 350                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 351                         resets = <&cpg 908>;
 352                 };
 353
 354                 gpio5: gpio@e6055000 {
 355                         compatible = "renesas,gpio-r8a7796",
 356                                      "renesas,rcar-gen3-gpio";
 357                         reg = <0 0xe6055000 0 0x50>;
 358                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 359                         #gpio-cells = <2>;
 360                         gpio-controller;
 361                         gpio-ranges = <&pfc 0 160 26>;
 362                         #interrupt-cells = <2>;
 363                         interrupt-controller;
 364                         clocks = <&cpg CPG_MOD 907>;
 365                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 366                         resets = <&cpg 907>;
 367                 };
 368
 369                 gpio6: gpio@e6055400 {
 370                         compatible = "renesas,gpio-r8a7796",
 371                                      "renesas,rcar-gen3-gpio";
 372                         reg = <0 0xe6055400 0 0x50>;
 373                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 374                         #gpio-cells = <2>;
 375                         gpio-controller;
 376                         gpio-ranges = <&pfc 0 192 32>;
 377                         #interrupt-cells = <2>;
 378                         interrupt-controller;
 379                         clocks = <&cpg CPG_MOD 906>;
 380                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 381                         resets = <&cpg 906>;
 382                 };
 383
 384                 gpio7: gpio@e6055800 {
 385                         compatible = "renesas,gpio-r8a7796",
 386                                      "renesas,rcar-gen3-gpio";
 387                         reg = <0 0xe6055800 0 0x50>;
 388                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 389                         #gpio-cells = <2>;
 390                         gpio-controller;
 391                         gpio-ranges = <&pfc 0 224 4>;
 392                         #interrupt-cells = <2>;
 393                         interrupt-controller;
 394                         clocks = <&cpg CPG_MOD 905>;
 395                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 396                         resets = <&cpg 905>;
 397                 };
 398
 399                 pfc: pin-controller@e6060000 {
 400                         compatible = "renesas,pfc-r8a7796";
 401                         reg = <0 0xe6060000 0 0x50c>;
 402                 };
 403
 404                 cpg: clock-controller@e6150000 {
 405                         compatible = "renesas,r8a7796-cpg-mssr";
 406                         reg = <0 0xe6150000 0 0x1000>;
 407                         clocks = <&extal_clk>, <&extalr_clk>;
 408                         clock-names = "extal", "extalr";
 409                         #clock-cells = <2>;
 410                         #power-domain-cells = <0>;
 411                         #reset-cells = <1>;
 412                 };
 413
 414                 rst: reset-controller@e6160000 {
 415                         compatible = "renesas,r8a7796-rst";
 416                         reg = <0 0xe6160000 0 0x0200>;
 417                 };
 418
 419                 sysc: system-controller@e6180000 {
 420                         compatible = "renesas,r8a7796-sysc";
 421                         reg = <0 0xe6180000 0 0x0400>;
 422                         #power-domain-cells = <1>;
 423                 };
 424
 425                 tsc: thermal@e6198000 {
 426                         compatible = "renesas,r8a7796-thermal";
 427                         reg = <0 0xe6198000 0 0x100>,
 428                               <0 0xe61a0000 0 0x100>,
 429                               <0 0xe61a8000 0 0x100>;
 430                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
 431                                      <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
 432                                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 433                         clocks = <&cpg CPG_MOD 522>;
 434                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 435                         resets = <&cpg 522>;
 436                         #thermal-sensor-cells = <1>;
 437                 };
 438
 439                 intc_ex: interrupt-controller@e61c0000 {
 440                         compatible = "renesas,intc-ex-r8a7796", "renesas,irqc";
 441                         #interrupt-cells = <2>;
 442                         interrupt-controller;
 443                         reg = <0 0xe61c0000 0 0x200>;
 444                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
 445                                       GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
 446                                       GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
 447                                       GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
 448                                       GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
 449                                       GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 450                         clocks = <&cpg CPG_MOD 407>;
 451                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 452                         resets = <&cpg 407>;
 453                 };
 454
 455                 i2c0: i2c@e6500000 {
 456                         #address-cells = <1>;
 457                         #size-cells = <0>;
 458                         compatible = "renesas,i2c-r8a7796",
 459                                      "renesas,rcar-gen3-i2c";
 460                         reg = <0 0xe6500000 0 0x40>;
 461                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 462                         clocks = <&cpg CPG_MOD 931>;
 463                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 464                         resets = <&cpg 931>;
 465                         dmas = <&dmac1 0x91>, <&dmac1 0x90>,
 466                                <&dmac2 0x91>, <&dmac2 0x90>;
 467                         dma-names = "tx", "rx", "tx", "rx";
 468                         i2c-scl-internal-delay-ns = <110>;
 469                         status = "disabled";
 470                 };
 471
 472                 i2c1: i2c@e6508000 {
 473                         #address-cells = <1>;
 474                         #size-cells = <0>;
 475                         compatible = "renesas,i2c-r8a7796",
 476                                      "renesas,rcar-gen3-i2c";
 477                         reg = <0 0xe6508000 0 0x40>;
 478                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 479                         clocks = <&cpg CPG_MOD 930>;
 480                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 481                         resets = <&cpg 930>;
 482                         dmas = <&dmac1 0x93>, <&dmac1 0x92>,
 483                                <&dmac2 0x93>, <&dmac2 0x92>;
 484                         dma-names = "tx", "rx", "tx", "rx";
 485                         i2c-scl-internal-delay-ns = <6>;
 486                         status = "disabled";
 487                 };
 488
 489                 i2c2: i2c@e6510000 {
 490                         #address-cells = <1>;
 491                         #size-cells = <0>;
 492                         compatible = "renesas,i2c-r8a7796",
 493                                      "renesas,rcar-gen3-i2c";
 494                         reg = <0 0xe6510000 0 0x40>;
 495                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 496                         clocks = <&cpg CPG_MOD 929>;
 497                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 498                         resets = <&cpg 929>;
 499                         dmas = <&dmac1 0x95>, <&dmac1 0x94>,
 500                                <&dmac2 0x95>, <&dmac2 0x94>;
 501                         dma-names = "tx", "rx", "tx", "rx";
 502                         i2c-scl-internal-delay-ns = <6>;
 503                         status = "disabled";
 504                 };
 505
 506                 i2c3: i2c@e66d0000 {
 507                         #address-cells = <1>;
 508                         #size-cells = <0>;
 509                         compatible = "renesas,i2c-r8a7796",
 510                                      "renesas,rcar-gen3-i2c";
 511                         reg = <0 0xe66d0000 0 0x40>;
 512                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 513                         clocks = <&cpg CPG_MOD 928>;
 514                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 515                         resets = <&cpg 928>;
 516                         dmas = <&dmac0 0x97>, <&dmac0 0x96>;
 517                         dma-names = "tx", "rx";
 518                         i2c-scl-internal-delay-ns = <110>;
 519                         status = "disabled";
 520                 };
 521
 522                 i2c4: i2c@e66d8000 {
 523                         #address-cells = <1>;
 524                         #size-cells = <0>;
 525                         compatible = "renesas,i2c-r8a7796",
 526                                      "renesas,rcar-gen3-i2c";
 527                         reg = <0 0xe66d8000 0 0x40>;
 528                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 529                         clocks = <&cpg CPG_MOD 927>;
 530                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 531                         resets = <&cpg 927>;
 532                         dmas = <&dmac0 0x99>, <&dmac0 0x98>;
 533                         dma-names = "tx", "rx";
 534                         i2c-scl-internal-delay-ns = <110>;
 535                         status = "disabled";
 536                 };
 537
 538                 i2c5: i2c@e66e0000 {
 539                         #address-cells = <1>;
 540                         #size-cells = <0>;
 541                         compatible = "renesas,i2c-r8a7796",
 542                                      "renesas,rcar-gen3-i2c";
 543                         reg = <0 0xe66e0000 0 0x40>;
 544                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 545                         clocks = <&cpg CPG_MOD 919>;
 546                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 547                         resets = <&cpg 919>;
 548                         dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
 549                         dma-names = "tx", "rx";
 550                         i2c-scl-internal-delay-ns = <110>;
 551                         status = "disabled";
 552                 };
 553
 554                 i2c6: i2c@e66e8000 {
 555                         #address-cells = <1>;
 556                         #size-cells = <0>;
 557                         compatible = "renesas,i2c-r8a7796",
 558                                      "renesas,rcar-gen3-i2c";
 559                         reg = <0 0xe66e8000 0 0x40>;
 560                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 561                         clocks = <&cpg CPG_MOD 918>;
 562                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 563                         resets = <&cpg 918>;
 564                         dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
 565                         dma-names = "tx", "rx";
 566                         i2c-scl-internal-delay-ns = <6>;
 567                         status = "disabled";
 568                 };
 569
 570                 i2c_dvfs: i2c@e60b0000 {
 571                         #address-cells = <1>;
 572                         #size-cells = <0>;
 573                         compatible = "renesas,iic-r8a7796",
 574                                      "renesas,rcar-gen3-iic",
 575                                      "renesas,rmobile-iic";
 576                         reg = <0 0xe60b0000 0 0x425>;
 577                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 578                         clocks = <&cpg CPG_MOD 926>;
 579                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 580                         resets = <&cpg 926>;
 581                         dmas = <&dmac0 0x11>, <&dmac0 0x10>;
 582                         dma-names = "tx", "rx";
 583                         status = "disabled";
 584                 };
 585
 586                 hscif0: serial@e6540000 {
 587                         compatible = "renesas,hscif-r8a7796",
 588                                      "renesas,rcar-gen3-hscif",
 589                                      "renesas,hscif";
 590                         reg = <0 0xe6540000 0 0x60>;
 591                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 592                         clocks = <&cpg CPG_MOD 520>,
 593                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 594                                  <&scif_clk>;
 595                         clock-names = "fck", "brg_int", "scif_clk";
 596                         dmas = <&dmac1 0x31>, <&dmac1 0x30>,
 597                                <&dmac2 0x31>, <&dmac2 0x30>;
 598                         dma-names = "tx", "rx", "tx", "rx";
 599                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 600                         resets = <&cpg 520>;
 601                         status = "disabled";
 602                 };
 603
 604                 hscif1: serial@e6550000 {
 605                         compatible = "renesas,hscif-r8a7796",
 606                                      "renesas,rcar-gen3-hscif",
 607                                      "renesas,hscif";
 608                         reg = <0 0xe6550000 0 0x60>;
 609                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 610                         clocks = <&cpg CPG_MOD 519>,
 611                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 612                                  <&scif_clk>;
 613                         clock-names = "fck", "brg_int", "scif_clk";
 614                         dmas = <&dmac1 0x33>, <&dmac1 0x32>,
 615                                <&dmac2 0x33>, <&dmac2 0x32>;
 616                         dma-names = "tx", "rx", "tx", "rx";
 617                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 618                         resets = <&cpg 519>;
 619                         status = "disabled";
 620                 };
 621
 622                 hscif2: serial@e6560000 {
 623                         compatible = "renesas,hscif-r8a7796",
 624                                      "renesas,rcar-gen3-hscif",
 625                                      "renesas,hscif";
 626                         reg = <0 0xe6560000 0 0x60>;
 627                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 628                         clocks = <&cpg CPG_MOD 518>,
 629                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 630                                  <&scif_clk>;
 631                         clock-names = "fck", "brg_int", "scif_clk";
 632                         dmas = <&dmac1 0x35>, <&dmac1 0x34>,
 633                                <&dmac2 0x35>, <&dmac2 0x34>;
 634                         dma-names = "tx", "rx", "tx", "rx";
 635                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 636                         resets = <&cpg 518>;
 637                         status = "disabled";
 638                 };
 639
 640                 hscif3: serial@e66a0000 {
 641                         compatible = "renesas,hscif-r8a7796",
 642                                      "renesas,rcar-gen3-hscif",
 643                                      "renesas,hscif";
 644                         reg = <0 0xe66a0000 0 0x60>;
 645                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 646                         clocks = <&cpg CPG_MOD 517>,
 647                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 648                                  <&scif_clk>;
 649                         clock-names = "fck", "brg_int", "scif_clk";
 650                         dmas = <&dmac0 0x37>, <&dmac0 0x36>;
 651                         dma-names = "tx", "rx";
 652                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 653                         resets = <&cpg 517>;
 654                         status = "disabled";
 655                 };
 656
 657                 hscif4: serial@e66b0000 {
 658                         compatible = "renesas,hscif-r8a7796",
 659                                      "renesas,rcar-gen3-hscif",
 660                                      "renesas,hscif";
 661                         reg = <0 0xe66b0000 0 0x60>;
 662                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
 663                         clocks = <&cpg CPG_MOD 516>,
 664                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 665                                  <&scif_clk>;
 666                         clock-names = "fck", "brg_int", "scif_clk";
 667                         dmas = <&dmac0 0x39>, <&dmac0 0x38>;
 668                         dma-names = "tx", "rx";
 669                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 670                         resets = <&cpg 516>;
 671                         status = "disabled";
 672                 };
 673
 674                 hsusb: usb@e6590000 {
 675                         compatible = "renesas,usbhs-r8a7796",
 676                                      "renesas,rcar-gen3-usbhs";
 677                         reg = <0 0xe6590000 0 0x100>;
 678                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
 679                         clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
 680                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
 681                                <&usb_dmac1 0>, <&usb_dmac1 1>;
 682                         dma-names = "ch0", "ch1", "ch2", "ch3";
 683                         renesas,buswait = <11>;
 684                         phys = <&usb2_phy0>;
 685                         phy-names = "usb";
 686                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 687                         resets = <&cpg 704>, <&cpg 703>;
 688                         status = "disabled";
 689                 };
 690
 691                 usb_dmac0: dma-controller@e65a0000 {
 692                         compatible = "renesas,r8a7796-usb-dmac",
 693                                      "renesas,usb-dmac";
 694                         reg = <0 0xe65a0000 0 0x100>;
 695                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
 696                                       GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 697                         interrupt-names = "ch0", "ch1";
 698                         clocks = <&cpg CPG_MOD 330>;
 699                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 700                         resets = <&cpg 330>;
 701                         #dma-cells = <1>;
 702                         dma-channels = <2>;
 703                 };
 704
 705                 usb_dmac1: dma-controller@e65b0000 {
 706                         compatible = "renesas,r8a7796-usb-dmac",
 707                                      "renesas,usb-dmac";
 708                         reg = <0 0xe65b0000 0 0x100>;
 709                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
 710                                       GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 711                         interrupt-names = "ch0", "ch1";
 712                         clocks = <&cpg CPG_MOD 331>;
 713                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 714                         resets = <&cpg 331>;
 715                         #dma-cells = <1>;
 716                         dma-channels = <2>;
 717                 };
 718
 719                 usb3_phy0: usb-phy@e65ee000 {
 720                         compatible = "renesas,r8a7796-usb3-phy",
 721                                      "renesas,rcar-gen3-usb3-phy";
 722                         reg = <0 0xe65ee000 0 0x90>;
 723                         clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
 724                                  <&usb_extal_clk>;
 725                         clock-names = "usb3-if", "usb3s_clk", "usb_extal";
 726                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 727                         resets = <&cpg 328>;
 728                         #phy-cells = <0>;
 729                         status = "disabled";
 730                 };
 731
 732                 dmac0: dma-controller@e6700000 {
 733                         compatible = "renesas,dmac-r8a7796",
 734                                      "renesas,rcar-dmac";
 735                         reg = <0 0xe6700000 0 0x10000>;
 736                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
 737                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 738                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 739                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 740                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 741                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 742                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 743                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 744                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 745                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 746                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 747                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 748                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 749                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 750                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 751                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
 752                                       GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 753                         interrupt-names = "error",
 754                                         "ch0", "ch1", "ch2", "ch3",
 755                                         "ch4", "ch5", "ch6", "ch7",
 756                                         "ch8", "ch9", "ch10", "ch11",
 757                                         "ch12", "ch13", "ch14", "ch15";
 758                         clocks = <&cpg CPG_MOD 219>;
 759                         clock-names = "fck";
 760                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 761                         resets = <&cpg 219>;
 762                         #dma-cells = <1>;
 763                         dma-channels = <16>;
 764                         iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
 765                                <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
 766                                <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
 767                                <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
 768                                <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
 769                                <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
 770                                <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
 771                                <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
 772                 };
 773
 774                 dmac1: dma-controller@e7300000 {
 775                         compatible = "renesas,dmac-r8a7796",
 776                                      "renesas,rcar-dmac";
 777                         reg = <0 0xe7300000 0 0x10000>;
 778                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 779                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 780                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 781                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 782                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 783                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 784                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 785                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 786                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 787                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 788                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 789                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 790                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 791                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 792                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 793                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
 794                                       GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
 795                         interrupt-names = "error",
 796                                         "ch0", "ch1", "ch2", "ch3",
 797                                         "ch4", "ch5", "ch6", "ch7",
 798                                         "ch8", "ch9", "ch10", "ch11",
 799                                         "ch12", "ch13", "ch14", "ch15";
 800                         clocks = <&cpg CPG_MOD 218>;
 801                         clock-names = "fck";
 802                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 803                         resets = <&cpg 218>;
 804                         #dma-cells = <1>;
 805                         dma-channels = <16>;
 806                         iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
 807                                <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
 808                                <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
 809                                <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
 810                                <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
 811                                <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
 812                                <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
 813                                <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
 814                 };
 815
 816                 dmac2: dma-controller@e7310000 {
 817                         compatible = "renesas,dmac-r8a7796",
 818                                      "renesas,rcar-dmac";
 819                         reg = <0 0xe7310000 0 0x10000>;
 820                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
 821                                       GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
 822                                       GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
 823                                       GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
 824                                       GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
 825                                       GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
 826                                       GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
 827                                       GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
 828                                       GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
 829                                       GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
 830                                       GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
 831                                       GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
 832                                       GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
 833                                       GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
 834                                       GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
 835                                       GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
 836                                       GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
 837                         interrupt-names = "error",
 838                                         "ch0", "ch1", "ch2", "ch3",
 839                                         "ch4", "ch5", "ch6", "ch7",
 840                                         "ch8", "ch9", "ch10", "ch11",
 841                                         "ch12", "ch13", "ch14", "ch15";
 842                         clocks = <&cpg CPG_MOD 217>;
 843                         clock-names = "fck";
 844                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 845                         resets = <&cpg 217>;
 846                         #dma-cells = <1>;
 847                         dma-channels = <16>;
 848                         iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
 849                                <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
 850                                <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
 851                                <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
 852                                <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
 853                                <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
 854                                <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
 855                                <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
 856                 };
 857
 858                 ipmmu_ds0: mmu@e6740000 {
 859                         compatible = "renesas,ipmmu-r8a7796";
 860                         reg = <0 0xe6740000 0 0x1000>;
 861                         renesas,ipmmu-main = <&ipmmu_mm 0>;
 862                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 863                         #iommu-cells = <1>;
 864                 };
 865
 866                 ipmmu_ds1: mmu@e7740000 {
 867                         compatible = "renesas,ipmmu-r8a7796";
 868                         reg = <0 0xe7740000 0 0x1000>;
 869                         renesas,ipmmu-main = <&ipmmu_mm 1>;
 870                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 871                         #iommu-cells = <1>;
 872                 };
 873
 874                 ipmmu_hc: mmu@e6570000 {
 875                         compatible = "renesas,ipmmu-r8a7796";
 876                         reg = <0 0xe6570000 0 0x1000>;
 877                         renesas,ipmmu-main = <&ipmmu_mm 2>;
 878                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 879                         #iommu-cells = <1>;
 880                 };
 881
 882                 ipmmu_ir: mmu@ff8b0000 {
 883                         compatible = "renesas,ipmmu-r8a7796";
 884                         reg = <0 0xff8b0000 0 0x1000>;
 885                         renesas,ipmmu-main = <&ipmmu_mm 3>;
 886                         power-domains = <&sysc R8A7796_PD_A3IR>;
 887                         #iommu-cells = <1>;
 888                 };
 889
 890                 ipmmu_mm: mmu@e67b0000 {
 891                         compatible = "renesas,ipmmu-r8a7796";
 892                         reg = <0 0xe67b0000 0 0x1000>;
 893                         interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
 894                                      <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
 895                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 896                         #iommu-cells = <1>;
 897                 };
 898
 899                 ipmmu_mp: mmu@ec670000 {
 900                         compatible = "renesas,ipmmu-r8a7796";
 901                         reg = <0 0xec670000 0 0x1000>;
 902                         renesas,ipmmu-main = <&ipmmu_mm 4>;
 903                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 904                         #iommu-cells = <1>;
 905                 };
 906
 907                 ipmmu_pv0: mmu@fd800000 {
 908                         compatible = "renesas,ipmmu-r8a7796";
 909                         reg = <0 0xfd800000 0 0x1000>;
 910                         renesas,ipmmu-main = <&ipmmu_mm 5>;
 911                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 912                         #iommu-cells = <1>;
 913                 };
 914
 915                 ipmmu_pv1: mmu@fd950000 {
 916                         compatible = "renesas,ipmmu-r8a7796";
 917                         reg = <0 0xfd950000 0 0x1000>;
 918                         renesas,ipmmu-main = <&ipmmu_mm 6>;
 919                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 920                         #iommu-cells = <1>;
 921                 };
 922
 923                 ipmmu_rt: mmu@ffc80000 {
 924                         compatible = "renesas,ipmmu-r8a7796";
 925                         reg = <0 0xffc80000 0 0x1000>;
 926                         renesas,ipmmu-main = <&ipmmu_mm 7>;
 927                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 928                         #iommu-cells = <1>;
 929                 };
 930
 931                 ipmmu_vc0: mmu@fe6b0000 {
 932                         compatible = "renesas,ipmmu-r8a7796";
 933                         reg = <0 0xfe6b0000 0 0x1000>;
 934                         renesas,ipmmu-main = <&ipmmu_mm 8>;
 935                         power-domains = <&sysc R8A7796_PD_A3VC>;
 936                         #iommu-cells = <1>;
 937                 };
 938
 939                 ipmmu_vi0: mmu@febd0000 {
 940                         compatible = "renesas,ipmmu-r8a7796";
 941                         reg = <0 0xfebd0000 0 0x1000>;
 942                         renesas,ipmmu-main = <&ipmmu_mm 9>;
 943                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 944                         #iommu-cells = <1>;
 945                 };
 946
 947                 avb: ethernet@e6800000 {
 948                         compatible = "renesas,etheravb-r8a7796",
 949                                      "renesas,etheravb-rcar-gen3";
 950                         reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
 951                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
 952                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
 953                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
 954                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
 955                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
 956                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
 957                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
 958                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
 959                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
 960                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
 961                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
 962                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
 963                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
 964                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
 965                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
 966                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 967                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 968                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
 969                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 970                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
 971                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
 972                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
 973                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
 974                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
 975                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 976                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
 977                                           "ch4", "ch5", "ch6", "ch7",
 978                                           "ch8", "ch9", "ch10", "ch11",
 979                                           "ch12", "ch13", "ch14", "ch15",
 980                                           "ch16", "ch17", "ch18", "ch19",
 981                                           "ch20", "ch21", "ch22", "ch23",
 982                                           "ch24";
 983                         clocks = <&cpg CPG_MOD 812>;
 984                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 985                         resets = <&cpg 812>;
 986                         phy-mode = "rgmii";
 987                         iommus = <&ipmmu_ds0 16>;
 988                         #address-cells = <1>;
 989                         #size-cells = <0>;
 990                         status = "disabled";
 991                 };
 992
 993                 can0: can@e6c30000 {
 994                         compatible = "renesas,can-r8a7796",
 995                                      "renesas,rcar-gen3-can";
 996                         reg = <0 0xe6c30000 0 0x1000>;
 997                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
 998                         clocks = <&cpg CPG_MOD 916>,
 999                                <&cpg CPG_CORE R8A7796_CLK_CANFD>,
1000                                <&can_clk>;
1001                         clock-names = "clkp1", "clkp2", "can_clk";
1002                         assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
1003                         assigned-clock-rates = <40000000>;
1004                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1005                         resets = <&cpg 916>;
1006                         status = "disabled";
1007                 };
1008
1009                 can1: can@e6c38000 {
1010                         compatible = "renesas,can-r8a7796",
1011                                      "renesas,rcar-gen3-can";
1012                         reg = <0 0xe6c38000 0 0x1000>;
1013                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1014                         clocks = <&cpg CPG_MOD 915>,
1015                                <&cpg CPG_CORE R8A7796_CLK_CANFD>,
1016                                <&can_clk>;
1017                         clock-names = "clkp1", "clkp2", "can_clk";
1018                         assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
1019                         assigned-clock-rates = <40000000>;
1020                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1021                         resets = <&cpg 915>;
1022                         status = "disabled";
1023                 };
1024
1025                 canfd: can@e66c0000 {
1026                         compatible = "renesas,r8a7796-canfd",
1027                                      "renesas,rcar-gen3-canfd";
1028                         reg = <0 0xe66c0000 0 0x8000>;
1029                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
1030                                    <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1031                         clocks = <&cpg CPG_MOD 914>,
1032                                <&cpg CPG_CORE R8A7796_CLK_CANFD>,
1033                                <&can_clk>;
1034                         clock-names = "fck", "canfd", "can_clk";
1035                         assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
1036                         assigned-clock-rates = <40000000>;
1037                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1038                         resets = <&cpg 914>;
1039                         status = "disabled";
1040
1041                         channel0 {
1042                                 status = "disabled";
1043                         };
1044
1045                         channel1 {
1046                                 status = "disabled";
1047                         };
1048                 };
1049
1050                 pwm0: pwm@e6e30000 {
1051                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1052                         reg = <0 0xe6e30000 0 8>;
1053                         #pwm-cells = <2>;
1054                         clocks = <&cpg CPG_MOD 523>;
1055                         resets = <&cpg 523>;
1056                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1057                         status = "disabled";
1058                 };
1059
1060                 pwm1: pwm@e6e31000 {
1061                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1062                         reg = <0 0xe6e31000 0 8>;
1063                         #pwm-cells = <2>;
1064                         clocks = <&cpg CPG_MOD 523>;
1065                         resets = <&cpg 523>;
1066                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1067                         status = "disabled";
1068                 };
1069
1070                 pwm2: pwm@e6e32000 {
1071                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1072                         reg = <0 0xe6e32000 0 8>;
1073                         #pwm-cells = <2>;
1074                         clocks = <&cpg CPG_MOD 523>;
1075                         resets = <&cpg 523>;
1076                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1077                         status = "disabled";
1078                 };
1079
1080                 pwm3: pwm@e6e33000 {
1081                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1082                         reg = <0 0xe6e33000 0 8>;
1083                         #pwm-cells = <2>;
1084                         clocks = <&cpg CPG_MOD 523>;
1085                         resets = <&cpg 523>;
1086                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1087                         status = "disabled";
1088                 };
1089
1090                 pwm4: pwm@e6e34000 {
1091                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1092                         reg = <0 0xe6e34000 0 8>;
1093                         #pwm-cells = <2>;
1094                         clocks = <&cpg CPG_MOD 523>;
1095                         resets = <&cpg 523>;
1096                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1097                         status = "disabled";
1098                 };
1099
1100                 pwm5: pwm@e6e35000 {
1101                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1102                         reg = <0 0xe6e35000 0 8>;
1103                         #pwm-cells = <2>;
1104                         clocks = <&cpg CPG_MOD 523>;
1105                         resets = <&cpg 523>;
1106                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1107                         status = "disabled";
1108                 };
1109
1110                 pwm6: pwm@e6e36000 {
1111                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1112                         reg = <0 0xe6e36000 0 8>;
1113                         #pwm-cells = <2>;
1114                         clocks = <&cpg CPG_MOD 523>;
1115                         resets = <&cpg 523>;
1116                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1117                         status = "disabled";
1118                 };
1119
1120                 scif0: serial@e6e60000 {
1121                         compatible = "renesas,scif-r8a7796",
1122                                      "renesas,rcar-gen3-scif", "renesas,scif";
1123                         reg = <0 0xe6e60000 0 64>;
1124                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1125                         clocks = <&cpg CPG_MOD 207>,
1126                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1127                                  <&scif_clk>;
1128                         clock-names = "fck", "brg_int", "scif_clk";
1129                         dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1130                                <&dmac2 0x51>, <&dmac2 0x50>;
1131                         dma-names = "tx", "rx", "tx", "rx";
1132                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1133                         resets = <&cpg 207>;
1134                         status = "disabled";
1135                 };
1136
1137                 scif1: serial@e6e68000 {
1138                         compatible = "renesas,scif-r8a7796",
1139                                      "renesas,rcar-gen3-scif", "renesas,scif";
1140                         reg = <0 0xe6e68000 0 64>;
1141                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1142                         clocks = <&cpg CPG_MOD 206>,
1143                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1144                                  <&scif_clk>;
1145                         clock-names = "fck", "brg_int", "scif_clk";
1146                         dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1147                                <&dmac2 0x53>, <&dmac2 0x52>;
1148                         dma-names = "tx", "rx", "tx", "rx";
1149                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1150                         resets = <&cpg 206>;
1151                         status = "disabled";
1152                 };
1153
1154                 scif2: serial@e6e88000 {
1155                         compatible = "renesas,scif-r8a7796",
1156                                      "renesas,rcar-gen3-scif", "renesas,scif";
1157                         reg = <0 0xe6e88000 0 64>;
1158                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1159                         clocks = <&cpg CPG_MOD 310>,
1160                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1161                                  <&scif_clk>;
1162                         clock-names = "fck", "brg_int", "scif_clk";
1163                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1164                         resets = <&cpg 310>;
1165                         status = "disabled";
1166                 };
1167
1168                 scif3: serial@e6c50000 {
1169                         compatible = "renesas,scif-r8a7796",
1170                                      "renesas,rcar-gen3-scif", "renesas,scif";
1171                         reg = <0 0xe6c50000 0 64>;
1172                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1173                         clocks = <&cpg CPG_MOD 204>,
1174                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1175                                  <&scif_clk>;
1176                         clock-names = "fck", "brg_int", "scif_clk";
1177                         dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1178                         dma-names = "tx", "rx";
1179                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1180                         resets = <&cpg 204>;
1181                         status = "disabled";
1182                 };
1183
1184                 scif4: serial@e6c40000 {
1185                         compatible = "renesas,scif-r8a7796",
1186                                      "renesas,rcar-gen3-scif", "renesas,scif";
1187                         reg = <0 0xe6c40000 0 64>;
1188                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1189                         clocks = <&cpg CPG_MOD 203>,
1190                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1191                                  <&scif_clk>;
1192                         clock-names = "fck", "brg_int", "scif_clk";
1193                         dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1194                         dma-names = "tx", "rx";
1195                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1196                         resets = <&cpg 203>;
1197                         status = "disabled";
1198                 };
1199
1200                 scif5: serial@e6f30000 {
1201                         compatible = "renesas,scif-r8a7796",
1202                                      "renesas,rcar-gen3-scif", "renesas,scif";
1203                         reg = <0 0xe6f30000 0 64>;
1204                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1205                         clocks = <&cpg CPG_MOD 202>,
1206                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1207                                  <&scif_clk>;
1208                         clock-names = "fck", "brg_int", "scif_clk";
1209                         dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1210                                <&dmac2 0x5b>, <&dmac2 0x5a>;
1211                         dma-names = "tx", "rx", "tx", "rx";
1212                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1213                         resets = <&cpg 202>;
1214                         status = "disabled";
1215                 };
1216
1217                 msiof0: spi@e6e90000 {
1218                         compatible = "renesas,msiof-r8a7796",
1219                                      "renesas,rcar-gen3-msiof";
1220                         reg = <0 0xe6e90000 0 0x0064>;
1221                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1222                         clocks = <&cpg CPG_MOD 211>;
1223                         dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1224                                <&dmac2 0x41>, <&dmac2 0x40>;
1225                         dma-names = "tx", "rx", "tx", "rx";
1226                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1227                         resets = <&cpg 211>;
1228                         #address-cells = <1>;
1229                         #size-cells = <0>;
1230                         status = "disabled";
1231                 };
1232
1233                 msiof1: spi@e6ea0000 {
1234                         compatible = "renesas,msiof-r8a7796",
1235                                      "renesas,rcar-gen3-msiof";
1236                         reg = <0 0xe6ea0000 0 0x0064>;
1237                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1238                         clocks = <&cpg CPG_MOD 210>;
1239                         dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1240                                <&dmac2 0x43>, <&dmac2 0x42>;
1241                         dma-names = "tx", "rx", "tx", "rx";
1242                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1243                         resets = <&cpg 210>;
1244                         #address-cells = <1>;
1245                         #size-cells = <0>;
1246                         status = "disabled";
1247                 };
1248
1249                 msiof2: spi@e6c00000 {
1250                         compatible = "renesas,msiof-r8a7796",
1251                                      "renesas,rcar-gen3-msiof";
1252                         reg = <0 0xe6c00000 0 0x0064>;
1253                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1254                         clocks = <&cpg CPG_MOD 209>;
1255                         dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1256                         dma-names = "tx", "rx";
1257                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1258                         resets = <&cpg 209>;
1259                         #address-cells = <1>;
1260                         #size-cells = <0>;
1261                         status = "disabled";
1262                 };
1263
1264                 msiof3: spi@e6c10000 {
1265                         compatible = "renesas,msiof-r8a7796",
1266                                      "renesas,rcar-gen3-msiof";
1267                         reg = <0 0xe6c10000 0 0x0064>;
1268                         interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1269                         clocks = <&cpg CPG_MOD 208>;
1270                         dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1271                         dma-names = "tx", "rx";
1272                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1273                         resets = <&cpg 208>;
1274                         #address-cells = <1>;
1275                         #size-cells = <0>;
1276                         status = "disabled";
1277                 };
1278
1279                 vin0: video@e6ef0000 {
1280                         compatible = "renesas,vin-r8a7796";
1281                         reg = <0 0xe6ef0000 0 0x1000>;
1282                         interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1283                         clocks = <&cpg CPG_MOD 811>;
1284                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1285                         resets = <&cpg 811>;
1286                         renesas,id = <0>;
1287                         status = "disabled";
1288
1289                         ports {
1290                                 #address-cells = <1>;
1291                                 #size-cells = <0>;
1292
1293                                 port@1 {
1294                                         #address-cells = <1>;
1295                                         #size-cells = <0>;
1296
1297                                         reg = <1>;
1298
1299                                         vin0csi20: endpoint@0 {
1300                                                 reg = <0>;
1301                                                 remote-endpoint = <&csi20vin0>;
1302                                         };
1303                                         vin0csi40: endpoint@2 {
1304                                                 reg = <2>;
1305                                                 remote-endpoint = <&csi40vin0>;
1306                                         };
1307                                 };
1308                         };
1309                 };
1310
1311                 vin1: video@e6ef1000 {
1312                         compatible = "renesas,vin-r8a7796";
1313                         reg = <0 0xe6ef1000 0 0x1000>;
1314                         interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1315                         clocks = <&cpg CPG_MOD 810>;
1316                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1317                         resets = <&cpg 810>;
1318                         renesas,id = <1>;
1319                         status = "disabled";
1320
1321                         ports {
1322                                 #address-cells = <1>;
1323                                 #size-cells = <0>;
1324
1325                                 port@1 {
1326                                         #address-cells = <1>;
1327                                         #size-cells = <0>;
1328
1329                                         reg = <1>;
1330
1331                                         vin1csi20: endpoint@0 {
1332                                                 reg = <0>;
1333                                                 remote-endpoint = <&csi20vin1>;
1334                                         };
1335                                         vin1csi40: endpoint@2 {
1336                                                 reg = <2>;
1337                                                 remote-endpoint = <&csi40vin1>;
1338                                         };
1339                                 };
1340                         };
1341                 };
1342
1343                 vin2: video@e6ef2000 {
1344                         compatible = "renesas,vin-r8a7796";
1345                         reg = <0 0xe6ef2000 0 0x1000>;
1346                         interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1347                         clocks = <&cpg CPG_MOD 809>;
1348                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1349                         resets = <&cpg 809>;
1350                         renesas,id = <2>;
1351                         status = "disabled";
1352
1353                         ports {
1354                                 #address-cells = <1>;
1355                                 #size-cells = <0>;
1356
1357                                 port@1 {
1358                                         #address-cells = <1>;
1359                                         #size-cells = <0>;
1360
1361                                         reg = <1>;
1362
1363                                         vin2csi20: endpoint@0 {
1364                                                 reg = <0>;
1365                                                 remote-endpoint = <&csi20vin2>;
1366                                         };
1367                                         vin2csi40: endpoint@2 {
1368                                                 reg = <2>;
1369                                                 remote-endpoint = <&csi40vin2>;
1370                                         };
1371                                 };
1372                         };
1373                 };
1374
1375                 vin3: video@e6ef3000 {
1376                         compatible = "renesas,vin-r8a7796";
1377                         reg = <0 0xe6ef3000 0 0x1000>;
1378                         interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1379                         clocks = <&cpg CPG_MOD 808>;
1380                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1381                         resets = <&cpg 808>;
1382                         renesas,id = <3>;
1383                         status = "disabled";
1384
1385                         ports {
1386                                 #address-cells = <1>;
1387                                 #size-cells = <0>;
1388
1389                                 port@1 {
1390                                         #address-cells = <1>;
1391                                         #size-cells = <0>;
1392
1393                                         reg = <1>;
1394
1395                                         vin3csi20: endpoint@0 {
1396                                                 reg = <0>;
1397                                                 remote-endpoint = <&csi20vin3>;
1398                                         };
1399                                         vin3csi40: endpoint@2 {
1400                                                 reg = <2>;
1401                                                 remote-endpoint = <&csi40vin3>;
1402                                         };
1403                                 };
1404                         };
1405                 };
1406
1407                 vin4: video@e6ef4000 {
1408                         compatible = "renesas,vin-r8a7796";
1409                         reg = <0 0xe6ef4000 0 0x1000>;
1410                         interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1411                         clocks = <&cpg CPG_MOD 807>;
1412                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1413                         resets = <&cpg 807>;
1414                         renesas,id = <4>;
1415                         status = "disabled";
1416
1417                         ports {
1418                                 #address-cells = <1>;
1419                                 #size-cells = <0>;
1420
1421                                 port@1 {
1422                                         #address-cells = <1>;
1423                                         #size-cells = <0>;
1424
1425                                         reg = <1>;
1426
1427                                         vin4csi20: endpoint@0 {
1428                                                 reg = <0>;
1429                                                 remote-endpoint = <&csi20vin4>;
1430                                         };
1431                                         vin4csi40: endpoint@2 {
1432                                                 reg = <2>;
1433                                                 remote-endpoint = <&csi40vin4>;
1434                                         };
1435                                 };
1436                         };
1437                 };
1438
1439                 vin5: video@e6ef5000 {
1440                         compatible = "renesas,vin-r8a7796";
1441                         reg = <0 0xe6ef5000 0 0x1000>;
1442                         interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1443                         clocks = <&cpg CPG_MOD 806>;
1444                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1445                         resets = <&cpg 806>;
1446                         renesas,id = <5>;
1447                         status = "disabled";
1448
1449                         ports {
1450                                 #address-cells = <1>;
1451                                 #size-cells = <0>;
1452
1453                                 port@1 {
1454                                         #address-cells = <1>;
1455                                         #size-cells = <0>;
1456
1457                                         reg = <1>;
1458
1459                                         vin5csi20: endpoint@0 {
1460                                                 reg = <0>;
1461                                                 remote-endpoint = <&csi20vin5>;
1462                                         };
1463                                         vin5csi40: endpoint@2 {
1464                                                 reg = <2>;
1465                                                 remote-endpoint = <&csi40vin5>;
1466                                         };
1467                                 };
1468                         };
1469                 };
1470
1471                 vin6: video@e6ef6000 {
1472                         compatible = "renesas,vin-r8a7796";
1473                         reg = <0 0xe6ef6000 0 0x1000>;
1474                         interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1475                         clocks = <&cpg CPG_MOD 805>;
1476                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1477                         resets = <&cpg 805>;
1478                         renesas,id = <6>;
1479                         status = "disabled";
1480
1481                         ports {
1482                                 #address-cells = <1>;
1483                                 #size-cells = <0>;
1484
1485                                 port@1 {
1486                                         #address-cells = <1>;
1487                                         #size-cells = <0>;
1488
1489                                         reg = <1>;
1490
1491                                         vin6csi20: endpoint@0 {
1492                                                 reg = <0>;
1493                                                 remote-endpoint = <&csi20vin6>;
1494                                         };
1495                                         vin6csi40: endpoint@2 {
1496                                                 reg = <2>;
1497                                                 remote-endpoint = <&csi40vin6>;
1498                                         };
1499                                 };
1500                         };
1501                 };
1502
1503                 vin7: video@e6ef7000 {
1504                         compatible = "renesas,vin-r8a7796";
1505                         reg = <0 0xe6ef7000 0 0x1000>;
1506                         interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1507                         clocks = <&cpg CPG_MOD 804>;
1508                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1509                         resets = <&cpg 804>;
1510                         renesas,id = <7>;
1511                         status = "disabled";
1512
1513                         ports {
1514                                 #address-cells = <1>;
1515                                 #size-cells = <0>;
1516
1517                                 port@1 {
1518                                         #address-cells = <1>;
1519                                         #size-cells = <0>;
1520
1521                                         reg = <1>;
1522
1523                                         vin7csi20: endpoint@0 {
1524                                                 reg = <0>;
1525                                                 remote-endpoint = <&csi20vin7>;
1526                                         };
1527                                         vin7csi40: endpoint@2 {
1528                                                 reg = <2>;
1529                                                 remote-endpoint = <&csi40vin7>;
1530                                         };
1531                                 };
1532                         };
1533                 };
1534
1535                 drif00: rif@e6f40000 {
1536                         compatible = "renesas,r8a7796-drif",
1537                                      "renesas,rcar-gen3-drif";
1538                         reg = <0 0xe6f40000 0 0x64>;
1539                         interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
1540                         clocks = <&cpg CPG_MOD 515>;
1541                         clock-names = "fck";
1542                         dmas = <&dmac1 0x20>, <&dmac2 0x20>;
1543                         dma-names = "rx", "rx";
1544                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1545                         resets = <&cpg 515>;
1546                         renesas,bonding = <&drif01>;
1547                         status = "disabled";
1548                 };
1549
1550                 drif01: rif@e6f50000 {
1551                         compatible = "renesas,r8a7796-drif",
1552                                      "renesas,rcar-gen3-drif";
1553                         reg = <0 0xe6f50000 0 0x64>;
1554                         interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
1555                         clocks = <&cpg CPG_MOD 514>;
1556                         clock-names = "fck";
1557                         dmas = <&dmac1 0x22>, <&dmac2 0x22>;
1558                         dma-names = "rx", "rx";
1559                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1560                         resets = <&cpg 514>;
1561                         renesas,bonding = <&drif00>;
1562                         status = "disabled";
1563                 };
1564
1565                 drif10: rif@e6f60000 {
1566                         compatible = "renesas,r8a7796-drif",
1567                                      "renesas,rcar-gen3-drif";
1568                         reg = <0 0xe6f60000 0 0x64>;
1569                         interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
1570                         clocks = <&cpg CPG_MOD 513>;
1571                         clock-names = "fck";
1572                         dmas = <&dmac1 0x24>, <&dmac2 0x24>;
1573                         dma-names = "rx", "rx";
1574                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1575                         resets = <&cpg 513>;
1576                         renesas,bonding = <&drif11>;
1577                         status = "disabled";
1578                 };
1579
1580                 drif11: rif@e6f70000 {
1581                         compatible = "renesas,r8a7796-drif",
1582                                      "renesas,rcar-gen3-drif";
1583                         reg = <0 0xe6f70000 0 0x64>;
1584                         interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
1585                         clocks = <&cpg CPG_MOD 512>;
1586                         clock-names = "fck";
1587                         dmas = <&dmac1 0x26>, <&dmac2 0x26>;
1588                         dma-names = "rx", "rx";
1589                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1590                         resets = <&cpg 512>;
1591                         renesas,bonding = <&drif10>;
1592                         status = "disabled";
1593                 };
1594
1595                 drif20: rif@e6f80000 {
1596                         compatible = "renesas,r8a7796-drif",
1597                                      "renesas,rcar-gen3-drif";
1598                         reg = <0 0xe6f80000 0 0x64>;
1599                         interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
1600                         clocks = <&cpg CPG_MOD 511>;
1601                         clock-names = "fck";
1602                         dmas = <&dmac1 0x28>, <&dmac2 0x28>;
1603                         dma-names = "rx", "rx";
1604                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1605                         resets = <&cpg 511>;
1606                         renesas,bonding = <&drif21>;
1607                         status = "disabled";
1608                 };
1609
1610                 drif21: rif@e6f90000 {
1611                         compatible = "renesas,r8a7796-drif",
1612                                      "renesas,rcar-gen3-drif";
1613                         reg = <0 0xe6f90000 0 0x64>;
1614                         interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
1615                         clocks = <&cpg CPG_MOD 510>;
1616                         clock-names = "fck";
1617                         dmas = <&dmac1 0x2a>, <&dmac2 0x2a>;
1618                         dma-names = "rx", "rx";
1619                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1620                         resets = <&cpg 510>;
1621                         renesas,bonding = <&drif20>;
1622                         status = "disabled";
1623                 };
1624
1625                 drif30: rif@e6fa0000 {
1626                         compatible = "renesas,r8a7796-drif",
1627                                      "renesas,rcar-gen3-drif";
1628                         reg = <0 0xe6fa0000 0 0x64>;
1629                         interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
1630                         clocks = <&cpg CPG_MOD 509>;
1631                         clock-names = "fck";
1632                         dmas = <&dmac1 0x2c>, <&dmac2 0x2c>;
1633                         dma-names = "rx", "rx";
1634                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1635                         resets = <&cpg 509>;
1636                         renesas,bonding = <&drif31>;
1637                         status = "disabled";
1638                 };
1639
1640                 drif31: rif@e6fb0000 {
1641                         compatible = "renesas,r8a7796-drif",
1642                                      "renesas,rcar-gen3-drif";
1643                         reg = <0 0xe6fb0000 0 0x64>;
1644                         interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
1645                         clocks = <&cpg CPG_MOD 508>;
1646                         clock-names = "fck";
1647                         dmas = <&dmac1 0x2e>, <&dmac2 0x2e>;
1648                         dma-names = "rx", "rx";
1649                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1650                         resets = <&cpg 508>;
1651                         renesas,bonding = <&drif30>;
1652                         status = "disabled";
1653                 };
1654
1655                 rcar_sound: sound@ec500000 {
1656                         /*
1657                          * #sound-dai-cells is required
1658                          *
1659                          * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1660                          * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1661                          */
1662                         /*
1663                          * #clock-cells is required for audio_clkout0/1/2/3
1664                          *
1665                          * clkout       : #clock-cells = <0>;   <&rcar_sound>;
1666                          * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
1667                          */
1668                         compatible =  "renesas,rcar_sound-r8a7796", "renesas,rcar_sound-gen3";
1669                         reg =   <0 0xec500000 0 0x1000>, /* SCU */
1670                                 <0 0xec5a0000 0 0x100>,  /* ADG */
1671                                 <0 0xec540000 0 0x1000>, /* SSIU */
1672                                 <0 0xec541000 0 0x280>,  /* SSI */
1673                                 <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
1674                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1675
1676                         clocks = <&cpg CPG_MOD 1005>,
1677                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1678                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1679                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1680                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1681                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1682                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1683                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1684                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1685                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1686                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1687                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1688                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1689                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1690                                  <&audio_clk_a>, <&audio_clk_b>,
1691                                  <&audio_clk_c>,
1692                                  <&cpg CPG_CORE R8A7796_CLK_S0D4>;
1693                         clock-names = "ssi-all",
1694                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1695                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1696                                       "ssi.1", "ssi.0",
1697                                       "src.9", "src.8", "src.7", "src.6",
1698                                       "src.5", "src.4", "src.3", "src.2",
1699                                       "src.1", "src.0",
1700                                       "mix.1", "mix.0",
1701                                       "ctu.1", "ctu.0",
1702                                       "dvc.0", "dvc.1",
1703                                       "clk_a", "clk_b", "clk_c", "clk_i";
1704                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1705                         resets = <&cpg 1005>,
1706                                  <&cpg 1006>, <&cpg 1007>,
1707                                  <&cpg 1008>, <&cpg 1009>,
1708                                  <&cpg 1010>, <&cpg 1011>,
1709                                  <&cpg 1012>, <&cpg 1013>,
1710                                  <&cpg 1014>, <&cpg 1015>;
1711                         reset-names = "ssi-all",
1712                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1713                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1714                                       "ssi.1", "ssi.0";
1715                         status = "disabled";
1716
1717                         rcar_sound,dvc {
1718                                 dvc0: dvc-0 {
1719                                         dmas = <&audma1 0xbc>;
1720                                         dma-names = "tx";
1721                                 };
1722                                 dvc1: dvc-1 {
1723                                         dmas = <&audma1 0xbe>;
1724                                         dma-names = "tx";
1725                                 };
1726                         };
1727
1728                         rcar_sound,mix {
1729                                 mix0: mix-0 { };
1730                                 mix1: mix-1 { };
1731                         };
1732
1733                         rcar_sound,ctu {
1734                                 ctu00: ctu-0 { };
1735                                 ctu01: ctu-1 { };
1736                                 ctu02: ctu-2 { };
1737                                 ctu03: ctu-3 { };
1738                                 ctu10: ctu-4 { };
1739                                 ctu11: ctu-5 { };
1740                                 ctu12: ctu-6 { };
1741                                 ctu13: ctu-7 { };
1742                         };
1743
1744                         rcar_sound,src {
1745                                 src0: src-0 {
1746                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1747                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
1748                                         dma-names = "rx", "tx";
1749                                 };
1750                                 src1: src-1 {
1751                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1752                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
1753                                         dma-names = "rx", "tx";
1754                                 };
1755                                 src2: src-2 {
1756                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1757                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
1758                                         dma-names = "rx", "tx";
1759                                 };
1760                                 src3: src-3 {
1761                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1762                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1763                                         dma-names = "rx", "tx";
1764                                 };
1765                                 src4: src-4 {
1766                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1767                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1768                                         dma-names = "rx", "tx";
1769                                 };
1770                                 src5: src-5 {
1771                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1772                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1773                                         dma-names = "rx", "tx";
1774                                 };
1775                                 src6: src-6 {
1776                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1777                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
1778                                         dma-names = "rx", "tx";
1779                                 };
1780                                 src7: src-7 {
1781                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1782                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
1783                                         dma-names = "rx", "tx";
1784                                 };
1785                                 src8: src-8 {
1786                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1787                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
1788                                         dma-names = "rx", "tx";
1789                                 };
1790                                 src9: src-9 {
1791                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1792                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
1793                                         dma-names = "rx", "tx";
1794                                 };
1795                         };
1796
1797                         rcar_sound,ssi {
1798                                 ssi0: ssi-0 {
1799                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1800                                         dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1801                                         dma-names = "rx", "tx", "rxu", "txu";
1802                                 };
1803                                 ssi1: ssi-1 {
1804                                         interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1805                                         dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1806                                         dma-names = "rx", "tx", "rxu", "txu";
1807                                 };
1808                                 ssi2: ssi-2 {
1809                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1810                                         dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1811                                         dma-names = "rx", "tx", "rxu", "txu";
1812                                 };
1813                                 ssi3: ssi-3 {
1814                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1815                                         dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1816                                         dma-names = "rx", "tx", "rxu", "txu";
1817                                 };
1818                                 ssi4: ssi-4 {
1819                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1820                                         dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1821                                         dma-names = "rx", "tx", "rxu", "txu";
1822                                 };
1823                                 ssi5: ssi-5 {
1824                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1825                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1826                                         dma-names = "rx", "tx", "rxu", "txu";
1827                                 };
1828                                 ssi6: ssi-6 {
1829                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1830                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1831                                         dma-names = "rx", "tx", "rxu", "txu";
1832                                 };
1833                                 ssi7: ssi-7 {
1834                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1835                                         dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1836                                         dma-names = "rx", "tx", "rxu", "txu";
1837                                 };
1838                                 ssi8: ssi-8 {
1839                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1840                                         dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1841                                         dma-names = "rx", "tx", "rxu", "txu";
1842                                 };
1843                                 ssi9: ssi-9 {
1844                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1845                                         dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1846                                         dma-names = "rx", "tx", "rxu", "txu";
1847                                 };
1848                         };
1849
1850                         ports {
1851                                 #address-cells = <1>;
1852                                 #size-cells = <0>;
1853                                 port@0 {
1854                                         reg = <0>;
1855                                 };
1856                                 port@1 {
1857                                         reg = <1>;
1858                                 };
1859                         };
1860                 };
1861
1862                 audma0: dma-controller@ec700000 {
1863                         compatible = "renesas,dmac-r8a7796",
1864                                      "renesas,rcar-dmac";
1865                         reg = <0 0xec700000 0 0x10000>;
1866                         interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
1867                                       GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
1868                                       GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
1869                                       GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
1870                                       GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
1871                                       GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
1872                                       GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
1873                                       GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
1874                                       GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
1875                                       GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
1876                                       GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
1877                                       GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
1878                                       GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
1879                                       GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
1880                                       GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
1881                                       GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
1882                                       GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
1883                         interrupt-names = "error",
1884                                         "ch0", "ch1", "ch2", "ch3",
1885                                         "ch4", "ch5", "ch6", "ch7",
1886                                         "ch8", "ch9", "ch10", "ch11",
1887                                         "ch12", "ch13", "ch14", "ch15";
1888                         clocks = <&cpg CPG_MOD 502>;
1889                         clock-names = "fck";
1890                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1891                         resets = <&cpg 502>;
1892                         #dma-cells = <1>;
1893                         dma-channels = <16>;
1894                         iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
1895                                <&ipmmu_mp 2>, <&ipmmu_mp 3>,
1896                                <&ipmmu_mp 4>, <&ipmmu_mp 5>,
1897                                <&ipmmu_mp 6>, <&ipmmu_mp 7>,
1898                                <&ipmmu_mp 8>, <&ipmmu_mp 9>,
1899                                <&ipmmu_mp 10>, <&ipmmu_mp 11>,
1900                                <&ipmmu_mp 12>, <&ipmmu_mp 13>,
1901                                <&ipmmu_mp 14>, <&ipmmu_mp 15>;
1902                 };
1903
1904                 audma1: dma-controller@ec720000 {
1905                         compatible = "renesas,dmac-r8a7796",
1906                                      "renesas,rcar-dmac";
1907                         reg = <0 0xec720000 0 0x10000>;
1908                         interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
1909                                       GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
1910                                       GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
1911                                       GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
1912                                       GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
1913                                       GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
1914                                       GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
1915                                       GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
1916                                       GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
1917                                       GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
1918                                       GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
1919                                       GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
1920                                       GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
1921                                       GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
1922                                       GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
1923                                       GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
1924                                       GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
1925                         interrupt-names = "error",
1926                                         "ch0", "ch1", "ch2", "ch3",
1927                                         "ch4", "ch5", "ch6", "ch7",
1928                                         "ch8", "ch9", "ch10", "ch11",
1929                                         "ch12", "ch13", "ch14", "ch15";
1930                         clocks = <&cpg CPG_MOD 501>;
1931                         clock-names = "fck";
1932                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1933                         resets = <&cpg 501>;
1934                         #dma-cells = <1>;
1935                         dma-channels = <16>;
1936                         iommus = <&ipmmu_mp 16>, <&ipmmu_mp 17>,
1937                                <&ipmmu_mp 18>, <&ipmmu_mp 19>,
1938                                <&ipmmu_mp 20>, <&ipmmu_mp 21>,
1939                                <&ipmmu_mp 22>, <&ipmmu_mp 23>,
1940                                <&ipmmu_mp 24>, <&ipmmu_mp 25>,
1941                                <&ipmmu_mp 26>, <&ipmmu_mp 27>,
1942                                <&ipmmu_mp 28>, <&ipmmu_mp 29>,
1943                                <&ipmmu_mp 30>, <&ipmmu_mp 31>;
1944                 };
1945
1946                 xhci0: usb@ee000000 {
1947                         compatible = "renesas,xhci-r8a7796",
1948                                      "renesas,rcar-gen3-xhci";
1949                         reg = <0 0xee000000 0 0xc00>;
1950                         interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1951                         clocks = <&cpg CPG_MOD 328>;
1952                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1953                         resets = <&cpg 328>;
1954                         status = "disabled";
1955                 };
1956
1957                 usb3_peri0: usb@ee020000 {
1958                         compatible = "renesas,r8a7796-usb3-peri",
1959                                      "renesas,rcar-gen3-usb3-peri";
1960                         reg = <0 0xee020000 0 0x400>;
1961                         interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
1962                         clocks = <&cpg CPG_MOD 328>;
1963                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1964                         resets = <&cpg 328>;
1965                         status = "disabled";
1966                 };
1967
1968                 ohci0: usb@ee080000 {
1969                         compatible = "generic-ohci";
1970                         reg = <0 0xee080000 0 0x100>;
1971                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1972                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1973                         phys = <&usb2_phy0>;
1974                         phy-names = "usb";
1975                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1976                         resets = <&cpg 703>, <&cpg 704>;
1977                         status = "disabled";
1978                 };
1979
1980                 ohci1: usb@ee0a0000 {
1981                         compatible = "generic-ohci";
1982                         reg = <0 0xee0a0000 0 0x100>;
1983                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1984                         clocks = <&cpg CPG_MOD 702>;
1985                         phys = <&usb2_phy1>;
1986                         phy-names = "usb";
1987                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1988                         resets = <&cpg 702>;
1989                         status = "disabled";
1990                 };
1991
1992                 ehci0: usb@ee080100 {
1993                         compatible = "generic-ehci";
1994                         reg = <0 0xee080100 0 0x100>;
1995                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1996                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1997                         phys = <&usb2_phy0>;
1998                         phy-names = "usb";
1999                         companion = <&ohci0>;
2000                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2001                         resets = <&cpg 703>, <&cpg 704>;
2002                         status = "disabled";
2003                 };
2004
2005                 ehci1: usb@ee0a0100 {
2006                         compatible = "generic-ehci";
2007                         reg = <0 0xee0a0100 0 0x100>;
2008                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2009                         clocks = <&cpg CPG_MOD 702>;
2010                         phys = <&usb2_phy1>;
2011                         phy-names = "usb";
2012                         companion = <&ohci1>;
2013                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2014                         resets = <&cpg 702>;
2015                         status = "disabled";
2016                 };
2017
2018                 usb2_phy0: usb-phy@ee080200 {
2019                         compatible = "renesas,usb2-phy-r8a7796",
2020                                      "renesas,rcar-gen3-usb2-phy";
2021                         reg = <0 0xee080200 0 0x700>;
2022                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2023                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2024                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2025                         resets = <&cpg 703>, <&cpg 704>;
2026                         #phy-cells = <0>;
2027                         status = "disabled";
2028                 };
2029
2030                 usb2_phy1: usb-phy@ee0a0200 {
2031                         compatible = "renesas,usb2-phy-r8a7796",
2032                                      "renesas,rcar-gen3-usb2-phy";
2033                         reg = <0 0xee0a0200 0 0x700>;
2034                         clocks = <&cpg CPG_MOD 702>;
2035                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2036                         resets = <&cpg 702>;
2037                         #phy-cells = <0>;
2038                         status = "disabled";
2039                 };
2040
2041                 sdhi0: sd@ee100000 {
2042                         compatible = "renesas,sdhi-r8a7796",
2043                                      "renesas,rcar-gen3-sdhi";
2044                         reg = <0 0xee100000 0 0x2000>;
2045                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
2046                         clocks = <&cpg CPG_MOD 314>;
2047                         max-frequency = <200000000>;
2048                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2049                         resets = <&cpg 314>;
2050                         status = "disabled";
2051                 };
2052
2053                 sdhi1: sd@ee120000 {
2054                         compatible = "renesas,sdhi-r8a7796",
2055                                      "renesas,rcar-gen3-sdhi";
2056                         reg = <0 0xee120000 0 0x2000>;
2057                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
2058                         clocks = <&cpg CPG_MOD 313>;
2059                         max-frequency = <200000000>;
2060                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2061                         resets = <&cpg 313>;
2062                         status = "disabled";
2063                 };
2064
2065                 sdhi2: sd@ee140000 {
2066                         compatible = "renesas,sdhi-r8a7796",
2067                                      "renesas,rcar-gen3-sdhi";
2068                         reg = <0 0xee140000 0 0x2000>;
2069                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
2070                         clocks = <&cpg CPG_MOD 312>;
2071                         max-frequency = <200000000>;
2072                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2073                         resets = <&cpg 312>;
2074                         status = "disabled";
2075                 };
2076
2077                 sdhi3: sd@ee160000 {
2078                         compatible = "renesas,sdhi-r8a7796",
2079                                      "renesas,rcar-gen3-sdhi";
2080                         reg = <0 0xee160000 0 0x2000>;
2081                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
2082                         clocks = <&cpg CPG_MOD 311>;
2083                         max-frequency = <200000000>;
2084                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2085                         resets = <&cpg 311>;
2086                         status = "disabled";
2087                 };
2088
2089                 gic: interrupt-controller@f1010000 {
2090                         compatible = "arm,gic-400";
2091                         #interrupt-cells = <3>;
2092                         #address-cells = <0>;
2093                         interrupt-controller;
2094                         reg = <0x0 0xf1010000 0 0x1000>,
2095                               <0x0 0xf1020000 0 0x20000>,
2096                               <0x0 0xf1040000 0 0x20000>,
2097                               <0x0 0xf1060000 0 0x20000>;
2098                         interrupts = <GIC_PPI 9
2099                                         (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
2100                         clocks = <&cpg CPG_MOD 408>;
2101                         clock-names = "clk";
2102                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2103                         resets = <&cpg 408>;
2104                 };
2105
2106                 pciec0: pcie@fe000000 {
2107                         compatible = "renesas,pcie-r8a7796",
2108                                      "renesas,pcie-rcar-gen3";
2109                         reg = <0 0xfe000000 0 0x80000>;
2110                         #address-cells = <3>;
2111                         #size-cells = <2>;
2112                         bus-range = <0x00 0xff>;
2113                         device_type = "pci";
2114                         ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
2115                                 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
2116                                 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
2117                                 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2118                         /* Map all possible DDR as inbound ranges */
2119                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2120                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2121                                 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2122                                 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2123                         #interrupt-cells = <1>;
2124                         interrupt-map-mask = <0 0 0 0>;
2125                         interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2126                         clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
2127                         clock-names = "pcie", "pcie_bus";
2128                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2129                         resets = <&cpg 319>;
2130                         status = "disabled";
2131                 };
2132
2133                 pciec1: pcie@ee800000 {
2134                         compatible = "renesas,pcie-r8a7796",
2135                                      "renesas,pcie-rcar-gen3";
2136                         reg = <0 0xee800000 0 0x80000>;
2137                         #address-cells = <3>;
2138                         #size-cells = <2>;
2139                         bus-range = <0x00 0xff>;
2140                         device_type = "pci";
2141                         ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
2142                                 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
2143                                 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
2144                                 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2145                         /* Map all possible DDR as inbound ranges */
2146                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2147                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2148                                 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2149                                 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2150                         #interrupt-cells = <1>;
2151                         interrupt-map-mask = <0 0 0 0>;
2152                         interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2153                         clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2154                         clock-names = "pcie", "pcie_bus";
2155                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2156                         resets = <&cpg 318>;
2157                         status = "disabled";
2158                 };
2159
2160                 imr-lx4@fe860000 {
2161                         compatible = "renesas,r8a7796-imr-lx4",
2162                                      "renesas,imr-lx4";
2163                         reg = <0 0xfe860000 0 0x2000>;
2164                         interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
2165                         clocks = <&cpg CPG_MOD 823>;
2166                         power-domains = <&sysc R8A7796_PD_A3VC>;
2167                         resets = <&cpg 823>;
2168                 };
2169
2170                 imr-lx4@fe870000 {
2171                         compatible = "renesas,r8a7796-imr-lx4",
2172                                      "renesas,imr-lx4";
2173                         reg = <0 0xfe870000 0 0x2000>;
2174                         interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
2175                         clocks = <&cpg CPG_MOD 822>;
2176                         power-domains = <&sysc R8A7796_PD_A3VC>;
2177                         resets = <&cpg 822>;
2178                 };
2179
2180                 fdp1@fe940000 {
2181                         compatible = "renesas,fdp1";
2182                         reg = <0 0xfe940000 0 0x2400>;
2183                         interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
2184                         clocks = <&cpg CPG_MOD 119>;
2185                         power-domains = <&sysc R8A7796_PD_A3VC>;
2186                         resets = <&cpg 119>;
2187                         renesas,fcp = <&fcpf0>;
2188                 };
2189
2190                 fcpf0: fcp@fe950000 {
2191                         compatible = "renesas,fcpf";
2192                         reg = <0 0xfe950000 0 0x200>;
2193                         clocks = <&cpg CPG_MOD 615>;
2194                         power-domains = <&sysc R8A7796_PD_A3VC>;
2195                         resets = <&cpg 615>;
2196                 };
2197
2198                 fcpvb0: fcp@fe96f000 {
2199                         compatible = "renesas,fcpv";
2200                         reg = <0 0xfe96f000 0 0x200>;
2201                         clocks = <&cpg CPG_MOD 607>;
2202                         power-domains = <&sysc R8A7796_PD_A3VC>;
2203                         resets = <&cpg 607>;
2204                 };
2205
2206                 fcpvi0: fcp@fe9af000 {
2207                         compatible = "renesas,fcpv";
2208                         reg = <0 0xfe9af000 0 0x200>;
2209                         clocks = <&cpg CPG_MOD 611>;
2210                         power-domains = <&sysc R8A7796_PD_A3VC>;
2211                         resets = <&cpg 611>;
2212                         iommus = <&ipmmu_vc0 19>;
2213                 };
2214
2215                 fcpvd0: fcp@fea27000 {
2216                         compatible = "renesas,fcpv";
2217                         reg = <0 0xfea27000 0 0x200>;
2218                         clocks = <&cpg CPG_MOD 603>;
2219                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2220                         resets = <&cpg 603>;
2221                         iommus = <&ipmmu_vi0 8>;
2222                 };
2223
2224                 fcpvd1: fcp@fea2f000 {
2225                         compatible = "renesas,fcpv";
2226                         reg = <0 0xfea2f000 0 0x200>;
2227                         clocks = <&cpg CPG_MOD 602>;
2228                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2229                         resets = <&cpg 602>;
2230                         iommus = <&ipmmu_vi0 9>;
2231                 };
2232
2233                 fcpvd2: fcp@fea37000 {
2234                         compatible = "renesas,fcpv";
2235                         reg = <0 0xfea37000 0 0x200>;
2236                         clocks = <&cpg CPG_MOD 601>;
2237                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2238                         resets = <&cpg 601>;
2239                         iommus = <&ipmmu_vi0 10>;
2240                 };
2241
2242                 vspb: vsp@fe960000 {
2243                         compatible = "renesas,vsp2";
2244                         reg = <0 0xfe960000 0 0x8000>;
2245                         interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
2246                         clocks = <&cpg CPG_MOD 626>;
2247                         power-domains = <&sysc R8A7796_PD_A3VC>;
2248                         resets = <&cpg 626>;
2249
2250                         renesas,fcp = <&fcpvb0>;
2251                 };
2252
2253                 vspd0: vsp@fea20000 {
2254                         compatible = "renesas,vsp2";
2255                         reg = <0 0xfea20000 0 0x5000>;
2256                         interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
2257                         clocks = <&cpg CPG_MOD 623>;
2258                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2259                         resets = <&cpg 623>;
2260
2261                         renesas,fcp = <&fcpvd0>;
2262                 };
2263
2264                 vspd1: vsp@fea28000 {
2265                         compatible = "renesas,vsp2";
2266                         reg = <0 0xfea28000 0 0x5000>;
2267                         interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
2268                         clocks = <&cpg CPG_MOD 622>;
2269                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2270                         resets = <&cpg 622>;
2271
2272                         renesas,fcp = <&fcpvd1>;
2273                 };
2274
2275                 vspd2: vsp@fea30000 {
2276                         compatible = "renesas,vsp2";
2277                         reg = <0 0xfea30000 0 0x5000>;
2278                         interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
2279                         clocks = <&cpg CPG_MOD 621>;
2280                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2281                         resets = <&cpg 621>;
2282
2283                         renesas,fcp = <&fcpvd2>;
2284                 };
2285
2286                 vspi0: vsp@fe9a0000 {
2287                         compatible = "renesas,vsp2";
2288                         reg = <0 0xfe9a0000 0 0x8000>;
2289                         interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
2290                         clocks = <&cpg CPG_MOD 631>;
2291                         power-domains = <&sysc R8A7796_PD_A3VC>;
2292                         resets = <&cpg 631>;
2293
2294                         renesas,fcp = <&fcpvi0>;
2295                 };
2296
2297                 csi20: csi2@fea80000 {
2298                         compatible = "renesas,r8a7796-csi2";
2299                         reg = <0 0xfea80000 0 0x10000>;
2300                         interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
2301                         clocks = <&cpg CPG_MOD 714>;
2302                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2303                         resets = <&cpg 714>;
2304                         status = "disabled";
2305
2306                         ports {
2307                                 #address-cells = <1>;
2308                                 #size-cells = <0>;
2309
2310                                 port@1 {
2311                                         #address-cells = <1>;
2312                                         #size-cells = <0>;
2313
2314                                         reg = <1>;
2315
2316                                         csi20vin0: endpoint@0 {
2317                                                 reg = <0>;
2318                                                 remote-endpoint = <&vin0csi20>;
2319                                         };
2320                                         csi20vin1: endpoint@1 {
2321                                                 reg = <1>;
2322                                                 remote-endpoint = <&vin1csi20>;
2323                                         };
2324                                         csi20vin2: endpoint@2 {
2325                                                 reg = <2>;
2326                                                 remote-endpoint = <&vin2csi20>;
2327                                         };
2328                                         csi20vin3: endpoint@3 {
2329                                                 reg = <3>;
2330                                                 remote-endpoint = <&vin3csi20>;
2331                                         };
2332                                         csi20vin4: endpoint@4 {
2333                                                 reg = <4>;
2334                                                 remote-endpoint = <&vin4csi20>;
2335                                         };
2336                                         csi20vin5: endpoint@5 {
2337                                                 reg = <5>;
2338                                                 remote-endpoint = <&vin5csi20>;
2339                                         };
2340                                         csi20vin6: endpoint@6 {
2341                                                 reg = <6>;
2342                                                 remote-endpoint = <&vin6csi20>;
2343                                         };
2344                                         csi20vin7: endpoint@7 {
2345                                                 reg = <7>;
2346                                                 remote-endpoint = <&vin7csi20>;
2347                                         };
2348                                 };
2349                         };
2350                 };
2351
2352                 csi40: csi2@feaa0000 {
2353                         compatible = "renesas,r8a7796-csi2";
2354                         reg = <0 0xfeaa0000 0 0x10000>;
2355                         interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
2356                         clocks = <&cpg CPG_MOD 716>;
2357                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2358                         resets = <&cpg 716>;
2359                         status = "disabled";
2360
2361                         ports {
2362                                 #address-cells = <1>;
2363                                 #size-cells = <0>;
2364
2365                                 port@1 {
2366                                         #address-cells = <1>;
2367                                         #size-cells = <0>;
2368
2369                                         reg = <1>;
2370
2371                                         csi40vin0: endpoint@0 {
2372                                                 reg = <0>;
2373                                                 remote-endpoint = <&vin0csi40>;
2374                                         };
2375                                         csi40vin1: endpoint@1 {
2376                                                 reg = <1>;
2377                                                 remote-endpoint = <&vin1csi40>;
2378                                         };
2379                                         csi40vin2: endpoint@2 {
2380                                                 reg = <2>;
2381                                                 remote-endpoint = <&vin2csi40>;
2382                                         };
2383                                         csi40vin3: endpoint@3 {
2384                                                 reg = <3>;
2385                                                 remote-endpoint = <&vin3csi40>;
2386                                         };
2387                                         csi40vin4: endpoint@4 {
2388                                                 reg = <4>;
2389                                                 remote-endpoint = <&vin4csi40>;
2390                                         };
2391                                         csi40vin5: endpoint@5 {
2392                                                 reg = <5>;
2393                                                 remote-endpoint = <&vin5csi40>;
2394                                         };
2395                                         csi40vin6: endpoint@6 {
2396                                                 reg = <6>;
2397                                                 remote-endpoint = <&vin6csi40>;
2398                                         };
2399                                         csi40vin7: endpoint@7 {
2400                                                 reg = <7>;
2401                                                 remote-endpoint = <&vin7csi40>;
2402                                         };
2403                                 };
2404
2405                         };
2406                 };
2407
2408                 hdmi0: hdmi@fead0000 {
2409                         compatible = "renesas,r8a7796-hdmi", "renesas,rcar-gen3-hdmi";
2410                         reg = <0 0xfead0000 0 0x10000>;
2411                         interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
2412                         clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7796_CLK_HDMI>;
2413                         clock-names = "iahb", "isfr";
2414                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2415                         resets = <&cpg 729>;
2416                         status = "disabled";
2417
2418                         ports {
2419                                 #address-cells = <1>;
2420                                 #size-cells = <0>;
2421                                 port@0 {
2422                                         reg = <0>;
2423                                         dw_hdmi0_in: endpoint {
2424                                                 remote-endpoint = <&du_out_hdmi0>;
2425                                         };
2426                                 };
2427                                 port@1 {
2428                                         reg = <1>;
2429                                 };
2430                                 port@2 {
2431                                         /* HDMI sound */
2432                                         reg = <2>;
2433                                 };
2434                         };
2435                 };
2436
2437                 du: display@feb00000 {
2438                         compatible = "renesas,du-r8a7796";
2439                         reg = <0 0xfeb00000 0 0x70000>;
2440                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2441                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
2442                                      <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
2443                         clocks = <&cpg CPG_MOD 724>,
2444                                  <&cpg CPG_MOD 723>,
2445                                  <&cpg CPG_MOD 722>;
2446                         clock-names = "du.0", "du.1", "du.2";
2447                         status = "disabled";
2448
2449                         vsps = <&vspd0 &vspd1 &vspd2>;
2450
2451                         ports {
2452                                 #address-cells = <1>;
2453                                 #size-cells = <0>;
2454
2455                                 port@0 {
2456                                         reg = <0>;
2457                                         du_out_rgb: endpoint {
2458                                         };
2459                                 };
2460                                 port@1 {
2461                                         reg = <1>;
2462                                         du_out_hdmi0: endpoint {
2463                                                 remote-endpoint = <&dw_hdmi0_in>;
2464                                         };
2465                                 };
2466                                 port@2 {
2467                                         reg = <2>;
2468                                         du_out_lvds0: endpoint {
2469                                                 remote-endpoint = <&lvds0_in>;
2470                                         };
2471                                 };
2472                         };
2473                 };
2474
2475                 lvds0: lvds@feb90000 {
2476                         compatible = "renesas,r8a7796-lvds";
2477                         reg = <0 0xfeb90000 0 0x14>;
2478                         clocks = <&cpg CPG_MOD 727>;
2479                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2480                         resets = <&cpg 727>;
2481                         status = "disabled";
2482
2483                         ports {
2484                                 #address-cells = <1>;
2485                                 #size-cells = <0>;
2486
2487                                 port@0 {
2488                                         reg = <0>;
2489                                         lvds0_in: endpoint {
2490                                                 remote-endpoint = <&du_out_lvds0>;
2491                                         };
2492                                 };
2493                                 port@1 {
2494                                         reg = <1>;
2495                                         lvds0_out: endpoint {
2496                                         };
2497                                 };
2498                         };
2499                 };
2500
2501                 prr: chipid@fff00044 {
2502                         compatible = "renesas,prr";
2503                         reg = <0 0xfff00044 0 4>;
2504                 };
2505         };
2506
2507         thermal-zones {
2508                 sensor_thermal1: sensor-thermal1 {
2509                         polling-delay-passive = <250>;
2510                         polling-delay = <1000>;
2511                         thermal-sensors = <&tsc 0>;
2512
2513                         trips {
2514                                 sensor1_passive: sensor1-passive {
2515                                         temperature = <95000>;
2516                                         hysteresis = <1000>;
2517                                         type = "passive";
2518                                 };
2519                                 sensor1_crit: sensor1-crit {
2520                                         temperature = <120000>;
2521                                         hysteresis = <1000>;
2522                                         type = "critical";
2523                                 };
2524                         };
2525
2526                         cooling-maps {
2527                                 map0 {
2528                                         trip = <&sensor1_passive>;
2529                                         cooling-device = <&a57_0 5 5>;
2530                                 };
2531                         };
2532                 };
2533
2534                 sensor_thermal2: sensor-thermal2 {
2535                         polling-delay-passive = <250>;
2536                         polling-delay = <1000>;
2537                         thermal-sensors = <&tsc 1>;
2538
2539                         trips {
2540                                 sensor2_passive: sensor2-passive {
2541                                         temperature = <95000>;
2542                                         hysteresis = <1000>;
2543                                         type = "passive";
2544                                 };
2545                                 sensor2_crit: sensor2-crit {
2546                                         temperature = <120000>;
2547                                         hysteresis = <1000>;
2548                                         type = "critical";
2549                                 };
2550                         };
2551
2552                         cooling-maps {
2553                                 map0 {
2554                                         trip = <&sensor2_passive>;
2555                                         cooling-device = <&a57_0 5 5>;
2556                                 };
2557                         };
2558                 };
2559
2560                 sensor_thermal3: sensor-thermal3 {
2561                         polling-delay-passive = <250>;
2562                         polling-delay = <1000>;
2563                         thermal-sensors = <&tsc 2>;
2564
2565                         trips {
2566                                 sensor3_passive: sensor3-passive {
2567                                         temperature = <95000>;
2568                                         hysteresis = <1000>;
2569                                         type = "passive";
2570                                 };
2571                                 sensor3_crit: sensor3-crit {
2572                                         temperature = <120000>;
2573                                         hysteresis = <1000>;
2574                                         type = "critical";
2575                                 };
2576                         };
2577
2578                         cooling-maps {
2579                                 map0 {
2580                                         trip = <&sensor3_passive>;
2581                                         cooling-device = <&a57_0 5 5>;
2582                                 };
2583                         };
2584                 };
2585         };
2586
2587         timer {
2588                 compatible = "arm,armv8-timer";
2589                 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
2590                                       <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
2591                                       <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
2592                                       <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
2593         };
2594
2595         /* External USB clocks - can be overridden by the board */
2596         usb3s0_clk: usb3s0 {
2597                 compatible = "fixed-clock";
2598                 #clock-cells = <0>;
2599                 clock-frequency = <0>;
2600         };
2601
2602         usb_extal_clk: usb_extal {
2603                 compatible = "fixed-clock";
2604                 #clock-cells = <0>;
2605                 clock-frequency = <0>;
2606         };
2607 };