arch/arm64/boot/dts/renesas/r8a774a1.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the r8a774a1 SoC
   4  *
   5  * Copyright (C) 2018 Renesas Electronics Corp.
   6  */
   7
   8 #include <dt-bindings/interrupt-controller/irq.h>
   9 #include <dt-bindings/interrupt-controller/arm-gic.h>
  10 #include <dt-bindings/clock/r8a774a1-cpg-mssr.h>
  11 #include <dt-bindings/power/r8a774a1-sysc.h>
  12
  13 / {
  14         compatible = "renesas,r8a774a1";
  15         #address-cells = <2>;
  16         #size-cells = <2>;
  17
  18         aliases {
  19                 i2c0 = &i2c0;
  20                 i2c1 = &i2c1;
  21                 i2c2 = &i2c2;
  22                 i2c3 = &i2c3;
  23                 i2c4 = &i2c4;
  24                 i2c5 = &i2c5;
  25                 i2c6 = &i2c6;
  26                 i2c7 = &i2c_dvfs;
  27         };
  28
  29         /*
  30          * The external audio clocks are configured as 0 Hz fixed frequency
  31          * clocks by default.
  32          * Boards that provide audio clocks should override them.
  33          */
  34         audio_clk_a: audio_clk_a {
  35                 compatible = "fixed-clock";
  36                 #clock-cells = <0>;
  37                 clock-frequency = <0>;
  38         };
  39
  40         audio_clk_b: audio_clk_b {
  41                 compatible = "fixed-clock";
  42                 #clock-cells = <0>;
  43                 clock-frequency = <0>;
  44         };
  45
  46         audio_clk_c: audio_clk_c {
  47                 compatible = "fixed-clock";
  48                 #clock-cells = <0>;
  49                 clock-frequency = <0>;
  50         };
  51
  52         /* External CAN clock - to be overridden by boards that provide it */
  53         can_clk: can {
  54                 compatible = "fixed-clock";
  55                 #clock-cells = <0>;
  56                 clock-frequency = <0>;
  57         };
  58
  59         cluster0_opp: opp_table0 {
  60                 compatible = "operating-points-v2";
  61                 opp-shared;
  62
  63                 opp-500000000 {
  64                         opp-hz = /bits/ 64 <500000000>;
  65                         opp-microvolt = <820000>;
  66                         clock-latency-ns = <300000>;
  67                 };
  68                 opp-1000000000 {
  69                         opp-hz = /bits/ 64 <1000000000>;
  70                         opp-microvolt = <820000>;
  71                         clock-latency-ns = <300000>;
  72                 };
  73                 opp-1500000000 {
  74                         opp-hz = /bits/ 64 <1500000000>;
  75                         opp-microvolt = <820000>;
  76                         clock-latency-ns = <300000>;
  77                 };
  78         };
  79
  80         cluster1_opp: opp_table1 {
  81                 compatible = "operating-points-v2";
  82                 opp-shared;
  83
  84                 opp-800000000 {
  85                         opp-hz = /bits/ 64 <800000000>;
  86                         opp-microvolt = <820000>;
  87                         clock-latency-ns = <300000>;
  88                 };
  89                 opp-1000000000 {
  90                         opp-hz = /bits/ 64 <1000000000>;
  91                         opp-microvolt = <820000>;
  92                         clock-latency-ns = <300000>;
  93                 };
  94                 opp-1200000000 {
  95                         opp-hz = /bits/ 64 <1200000000>;
  96                         opp-microvolt = <820000>;
  97                         clock-latency-ns = <300000>;
  98                 };
  99         };
 100
 101         cpus {
 102                 #address-cells = <1>;
 103                 #size-cells = <0>;
 104
 105                 cpu-map {
 106                         cluster0 {
 107                                 core0 {
 108                                         cpu = <&a57_0>;
 109                                 };
 110                                 core1 {
 111                                         cpu = <&a57_1>;
 112                                 };
 113                         };
 114
 115                         cluster1 {
 116                                 core0 {
 117                                         cpu = <&a53_0>;
 118                                 };
 119                                 core1 {
 120                                         cpu = <&a53_1>;
 121                                 };
 122                                 core2 {
 123                                         cpu = <&a53_2>;
 124                                 };
 125                                 core3 {
 126                                         cpu = <&a53_3>;
 127                                 };
 128                         };
 129                 };
 130
 131                 a57_0: cpu@0 {
 132                         compatible = "arm,cortex-a57";
 133                         reg = <0x0>;
 134                         device_type = "cpu";
 135                         power-domains = <&sysc R8A774A1_PD_CA57_CPU0>;
 136                         next-level-cache = <&L2_CA57>;
 137                         enable-method = "psci";
 138                         dynamic-power-coefficient = <854>;
 139                         clocks = <&cpg CPG_CORE R8A774A1_CLK_Z>;
 140                         operating-points-v2 = <&cluster0_opp>;
 141                         capacity-dmips-mhz = <1024>;
 142                         #cooling-cells = <2>;
 143                 };
 144
 145                 a57_1: cpu@1 {
 146                         compatible = "arm,cortex-a57";
 147                         reg = <0x1>;
 148                         device_type = "cpu";
 149                         power-domains = <&sysc R8A774A1_PD_CA57_CPU1>;
 150                         next-level-cache = <&L2_CA57>;
 151                         enable-method = "psci";
 152                         clocks = <&cpg CPG_CORE R8A774A1_CLK_Z>;
 153                         operating-points-v2 = <&cluster0_opp>;
 154                         capacity-dmips-mhz = <1024>;
 155                         #cooling-cells = <2>;
 156                 };
 157
 158                 a53_0: cpu@100 {
 159                         compatible = "arm,cortex-a53";
 160                         reg = <0x100>;
 161                         device_type = "cpu";
 162                         power-domains = <&sysc R8A774A1_PD_CA53_CPU0>;
 163                         next-level-cache = <&L2_CA53>;
 164                         enable-method = "psci";
 165                         #cooling-cells = <2>;
 166                         dynamic-power-coefficient = <277>;
 167                         clocks = <&cpg CPG_CORE R8A774A1_CLK_Z2>;
 168                         operating-points-v2 = <&cluster1_opp>;
 169                         capacity-dmips-mhz = <560>;
 170                 };
 171
 172                 a53_1: cpu@101 {
 173                         compatible = "arm,cortex-a53";
 174                         reg = <0x101>;
 175                         device_type = "cpu";
 176                         power-domains = <&sysc R8A774A1_PD_CA53_CPU1>;
 177                         next-level-cache = <&L2_CA53>;
 178                         enable-method = "psci";
 179                         clocks = <&cpg CPG_CORE R8A774A1_CLK_Z2>;
 180                         operating-points-v2 = <&cluster1_opp>;
 181                         capacity-dmips-mhz = <560>;
 182                 };
 183
 184                 a53_2: cpu@102 {
 185                         compatible = "arm,cortex-a53";
 186                         reg = <0x102>;
 187                         device_type = "cpu";
 188                         power-domains = <&sysc R8A774A1_PD_CA53_CPU2>;
 189                         next-level-cache = <&L2_CA53>;
 190                         enable-method = "psci";
 191                         clocks = <&cpg CPG_CORE R8A774A1_CLK_Z2>;
 192                         operating-points-v2 = <&cluster1_opp>;
 193                         capacity-dmips-mhz = <560>;
 194                 };
 195
 196                 a53_3: cpu@103 {
 197                         compatible = "arm,cortex-a53";
 198                         reg = <0x103>;
 199                         device_type = "cpu";
 200                         power-domains = <&sysc R8A774A1_PD_CA53_CPU3>;
 201                         next-level-cache = <&L2_CA53>;
 202                         enable-method = "psci";
 203                         clocks = <&cpg CPG_CORE R8A774A1_CLK_Z2>;
 204                         operating-points-v2 = <&cluster1_opp>;
 205                         capacity-dmips-mhz = <560>;
 206                 };
 207
 208                 L2_CA57: cache-controller-0 {
 209                         compatible = "cache";
 210                         power-domains = <&sysc R8A774A1_PD_CA57_SCU>;
 211                         cache-unified;
 212                         cache-level = <2>;
 213                 };
 214
 215                 L2_CA53: cache-controller-1 {
 216                         compatible = "cache";
 217                         power-domains = <&sysc R8A774A1_PD_CA53_SCU>;
 218                         cache-unified;
 219                         cache-level = <2>;
 220                 };
 221         };
 222
 223         extal_clk: extal {
 224                 compatible = "fixed-clock";
 225                 #clock-cells = <0>;
 226                 /* This value must be overridden by the board */
 227                 clock-frequency = <0>;
 228         };
 229
 230         extalr_clk: extalr {
 231                 compatible = "fixed-clock";
 232                 #clock-cells = <0>;
 233                 /* This value must be overridden by the board */
 234                 clock-frequency = <0>;
 235         };
 236
 237         /* External PCIe clock - can be overridden by the board */
 238         pcie_bus_clk: pcie_bus {
 239                 compatible = "fixed-clock";
 240                 #clock-cells = <0>;
 241                 clock-frequency = <0>;
 242         };
 243
 244         pmu_a53 {
 245                 compatible = "arm,cortex-a53-pmu";
 246                 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
 247                                       <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
 248                                       <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
 249                                       <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
 250                 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>;
 251         };
 252
 253         pmu_a57 {
 254                 compatible = "arm,cortex-a57-pmu";
 255                 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 256                                       <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 257                 interrupt-affinity = <&a57_0>, <&a57_1>;
 258         };
 259
 260         psci {
 261                 compatible = "arm,psci-1.0", "arm,psci-0.2";
 262                 method = "smc";
 263         };
 264
 265         /* External SCIF clock - to be overridden by boards that provide it */
 266         scif_clk: scif {
 267                 compatible = "fixed-clock";
 268                 #clock-cells = <0>;
 269                 clock-frequency = <0>;
 270         };
 271
 272         soc {
 273                 compatible = "simple-bus";
 274                 interrupt-parent = <&gic>;
 275                 #address-cells = <2>;
 276                 #size-cells = <2>;
 277                 ranges;
 278
 279                 rwdt: watchdog@e6020000 {
 280                         compatible = "renesas,r8a774a1-wdt",
 281                                      "renesas,rcar-gen3-wdt";
 282                         reg = <0 0xe6020000 0 0x0c>;
 283                         clocks = <&cpg CPG_MOD 402>;
 284                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 285                         resets = <&cpg 402>;
 286                         status = "disabled";
 287                 };
 288
 289                 gpio0: gpio@e6050000 {
 290                         compatible = "renesas,gpio-r8a774a1",
 291                                      "renesas,rcar-gen3-gpio";
 292                         reg = <0 0xe6050000 0 0x50>;
 293                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 294                         #gpio-cells = <2>;
 295                         gpio-controller;
 296                         gpio-ranges = <&pfc 0 0 16>;
 297                         #interrupt-cells = <2>;
 298                         interrupt-controller;
 299                         clocks = <&cpg CPG_MOD 912>;
 300                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 301                         resets = <&cpg 912>;
 302                 };
 303
 304                 gpio1: gpio@e6051000 {
 305                         compatible = "renesas,gpio-r8a774a1",
 306                                      "renesas,rcar-gen3-gpio";
 307                         reg = <0 0xe6051000 0 0x50>;
 308                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 309                         #gpio-cells = <2>;
 310                         gpio-controller;
 311                         gpio-ranges = <&pfc 0 32 29>;
 312                         #interrupt-cells = <2>;
 313                         interrupt-controller;
 314                         clocks = <&cpg CPG_MOD 911>;
 315                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 316                         resets = <&cpg 911>;
 317                 };
 318
 319                 gpio2: gpio@e6052000 {
 320                         compatible = "renesas,gpio-r8a774a1",
 321                                      "renesas,rcar-gen3-gpio";
 322                         reg = <0 0xe6052000 0 0x50>;
 323                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 324                         #gpio-cells = <2>;
 325                         gpio-controller;
 326                         gpio-ranges = <&pfc 0 64 15>;
 327                         #interrupt-cells = <2>;
 328                         interrupt-controller;
 329                         clocks = <&cpg CPG_MOD 910>;
 330                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 331                         resets = <&cpg 910>;
 332                 };
 333
 334                 gpio3: gpio@e6053000 {
 335                         compatible = "renesas,gpio-r8a774a1",
 336                                      "renesas,rcar-gen3-gpio";
 337                         reg = <0 0xe6053000 0 0x50>;
 338                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 339                         #gpio-cells = <2>;
 340                         gpio-controller;
 341                         gpio-ranges = <&pfc 0 96 16>;
 342                         #interrupt-cells = <2>;
 343                         interrupt-controller;
 344                         clocks = <&cpg CPG_MOD 909>;
 345                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 346                         resets = <&cpg 909>;
 347                 };
 348
 349                 gpio4: gpio@e6054000 {
 350                         compatible = "renesas,gpio-r8a774a1",
 351                                      "renesas,rcar-gen3-gpio";
 352                         reg = <0 0xe6054000 0 0x50>;
 353                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 354                         #gpio-cells = <2>;
 355                         gpio-controller;
 356                         gpio-ranges = <&pfc 0 128 18>;
 357                         #interrupt-cells = <2>;
 358                         interrupt-controller;
 359                         clocks = <&cpg CPG_MOD 908>;
 360                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 361                         resets = <&cpg 908>;
 362                 };
 363
 364                 gpio5: gpio@e6055000 {
 365                         compatible = "renesas,gpio-r8a774a1",
 366                                      "renesas,rcar-gen3-gpio";
 367                         reg = <0 0xe6055000 0 0x50>;
 368                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 369                         #gpio-cells = <2>;
 370                         gpio-controller;
 371                         gpio-ranges = <&pfc 0 160 26>;
 372                         #interrupt-cells = <2>;
 373                         interrupt-controller;
 374                         clocks = <&cpg CPG_MOD 907>;
 375                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 376                         resets = <&cpg 907>;
 377                 };
 378
 379                 gpio6: gpio@e6055400 {
 380                         compatible = "renesas,gpio-r8a774a1",
 381                                      "renesas,rcar-gen3-gpio";
 382                         reg = <0 0xe6055400 0 0x50>;
 383                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 384                         #gpio-cells = <2>;
 385                         gpio-controller;
 386                         gpio-ranges = <&pfc 0 192 32>;
 387                         #interrupt-cells = <2>;
 388                         interrupt-controller;
 389                         clocks = <&cpg CPG_MOD 906>;
 390                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 391                         resets = <&cpg 906>;
 392                 };
 393
 394                 gpio7: gpio@e6055800 {
 395                         compatible = "renesas,gpio-r8a774a1",
 396                                      "renesas,rcar-gen3-gpio";
 397                         reg = <0 0xe6055800 0 0x50>;
 398                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 399                         #gpio-cells = <2>;
 400                         gpio-controller;
 401                         gpio-ranges = <&pfc 0 224 4>;
 402                         #interrupt-cells = <2>;
 403                         interrupt-controller;
 404                         clocks = <&cpg CPG_MOD 905>;
 405                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 406                         resets = <&cpg 905>;
 407                 };
 408
 409                 pfc: pin-controller@e6060000 {
 410                         compatible = "renesas,pfc-r8a774a1";
 411                         reg = <0 0xe6060000 0 0x50c>;
 412                 };
 413
 414                 cmt0: timer@e60f0000 {
 415                         compatible = "renesas,r8a774a1-cmt0",
 416                                      "renesas,rcar-gen3-cmt0";
 417                         reg = <0 0xe60f0000 0 0x1004>;
 418                         interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
 419                                      <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
 420                         clocks = <&cpg CPG_MOD 303>;
 421                         clock-names = "fck";
 422                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 423                         resets = <&cpg 303>;
 424                         status = "disabled";
 425                 };
 426
 427                 cmt1: timer@e6130000 {
 428                         compatible = "renesas,r8a774a1-cmt1",
 429                                      "renesas,rcar-gen3-cmt1";
 430                         reg = <0 0xe6130000 0 0x1004>;
 431                         interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
 432                                      <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
 433                                      <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
 434                                      <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
 435                                      <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
 436                                      <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
 437                                      <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
 438                                      <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
 439                         clocks = <&cpg CPG_MOD 302>;
 440                         clock-names = "fck";
 441                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 442                         resets = <&cpg 302>;
 443                         status = "disabled";
 444                 };
 445
 446                 cmt2: timer@e6140000 {
 447                         compatible = "renesas,r8a774a1-cmt1",
 448                                      "renesas,rcar-gen3-cmt1";
 449                         reg = <0 0xe6140000 0 0x1004>;
 450                         interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
 451                                      <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
 452                                      <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
 453                                      <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
 454                                      <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
 455                                      <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
 456                                      <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
 457                                      <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
 458                         clocks = <&cpg CPG_MOD 301>;
 459                         clock-names = "fck";
 460                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 461                         resets = <&cpg 301>;
 462                         status = "disabled";
 463                 };
 464
 465                 cmt3: timer@e6148000 {
 466                         compatible = "renesas,r8a774a1-cmt1",
 467                                      "renesas,rcar-gen3-cmt1";
 468                         reg = <0 0xe6148000 0 0x1004>;
 469                         interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
 470                                      <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
 471                                      <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
 472                                      <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
 473                                      <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
 474                                      <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
 475                                      <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
 476                                      <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
 477                         clocks = <&cpg CPG_MOD 300>;
 478                         clock-names = "fck";
 479                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 480                         resets = <&cpg 300>;
 481                         status = "disabled";
 482                 };
 483
 484                 cpg: clock-controller@e6150000 {
 485                         compatible = "renesas,r8a774a1-cpg-mssr";
 486                         reg = <0 0xe6150000 0 0x0bb0>;
 487                         clocks = <&extal_clk>, <&extalr_clk>;
 488                         clock-names = "extal", "extalr";
 489                         #clock-cells = <2>;
 490                         #power-domain-cells = <0>;
 491                         #reset-cells = <1>;
 492                 };
 493
 494                 rst: reset-controller@e6160000 {
 495                         compatible = "renesas,r8a774a1-rst";
 496                         reg = <0 0xe6160000 0 0x018c>;
 497                 };
 498
 499                 sysc: system-controller@e6180000 {
 500                         compatible = "renesas,r8a774a1-sysc";
 501                         reg = <0 0xe6180000 0 0x0400>;
 502                         #power-domain-cells = <1>;
 503                 };
 504
 505                 tsc: thermal@e6198000 {
 506                         compatible = "renesas,r8a774a1-thermal";
 507                         reg = <0 0xe6198000 0 0x100>,
 508                               <0 0xe61a0000 0 0x100>,
 509                               <0 0xe61a8000 0 0x100>;
 510                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
 511                                      <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
 512                                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 513                         clocks = <&cpg CPG_MOD 522>;
 514                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 515                         resets = <&cpg 522>;
 516                         #thermal-sensor-cells = <1>;
 517                 };
 518
 519                 intc_ex: interrupt-controller@e61c0000 {
 520                         compatible = "renesas,intc-ex-r8a774a1", "renesas,irqc";
 521                         #interrupt-cells = <2>;
 522                         interrupt-controller;
 523                         reg = <0 0xe61c0000 0 0x200>;
 524                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
 525                                       GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
 526                                       GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
 527                                       GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
 528                                       GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
 529                                       GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 530                         clocks = <&cpg CPG_MOD 407>;
 531                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 532                         resets = <&cpg 407>;
 533                 };
 534
 535                 tmu0: timer@e61e0000 {
 536                         compatible = "renesas,tmu-r8a774a1", "renesas,tmu";
 537                         reg = <0 0xe61e0000 0 0x30>;
 538                         interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
 539                                      <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
 540                                      <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
 541                         clocks = <&cpg CPG_MOD 125>;
 542                         clock-names = "fck";
 543                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 544                         resets = <&cpg 125>;
 545                         status = "disabled";
 546                 };
 547
 548                 tmu1: timer@e6fc0000 {
 549                         compatible = "renesas,tmu-r8a774a1", "renesas,tmu";
 550                         reg = <0 0xe6fc0000 0 0x30>;
 551                         interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
 552                                      <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
 553                                      <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
 554                         clocks = <&cpg CPG_MOD 124>;
 555                         clock-names = "fck";
 556                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 557                         resets = <&cpg 124>;
 558                         status = "disabled";
 559                 };
 560
 561                 tmu2: timer@e6fd0000 {
 562                         compatible = "renesas,tmu-r8a774a1", "renesas,tmu";
 563                         reg = <0 0xe6fd0000 0 0x30>;
 564                         interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
 565                                      <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
 566                                      <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
 567                         clocks = <&cpg CPG_MOD 123>;
 568                         clock-names = "fck";
 569                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 570                         resets = <&cpg 123>;
 571                         status = "disabled";
 572                 };
 573
 574                 tmu3: timer@e6fe0000 {
 575                         compatible = "renesas,tmu-r8a774a1", "renesas,tmu";
 576                         reg = <0 0xe6fe0000 0 0x30>;
 577                         interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
 578                                      <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
 579                                      <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
 580                         clocks = <&cpg CPG_MOD 122>;
 581                         clock-names = "fck";
 582                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 583                         resets = <&cpg 122>;
 584                         status = "disabled";
 585                 };
 586
 587                 tmu4: timer@ffc00000 {
 588                         compatible = "renesas,tmu-r8a774a1", "renesas,tmu";
 589                         reg = <0 0xffc00000 0 0x30>;
 590                         interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
 591                                      <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
 592                                      <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
 593                         clocks = <&cpg CPG_MOD 121>;
 594                         clock-names = "fck";
 595                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 596                         resets = <&cpg 121>;
 597                         status = "disabled";
 598                 };
 599
 600                 i2c0: i2c@e6500000 {
 601                         #address-cells = <1>;
 602                         #size-cells = <0>;
 603                         compatible = "renesas,i2c-r8a774a1",
 604                                      "renesas,rcar-gen3-i2c";
 605                         reg = <0 0xe6500000 0 0x40>;
 606                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 607                         clocks = <&cpg CPG_MOD 931>;
 608                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 609                         resets = <&cpg 931>;
 610                         dmas = <&dmac1 0x91>, <&dmac1 0x90>,
 611                                <&dmac2 0x91>, <&dmac2 0x90>;
 612                         dma-names = "tx", "rx", "tx", "rx";
 613                         i2c-scl-internal-delay-ns = <110>;
 614                         status = "disabled";
 615                 };
 616
 617                 i2c1: i2c@e6508000 {
 618                         #address-cells = <1>;
 619                         #size-cells = <0>;
 620                         compatible = "renesas,i2c-r8a774a1",
 621                                      "renesas,rcar-gen3-i2c";
 622                         reg = <0 0xe6508000 0 0x40>;
 623                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 624                         clocks = <&cpg CPG_MOD 930>;
 625                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 626                         resets = <&cpg 930>;
 627                         dmas = <&dmac1 0x93>, <&dmac1 0x92>,
 628                                <&dmac2 0x93>, <&dmac2 0x92>;
 629                         dma-names = "tx", "rx", "tx", "rx";
 630                         i2c-scl-internal-delay-ns = <6>;
 631                         status = "disabled";
 632                 };
 633
 634                 i2c2: i2c@e6510000 {
 635                         #address-cells = <1>;
 636                         #size-cells = <0>;
 637                         compatible = "renesas,i2c-r8a774a1",
 638                                      "renesas,rcar-gen3-i2c";
 639                         reg = <0 0xe6510000 0 0x40>;
 640                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 641                         clocks = <&cpg CPG_MOD 929>;
 642                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 643                         resets = <&cpg 929>;
 644                         dmas = <&dmac1 0x95>, <&dmac1 0x94>,
 645                                <&dmac2 0x95>, <&dmac2 0x94>;
 646                         dma-names = "tx", "rx", "tx", "rx";
 647                         i2c-scl-internal-delay-ns = <6>;
 648                         status = "disabled";
 649                 };
 650
 651                 i2c3: i2c@e66d0000 {
 652                         #address-cells = <1>;
 653                         #size-cells = <0>;
 654                         compatible = "renesas,i2c-r8a774a1",
 655                                      "renesas,rcar-gen3-i2c";
 656                         reg = <0 0xe66d0000 0 0x40>;
 657                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 658                         clocks = <&cpg CPG_MOD 928>;
 659                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 660                         resets = <&cpg 928>;
 661                         dmas = <&dmac0 0x97>, <&dmac0 0x96>;
 662                         dma-names = "tx", "rx";
 663                         i2c-scl-internal-delay-ns = <110>;
 664                         status = "disabled";
 665                 };
 666
 667                 i2c4: i2c@e66d8000 {
 668                         #address-cells = <1>;
 669                         #size-cells = <0>;
 670                         compatible = "renesas,i2c-r8a774a1",
 671                                      "renesas,rcar-gen3-i2c";
 672                         reg = <0 0xe66d8000 0 0x40>;
 673                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 674                         clocks = <&cpg CPG_MOD 927>;
 675                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 676                         resets = <&cpg 927>;
 677                         dmas = <&dmac0 0x99>, <&dmac0 0x98>;
 678                         dma-names = "tx", "rx";
 679                         i2c-scl-internal-delay-ns = <110>;
 680                         status = "disabled";
 681                 };
 682
 683                 i2c5: i2c@e66e0000 {
 684                         #address-cells = <1>;
 685                         #size-cells = <0>;
 686                         compatible = "renesas,i2c-r8a774a1",
 687                                      "renesas,rcar-gen3-i2c";
 688                         reg = <0 0xe66e0000 0 0x40>;
 689                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 690                         clocks = <&cpg CPG_MOD 919>;
 691                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 692                         resets = <&cpg 919>;
 693                         dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
 694                         dma-names = "tx", "rx";
 695                         i2c-scl-internal-delay-ns = <110>;
 696                         status = "disabled";
 697                 };
 698
 699                 i2c6: i2c@e66e8000 {
 700                         #address-cells = <1>;
 701                         #size-cells = <0>;
 702                         compatible = "renesas,i2c-r8a774a1",
 703                                      "renesas,rcar-gen3-i2c";
 704                         reg = <0 0xe66e8000 0 0x40>;
 705                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 706                         clocks = <&cpg CPG_MOD 918>;
 707                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 708                         resets = <&cpg 918>;
 709                         dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
 710                         dma-names = "tx", "rx";
 711                         i2c-scl-internal-delay-ns = <6>;
 712                         status = "disabled";
 713                 };
 714
 715                 i2c_dvfs: i2c@e60b0000 {
 716                         #address-cells = <1>;
 717                         #size-cells = <0>;
 718                         compatible = "renesas,iic-r8a774a1",
 719                                      "renesas,rcar-gen3-iic",
 720                                      "renesas,rmobile-iic";
 721                         reg = <0 0xe60b0000 0 0x425>;
 722                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 723                         clocks = <&cpg CPG_MOD 926>;
 724                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 725                         resets = <&cpg 926>;
 726                         dmas = <&dmac0 0x11>, <&dmac0 0x10>;
 727                         dma-names = "tx", "rx";
 728                         status = "disabled";
 729                 };
 730
 731                 hscif0: serial@e6540000 {
 732                         compatible = "renesas,hscif-r8a774a1",
 733                                      "renesas,rcar-gen3-hscif",
 734                                      "renesas,hscif";
 735                         reg = <0 0xe6540000 0 0x60>;
 736                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 737                         clocks = <&cpg CPG_MOD 520>,
 738                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
 739                                  <&scif_clk>;
 740                         clock-names = "fck", "brg_int", "scif_clk";
 741                         dmas = <&dmac1 0x31>, <&dmac1 0x30>,
 742                                <&dmac2 0x31>, <&dmac2 0x30>;
 743                         dma-names = "tx", "rx", "tx", "rx";
 744                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 745                         resets = <&cpg 520>;
 746                         status = "disabled";
 747                 };
 748
 749                 hscif1: serial@e6550000 {
 750                         compatible = "renesas,hscif-r8a774a1",
 751                                      "renesas,rcar-gen3-hscif",
 752                                      "renesas,hscif";
 753                         reg = <0 0xe6550000 0 0x60>;
 754                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 755                         clocks = <&cpg CPG_MOD 519>,
 756                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
 757                                  <&scif_clk>;
 758                         clock-names = "fck", "brg_int", "scif_clk";
 759                         dmas = <&dmac1 0x33>, <&dmac1 0x32>,
 760                                <&dmac2 0x33>, <&dmac2 0x32>;
 761                         dma-names = "tx", "rx", "tx", "rx";
 762                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 763                         resets = <&cpg 519>;
 764                         status = "disabled";
 765                 };
 766
 767                 hscif2: serial@e6560000 {
 768                         compatible = "renesas,hscif-r8a774a1",
 769                                      "renesas,rcar-gen3-hscif",
 770                                      "renesas,hscif";
 771                         reg = <0 0xe6560000 0 0x60>;
 772                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 773                         clocks = <&cpg CPG_MOD 518>,
 774                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
 775                                  <&scif_clk>;
 776                         clock-names = "fck", "brg_int", "scif_clk";
 777                         dmas = <&dmac1 0x35>, <&dmac1 0x34>,
 778                                <&dmac2 0x35>, <&dmac2 0x34>;
 779                         dma-names = "tx", "rx", "tx", "rx";
 780                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 781                         resets = <&cpg 518>;
 782                         status = "disabled";
 783                 };
 784
 785                 hscif3: serial@e66a0000 {
 786                         compatible = "renesas,hscif-r8a774a1",
 787                                      "renesas,rcar-gen3-hscif",
 788                                      "renesas,hscif";
 789                         reg = <0 0xe66a0000 0 0x60>;
 790                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 791                         clocks = <&cpg CPG_MOD 517>,
 792                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
 793                                  <&scif_clk>;
 794                         clock-names = "fck", "brg_int", "scif_clk";
 795                         dmas = <&dmac0 0x37>, <&dmac0 0x36>;
 796                         dma-names = "tx", "rx";
 797                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 798                         resets = <&cpg 517>;
 799                         status = "disabled";
 800                 };
 801
 802                 hscif4: serial@e66b0000 {
 803                         compatible = "renesas,hscif-r8a774a1",
 804                                      "renesas,rcar-gen3-hscif",
 805                                      "renesas,hscif";
 806                         reg = <0 0xe66b0000 0 0x60>;
 807                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
 808                         clocks = <&cpg CPG_MOD 516>,
 809                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
 810                                  <&scif_clk>;
 811                         clock-names = "fck", "brg_int", "scif_clk";
 812                         dmas = <&dmac0 0x39>, <&dmac0 0x38>;
 813                         dma-names = "tx", "rx";
 814                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 815                         resets = <&cpg 516>;
 816                         status = "disabled";
 817                 };
 818
 819                 hsusb: usb@e6590000 {
 820                         compatible = "renesas,usbhs-r8a774a1",
 821                                      "renesas,rcar-gen3-usbhs";
 822                         reg = <0 0xe6590000 0 0x200>;
 823                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
 824                         clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
 825                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
 826                                <&usb_dmac1 0>, <&usb_dmac1 1>;
 827                         dma-names = "ch0", "ch1", "ch2", "ch3";
 828                         renesas,buswait = <11>;
 829                         phys = <&usb2_phy0 3>;
 830                         phy-names = "usb";
 831                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 832                         resets = <&cpg 704>, <&cpg 703>;
 833                         status = "disabled";
 834                 };
 835
 836                 usb_dmac0: dma-controller@e65a0000 {
 837                         compatible = "renesas,r8a774a1-usb-dmac",
 838                                      "renesas,usb-dmac";
 839                         reg = <0 0xe65a0000 0 0x100>;
 840                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
 841                                       GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 842                         interrupt-names = "ch0", "ch1";
 843                         clocks = <&cpg CPG_MOD 330>;
 844                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 845                         resets = <&cpg 330>;
 846                         #dma-cells = <1>;
 847                         dma-channels = <2>;
 848                 };
 849
 850                 usb_dmac1: dma-controller@e65b0000 {
 851                         compatible = "renesas,r8a774a1-usb-dmac",
 852                                      "renesas,usb-dmac";
 853                         reg = <0 0xe65b0000 0 0x100>;
 854                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
 855                                       GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 856                         interrupt-names = "ch0", "ch1";
 857                         clocks = <&cpg CPG_MOD 331>;
 858                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 859                         resets = <&cpg 331>;
 860                         #dma-cells = <1>;
 861                         dma-channels = <2>;
 862                 };
 863
 864                 usb3_phy0: usb-phy@e65ee000 {
 865                         compatible = "renesas,r8a774a1-usb3-phy",
 866                                      "renesas,rcar-gen3-usb3-phy";
 867                         reg = <0 0xe65ee000 0 0x90>;
 868                         clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
 869                                  <&usb_extal_clk>;
 870                         clock-names = "usb3-if", "usb3s_clk", "usb_extal";
 871                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 872                         resets = <&cpg 328>;
 873                         #phy-cells = <0>;
 874                         status = "disabled";
 875                 };
 876
 877                 dmac0: dma-controller@e6700000 {
 878                         compatible = "renesas,dmac-r8a774a1",
 879                                      "renesas,rcar-dmac";
 880                         reg = <0 0xe6700000 0 0x10000>;
 881                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
 882                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 883                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 884                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 885                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 886                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 887                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 888                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 889                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 890                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 891                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 892                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 893                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 894                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 895                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 896                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
 897                                       GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 898                         interrupt-names = "error",
 899                                         "ch0", "ch1", "ch2", "ch3",
 900                                         "ch4", "ch5", "ch6", "ch7",
 901                                         "ch8", "ch9", "ch10", "ch11",
 902                                         "ch12", "ch13", "ch14", "ch15";
 903                         clocks = <&cpg CPG_MOD 219>;
 904                         clock-names = "fck";
 905                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 906                         resets = <&cpg 219>;
 907                         #dma-cells = <1>;
 908                         dma-channels = <16>;
 909                         iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
 910                                <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
 911                                <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
 912                                <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
 913                                <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
 914                                <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
 915                                <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
 916                                <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
 917                 };
 918
 919                 dmac1: dma-controller@e7300000 {
 920                         compatible = "renesas,dmac-r8a774a1",
 921                                      "renesas,rcar-dmac";
 922                         reg = <0 0xe7300000 0 0x10000>;
 923                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 924                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 925                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 926                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 927                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 928                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 929                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 930                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 931                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 932                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 933                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 934                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 935                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 936                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 937                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 938                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
 939                                       GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
 940                         interrupt-names = "error",
 941                                         "ch0", "ch1", "ch2", "ch3",
 942                                         "ch4", "ch5", "ch6", "ch7",
 943                                         "ch8", "ch9", "ch10", "ch11",
 944                                         "ch12", "ch13", "ch14", "ch15";
 945                         clocks = <&cpg CPG_MOD 218>;
 946                         clock-names = "fck";
 947                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 948                         resets = <&cpg 218>;
 949                         #dma-cells = <1>;
 950                         dma-channels = <16>;
 951                         iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
 952                                <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
 953                                <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
 954                                <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
 955                                <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
 956                                <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
 957                                <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
 958                                <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
 959                 };
 960
 961                 dmac2: dma-controller@e7310000 {
 962                         compatible = "renesas,dmac-r8a774a1",
 963                                      "renesas,rcar-dmac";
 964                         reg = <0 0xe7310000 0 0x10000>;
 965                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
 966                                       GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
 967                                       GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
 968                                       GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
 969                                       GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
 970                                       GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
 971                                       GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
 972                                       GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
 973                                       GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
 974                                       GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
 975                                       GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
 976                                       GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
 977                                       GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
 978                                       GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
 979                                       GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
 980                                       GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
 981                                       GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
 982                         interrupt-names = "error",
 983                                         "ch0", "ch1", "ch2", "ch3",
 984                                         "ch4", "ch5", "ch6", "ch7",
 985                                         "ch8", "ch9", "ch10", "ch11",
 986                                         "ch12", "ch13", "ch14", "ch15";
 987                         clocks = <&cpg CPG_MOD 217>;
 988                         clock-names = "fck";
 989                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 990                         resets = <&cpg 217>;
 991                         #dma-cells = <1>;
 992                         dma-channels = <16>;
 993                         iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
 994                                <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
 995                                <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
 996                                <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
 997                                <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
 998                                <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
 999                                <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
1000                                <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
1001                 };
1002
1003                 ipmmu_ds0: mmu@e6740000 {
1004                         compatible = "renesas,ipmmu-r8a774a1";
1005                         reg = <0 0xe6740000 0 0x1000>;
1006                         renesas,ipmmu-main = <&ipmmu_mm 0>;
1007                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1008                         #iommu-cells = <1>;
1009                 };
1010
1011                 ipmmu_ds1: mmu@e7740000 {
1012                         compatible = "renesas,ipmmu-r8a774a1";
1013                         reg = <0 0xe7740000 0 0x1000>;
1014                         renesas,ipmmu-main = <&ipmmu_mm 1>;
1015                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1016                         #iommu-cells = <1>;
1017                 };
1018
1019                 ipmmu_hc: mmu@e6570000 {
1020                         compatible = "renesas,ipmmu-r8a774a1";
1021                         reg = <0 0xe6570000 0 0x1000>;
1022                         renesas,ipmmu-main = <&ipmmu_mm 2>;
1023                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1024                         #iommu-cells = <1>;
1025                 };
1026
1027                 ipmmu_mm: mmu@e67b0000 {
1028                         compatible = "renesas,ipmmu-r8a774a1";
1029                         reg = <0 0xe67b0000 0 0x1000>;
1030                         interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
1031                                      <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
1032                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1033                         #iommu-cells = <1>;
1034                 };
1035
1036                 ipmmu_mp: mmu@ec670000 {
1037                         compatible = "renesas,ipmmu-r8a774a1";
1038                         reg = <0 0xec670000 0 0x1000>;
1039                         renesas,ipmmu-main = <&ipmmu_mm 4>;
1040                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1041                         #iommu-cells = <1>;
1042                 };
1043
1044                 ipmmu_pv0: mmu@fd800000 {
1045                         compatible = "renesas,ipmmu-r8a774a1";
1046                         reg = <0 0xfd800000 0 0x1000>;
1047                         renesas,ipmmu-main = <&ipmmu_mm 5>;
1048                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1049                         #iommu-cells = <1>;
1050                 };
1051
1052                 ipmmu_pv1: mmu@fd950000 {
1053                         compatible = "renesas,ipmmu-r8a774a1";
1054                         reg = <0 0xfd950000 0 0x1000>;
1055                         renesas,ipmmu-main = <&ipmmu_mm 6>;
1056                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1057                         #iommu-cells = <1>;
1058                 };
1059
1060                 ipmmu_vc0: mmu@fe6b0000 {
1061                         compatible = "renesas,ipmmu-r8a774a1";
1062                         reg = <0 0xfe6b0000 0 0x1000>;
1063                         renesas,ipmmu-main = <&ipmmu_mm 8>;
1064                         power-domains = <&sysc R8A774A1_PD_A3VC>;
1065                         #iommu-cells = <1>;
1066                 };
1067
1068                 ipmmu_vi0: mmu@febd0000 {
1069                         compatible = "renesas,ipmmu-r8a774a1";
1070                         reg = <0 0xfebd0000 0 0x1000>;
1071                         renesas,ipmmu-main = <&ipmmu_mm 9>;
1072                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1073                         #iommu-cells = <1>;
1074                 };
1075
1076                 avb: ethernet@e6800000 {
1077                         compatible = "renesas,etheravb-r8a774a1",
1078                                      "renesas,etheravb-rcar-gen3";
1079                         reg = <0 0xe6800000 0 0x800>;
1080                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
1081                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
1082                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
1083                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
1084                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
1085                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
1086                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
1087                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
1088                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
1089                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
1090                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
1091                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
1092                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
1093                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
1094                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
1095                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
1096                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
1097                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
1098                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
1099                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
1100                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
1101                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
1102                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
1103                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
1104                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
1105                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
1106                                           "ch4", "ch5", "ch6", "ch7",
1107                                           "ch8", "ch9", "ch10", "ch11",
1108                                           "ch12", "ch13", "ch14", "ch15",
1109                                           "ch16", "ch17", "ch18", "ch19",
1110                                           "ch20", "ch21", "ch22", "ch23",
1111                                           "ch24";
1112                         clocks = <&cpg CPG_MOD 812>;
1113                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1114                         resets = <&cpg 812>;
1115                         phy-mode = "rgmii";
1116                         iommus = <&ipmmu_ds0 16>;
1117                         #address-cells = <1>;
1118                         #size-cells = <0>;
1119                         status = "disabled";
1120                 };
1121
1122                 can0: can@e6c30000 {
1123                         compatible = "renesas,can-r8a774a1",
1124                                      "renesas,rcar-gen3-can";
1125                         reg = <0 0xe6c30000 0 0x1000>;
1126                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1127                         clocks = <&cpg CPG_MOD 916>,
1128                                  <&cpg CPG_CORE R8A774A1_CLK_CANFD>,
1129                                  <&can_clk>;
1130                         clock-names = "clkp1", "clkp2", "can_clk";
1131                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1132                         resets = <&cpg 916>;
1133                         status = "disabled";
1134                 };
1135
1136                 can1: can@e6c38000 {
1137                         compatible = "renesas,can-r8a774a1",
1138                                      "renesas,rcar-gen3-can";
1139                         reg = <0 0xe6c38000 0 0x1000>;
1140                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1141                         clocks = <&cpg CPG_MOD 915>,
1142                                  <&cpg CPG_CORE R8A774A1_CLK_CANFD>,
1143                                  <&can_clk>;
1144                         clock-names = "clkp1", "clkp2", "can_clk";
1145                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1146                         resets = <&cpg 915>;
1147                         status = "disabled";
1148                 };
1149
1150                 pwm0: pwm@e6e30000 {
1151                         compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
1152                         reg = <0 0xe6e30000 0 0x8>;
1153                         #pwm-cells = <2>;
1154                         clocks = <&cpg CPG_MOD 523>;
1155                         resets = <&cpg 523>;
1156                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1157                         status = "disabled";
1158                 };
1159
1160                 pwm1: pwm@e6e31000 {
1161                         compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
1162                         reg = <0 0xe6e31000 0 0x8>;
1163                         #pwm-cells = <2>;
1164                         clocks = <&cpg CPG_MOD 523>;
1165                         resets = <&cpg 523>;
1166                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1167                         status = "disabled";
1168                 };
1169
1170                 pwm2: pwm@e6e32000 {
1171                         compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
1172                         reg = <0 0xe6e32000 0 0x8>;
1173                         #pwm-cells = <2>;
1174                         clocks = <&cpg CPG_MOD 523>;
1175                         resets = <&cpg 523>;
1176                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1177                         status = "disabled";
1178                 };
1179
1180                 pwm3: pwm@e6e33000 {
1181                         compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
1182                         reg = <0 0xe6e33000 0 0x8>;
1183                         #pwm-cells = <2>;
1184                         clocks = <&cpg CPG_MOD 523>;
1185                         resets = <&cpg 523>;
1186                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1187                         status = "disabled";
1188                 };
1189
1190                 pwm4: pwm@e6e34000 {
1191                         compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
1192                         reg = <0 0xe6e34000 0 0x8>;
1193                         #pwm-cells = <2>;
1194                         clocks = <&cpg CPG_MOD 523>;
1195                         resets = <&cpg 523>;
1196                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1197                         status = "disabled";
1198                 };
1199
1200                 pwm5: pwm@e6e35000 {
1201                         compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
1202                         reg = <0 0xe6e35000 0 0x8>;
1203                         #pwm-cells = <2>;
1204                         clocks = <&cpg CPG_MOD 523>;
1205                         resets = <&cpg 523>;
1206                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1207                         status = "disabled";
1208                 };
1209
1210                 pwm6: pwm@e6e36000 {
1211                         compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
1212                         reg = <0 0xe6e36000 0 0x8>;
1213                         #pwm-cells = <2>;
1214                         clocks = <&cpg CPG_MOD 523>;
1215                         resets = <&cpg 523>;
1216                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1217                         status = "disabled";
1218                 };
1219
1220                 scif0: serial@e6e60000 {
1221                         compatible = "renesas,scif-r8a774a1",
1222                                      "renesas,rcar-gen3-scif", "renesas,scif";
1223                         reg = <0 0xe6e60000 0 0x40>;
1224                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1225                         clocks = <&cpg CPG_MOD 207>,
1226                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
1227                                  <&scif_clk>;
1228                         clock-names = "fck", "brg_int", "scif_clk";
1229                         dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1230                                <&dmac2 0x51>, <&dmac2 0x50>;
1231                         dma-names = "tx", "rx", "tx", "rx";
1232                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1233                         resets = <&cpg 207>;
1234                         status = "disabled";
1235                 };
1236
1237                 scif1: serial@e6e68000 {
1238                         compatible = "renesas,scif-r8a774a1",
1239                                      "renesas,rcar-gen3-scif", "renesas,scif";
1240                         reg = <0 0xe6e68000 0 0x40>;
1241                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1242                         clocks = <&cpg CPG_MOD 206>,
1243                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
1244                                  <&scif_clk>;
1245                         clock-names = "fck", "brg_int", "scif_clk";
1246                         dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1247                                <&dmac2 0x53>, <&dmac2 0x52>;
1248                         dma-names = "tx", "rx", "tx", "rx";
1249                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1250                         resets = <&cpg 206>;
1251                         status = "disabled";
1252                 };
1253
1254                 scif2: serial@e6e88000 {
1255                         compatible = "renesas,scif-r8a774a1",
1256                                      "renesas,rcar-gen3-scif", "renesas,scif";
1257                         reg = <0 0xe6e88000 0 0x40>;
1258                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1259                         clocks = <&cpg CPG_MOD 310>,
1260                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
1261                                  <&scif_clk>;
1262                         clock-names = "fck", "brg_int", "scif_clk";
1263                         dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1264                                <&dmac2 0x13>, <&dmac2 0x12>;
1265                         dma-names = "tx", "rx", "tx", "rx";
1266                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1267                         resets = <&cpg 310>;
1268                         status = "disabled";
1269                 };
1270
1271                 scif3: serial@e6c50000 {
1272                         compatible = "renesas,scif-r8a774a1",
1273                                      "renesas,rcar-gen3-scif", "renesas,scif";
1274                         reg = <0 0xe6c50000 0 0x40>;
1275                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1276                         clocks = <&cpg CPG_MOD 204>,
1277                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
1278                                  <&scif_clk>;
1279                         clock-names = "fck", "brg_int", "scif_clk";
1280                         dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1281                         dma-names = "tx", "rx";
1282                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1283                         resets = <&cpg 204>;
1284                         status = "disabled";
1285                 };
1286
1287                 scif4: serial@e6c40000 {
1288                         compatible = "renesas,scif-r8a774a1",
1289                                      "renesas,rcar-gen3-scif", "renesas,scif";
1290                         reg = <0 0xe6c40000 0 0x40>;
1291                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1292                         clocks = <&cpg CPG_MOD 203>,
1293                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
1294                                  <&scif_clk>;
1295                         clock-names = "fck", "brg_int", "scif_clk";
1296                         dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1297                         dma-names = "tx", "rx";
1298                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1299                         resets = <&cpg 203>;
1300                         status = "disabled";
1301                 };
1302
1303                 scif5: serial@e6f30000 {
1304                         compatible = "renesas,scif-r8a774a1",
1305                                      "renesas,rcar-gen3-scif", "renesas,scif";
1306                         reg = <0 0xe6f30000 0 0x40>;
1307                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1308                         clocks = <&cpg CPG_MOD 202>,
1309                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
1310                                  <&scif_clk>;
1311                         clock-names = "fck", "brg_int", "scif_clk";
1312                         dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1313                                <&dmac2 0x5b>, <&dmac2 0x5a>;
1314                         dma-names = "tx", "rx", "tx", "rx";
1315                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1316                         resets = <&cpg 202>;
1317                         status = "disabled";
1318                 };
1319
1320                 msiof0: spi@e6e90000 {
1321                         compatible = "renesas,msiof-r8a774a1",
1322                                      "renesas,rcar-gen3-msiof";
1323                         reg = <0 0xe6e90000 0 0x0064>;
1324                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1325                         clocks = <&cpg CPG_MOD 211>;
1326                         dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1327                                <&dmac2 0x41>, <&dmac2 0x40>;
1328                         dma-names = "tx", "rx", "tx", "rx";
1329                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1330                         resets = <&cpg 211>;
1331                         #address-cells = <1>;
1332                         #size-cells = <0>;
1333                         status = "disabled";
1334                 };
1335
1336                 msiof1: spi@e6ea0000 {
1337                         compatible = "renesas,msiof-r8a774a1",
1338                                      "renesas,rcar-gen3-msiof";
1339                         reg = <0 0xe6ea0000 0 0x0064>;
1340                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1341                         clocks = <&cpg CPG_MOD 210>;
1342                         dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1343                                <&dmac2 0x43>, <&dmac2 0x42>;
1344                         dma-names = "tx", "rx", "tx", "rx";
1345                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1346                         resets = <&cpg 210>;
1347                         #address-cells = <1>;
1348                         #size-cells = <0>;
1349                         status = "disabled";
1350                 };
1351
1352                 msiof2: spi@e6c00000 {
1353                         compatible = "renesas,msiof-r8a774a1",
1354                                      "renesas,rcar-gen3-msiof";
1355                         reg = <0 0xe6c00000 0 0x0064>;
1356                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1357                         clocks = <&cpg CPG_MOD 209>;
1358                         dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1359                         dma-names = "tx", "rx";
1360                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1361                         resets = <&cpg 209>;
1362                         #address-cells = <1>;
1363                         #size-cells = <0>;
1364                         status = "disabled";
1365                 };
1366
1367                 msiof3: spi@e6c10000 {
1368                         compatible = "renesas,msiof-r8a774a1",
1369                                      "renesas,rcar-gen3-msiof";
1370                         reg = <0 0xe6c10000 0 0x0064>;
1371                         interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1372                         clocks = <&cpg CPG_MOD 208>;
1373                         dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1374                         dma-names = "tx", "rx";
1375                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1376                         resets = <&cpg 208>;
1377                         #address-cells = <1>;
1378                         #size-cells = <0>;
1379                         status = "disabled";
1380                 };
1381
1382                 vin0: video@e6ef0000 {
1383                         compatible = "renesas,vin-r8a774a1";
1384                         reg = <0 0xe6ef0000 0 0x1000>;
1385                         interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1386                         clocks = <&cpg CPG_MOD 811>;
1387                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1388                         resets = <&cpg 811>;
1389                         renesas,id = <0>;
1390                         status = "disabled";
1391
1392                         ports {
1393                                 #address-cells = <1>;
1394                                 #size-cells = <0>;
1395
1396                                 port@1 {
1397                                         #address-cells = <1>;
1398                                         #size-cells = <0>;
1399
1400                                         reg = <1>;
1401
1402                                         vin0csi20: endpoint@0 {
1403                                                 reg = <0>;
1404                                                 remote-endpoint = <&csi20vin0>;
1405                                         };
1406                                         vin0csi40: endpoint@2 {
1407                                                 reg = <2>;
1408                                                 remote-endpoint = <&csi40vin0>;
1409                                         };
1410                                 };
1411                         };
1412                 };
1413
1414                 vin1: video@e6ef1000 {
1415                         compatible = "renesas,vin-r8a774a1";
1416                         reg = <0 0xe6ef1000 0 0x1000>;
1417                         interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1418                         clocks = <&cpg CPG_MOD 810>;
1419                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1420                         resets = <&cpg 810>;
1421                         renesas,id = <1>;
1422                         status = "disabled";
1423
1424                         ports {
1425                                 #address-cells = <1>;
1426                                 #size-cells = <0>;
1427
1428                                 port@1 {
1429                                         #address-cells = <1>;
1430                                         #size-cells = <0>;
1431
1432                                         reg = <1>;
1433
1434                                         vin1csi20: endpoint@0 {
1435                                                 reg = <0>;
1436                                                 remote-endpoint = <&csi20vin1>;
1437                                         };
1438                                         vin1csi40: endpoint@2 {
1439                                                 reg = <2>;
1440                                                 remote-endpoint = <&csi40vin1>;
1441                                         };
1442                                 };
1443                         };
1444                 };
1445
1446                 vin2: video@e6ef2000 {
1447                         compatible = "renesas,vin-r8a774a1";
1448                         reg = <0 0xe6ef2000 0 0x1000>;
1449                         interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1450                         clocks = <&cpg CPG_MOD 809>;
1451                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1452                         resets = <&cpg 809>;
1453                         renesas,id = <2>;
1454                         status = "disabled";
1455
1456                         ports {
1457                                 #address-cells = <1>;
1458                                 #size-cells = <0>;
1459
1460                                 port@1 {
1461                                         #address-cells = <1>;
1462                                         #size-cells = <0>;
1463
1464                                         reg = <1>;
1465
1466                                         vin2csi20: endpoint@0 {
1467                                                 reg = <0>;
1468                                                 remote-endpoint = <&csi20vin2>;
1469                                         };
1470                                         vin2csi40: endpoint@2 {
1471                                                 reg = <2>;
1472                                                 remote-endpoint = <&csi40vin2>;
1473                                         };
1474                                 };
1475                         };
1476                 };
1477
1478                 vin3: video@e6ef3000 {
1479                         compatible = "renesas,vin-r8a774a1";
1480                         reg = <0 0xe6ef3000 0 0x1000>;
1481                         interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1482                         clocks = <&cpg CPG_MOD 808>;
1483                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1484                         resets = <&cpg 808>;
1485                         renesas,id = <3>;
1486                         status = "disabled";
1487
1488                         ports {
1489                                 #address-cells = <1>;
1490                                 #size-cells = <0>;
1491
1492                                 port@1 {
1493                                         #address-cells = <1>;
1494                                         #size-cells = <0>;
1495
1496                                         reg = <1>;
1497
1498                                         vin3csi20: endpoint@0 {
1499                                                 reg = <0>;
1500                                                 remote-endpoint = <&csi20vin3>;
1501                                         };
1502                                         vin3csi40: endpoint@2 {
1503                                                 reg = <2>;
1504                                                 remote-endpoint = <&csi40vin3>;
1505                                         };
1506                                 };
1507                         };
1508                 };
1509
1510                 vin4: video@e6ef4000 {
1511                         compatible = "renesas,vin-r8a774a1";
1512                         reg = <0 0xe6ef4000 0 0x1000>;
1513                         interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1514                         clocks = <&cpg CPG_MOD 807>;
1515                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1516                         resets = <&cpg 807>;
1517                         renesas,id = <4>;
1518                         status = "disabled";
1519
1520                         ports {
1521                                 #address-cells = <1>;
1522                                 #size-cells = <0>;
1523
1524                                 port@1 {
1525                                         #address-cells = <1>;
1526                                         #size-cells = <0>;
1527
1528                                         reg = <1>;
1529
1530                                         vin4csi20: endpoint@0 {
1531                                                 reg = <0>;
1532                                                 remote-endpoint = <&csi20vin4>;
1533                                         };
1534                                         vin4csi40: endpoint@2 {
1535                                                 reg = <2>;
1536                                                 remote-endpoint = <&csi40vin4>;
1537                                         };
1538                                 };
1539                         };
1540                 };
1541
1542                 vin5: video@e6ef5000 {
1543                         compatible = "renesas,vin-r8a774a1";
1544                         reg = <0 0xe6ef5000 0 0x1000>;
1545                         interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1546                         clocks = <&cpg CPG_MOD 806>;
1547                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1548                         resets = <&cpg 806>;
1549                         renesas,id = <5>;
1550                         status = "disabled";
1551
1552                         ports {
1553                                 #address-cells = <1>;
1554                                 #size-cells = <0>;
1555
1556                                 port@1 {
1557                                         #address-cells = <1>;
1558                                         #size-cells = <0>;
1559
1560                                         reg = <1>;
1561
1562                                         vin5csi20: endpoint@0 {
1563                                                 reg = <0>;
1564                                                 remote-endpoint = <&csi20vin5>;
1565                                         };
1566                                         vin5csi40: endpoint@2 {
1567                                                 reg = <2>;
1568                                                 remote-endpoint = <&csi40vin5>;
1569                                         };
1570                                 };
1571                         };
1572                 };
1573
1574                 vin6: video@e6ef6000 {
1575                         compatible = "renesas,vin-r8a774a1";
1576                         reg = <0 0xe6ef6000 0 0x1000>;
1577                         interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1578                         clocks = <&cpg CPG_MOD 805>;
1579                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1580                         resets = <&cpg 805>;
1581                         renesas,id = <6>;
1582                         status = "disabled";
1583
1584                         ports {
1585                                 #address-cells = <1>;
1586                                 #size-cells = <0>;
1587
1588                                 port@1 {
1589                                         #address-cells = <1>;
1590                                         #size-cells = <0>;
1591
1592                                         reg = <1>;
1593
1594                                         vin6csi20: endpoint@0 {
1595                                                 reg = <0>;
1596                                                 remote-endpoint = <&csi20vin6>;
1597                                         };
1598                                         vin6csi40: endpoint@2 {
1599                                                 reg = <2>;
1600                                                 remote-endpoint = <&csi40vin6>;
1601                                         };
1602                                 };
1603                         };
1604                 };
1605
1606                 vin7: video@e6ef7000 {
1607                         compatible = "renesas,vin-r8a774a1";
1608                         reg = <0 0xe6ef7000 0 0x1000>;
1609                         interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1610                         clocks = <&cpg CPG_MOD 804>;
1611                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1612                         resets = <&cpg 804>;
1613                         renesas,id = <7>;
1614                         status = "disabled";
1615
1616                         ports {
1617                                 #address-cells = <1>;
1618                                 #size-cells = <0>;
1619
1620                                 port@1 {
1621                                         #address-cells = <1>;
1622                                         #size-cells = <0>;
1623
1624                                         reg = <1>;
1625
1626                                         vin7csi20: endpoint@0 {
1627                                                 reg = <0>;
1628                                                 remote-endpoint = <&csi20vin7>;
1629                                         };
1630                                         vin7csi40: endpoint@2 {
1631                                                 reg = <2>;
1632                                                 remote-endpoint = <&csi40vin7>;
1633                                         };
1634                                 };
1635                         };
1636                 };
1637
1638                 rcar_sound: sound@ec500000 {
1639                         /*
1640                          * #sound-dai-cells is required
1641                          *
1642                          * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1643                          * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1644                          */
1645                         /*
1646                          * #clock-cells is required for audio_clkout0/1/2/3
1647                          *
1648                          * clkout       : #clock-cells = <0>;   <&rcar_sound>;
1649                          * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
1650                          */
1651                         compatible =  "renesas,rcar_sound-r8a774a1", "renesas,rcar_sound-gen3";
1652                         reg =   <0 0xec500000 0 0x1000>, /* SCU */
1653                                 <0 0xec5a0000 0 0x100>,  /* ADG */
1654                                 <0 0xec540000 0 0x1000>, /* SSIU */
1655                                 <0 0xec541000 0 0x280>,  /* SSI */
1656                                 <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
1657                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1658
1659                         clocks = <&cpg CPG_MOD 1005>,
1660                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1661                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1662                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1663                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1664                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1665                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1666                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1667                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1668                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1669                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1670                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1671                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1672                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1673                                  <&audio_clk_a>, <&audio_clk_b>,
1674                                  <&audio_clk_c>,
1675                                  <&cpg CPG_CORE R8A774A1_CLK_S0D4>;
1676                         clock-names = "ssi-all",
1677                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1678                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1679                                       "ssi.1", "ssi.0",
1680                                       "src.9", "src.8", "src.7", "src.6",
1681                                       "src.5", "src.4", "src.3", "src.2",
1682                                       "src.1", "src.0",
1683                                       "mix.1", "mix.0",
1684                                       "ctu.1", "ctu.0",
1685                                       "dvc.0", "dvc.1",
1686                                       "clk_a", "clk_b", "clk_c", "clk_i";
1687                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1688                         resets = <&cpg 1005>,
1689                                  <&cpg 1006>, <&cpg 1007>,
1690                                  <&cpg 1008>, <&cpg 1009>,
1691                                  <&cpg 1010>, <&cpg 1011>,
1692                                  <&cpg 1012>, <&cpg 1013>,
1693                                  <&cpg 1014>, <&cpg 1015>;
1694                         reset-names = "ssi-all",
1695                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1696                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1697                                       "ssi.1", "ssi.0";
1698                         status = "disabled";
1699
1700                         rcar_sound,dvc {
1701                                 dvc0: dvc-0 {
1702                                         dmas = <&audma1 0xbc>;
1703                                         dma-names = "tx";
1704                                 };
1705                                 dvc1: dvc-1 {
1706                                         dmas = <&audma1 0xbe>;
1707                                         dma-names = "tx";
1708                                 };
1709                         };
1710
1711                         rcar_sound,mix {
1712                                 mix0: mix-0 { };
1713                                 mix1: mix-1 { };
1714                         };
1715
1716                         rcar_sound,ctu {
1717                                 ctu00: ctu-0 { };
1718                                 ctu01: ctu-1 { };
1719                                 ctu02: ctu-2 { };
1720                                 ctu03: ctu-3 { };
1721                                 ctu10: ctu-4 { };
1722                                 ctu11: ctu-5 { };
1723                                 ctu12: ctu-6 { };
1724                                 ctu13: ctu-7 { };
1725                         };
1726
1727                         rcar_sound,src {
1728                                 src0: src-0 {
1729                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1730                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
1731                                         dma-names = "rx", "tx";
1732                                 };
1733                                 src1: src-1 {
1734                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1735                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
1736                                         dma-names = "rx", "tx";
1737                                 };
1738                                 src2: src-2 {
1739                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1740                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
1741                                         dma-names = "rx", "tx";
1742                                 };
1743                                 src3: src-3 {
1744                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1745                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1746                                         dma-names = "rx", "tx";
1747                                 };
1748                                 src4: src-4 {
1749                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1750                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1751                                         dma-names = "rx", "tx";
1752                                 };
1753                                 src5: src-5 {
1754                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1755                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1756                                         dma-names = "rx", "tx";
1757                                 };
1758                                 src6: src-6 {
1759                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1760                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
1761                                         dma-names = "rx", "tx";
1762                                 };
1763                                 src7: src-7 {
1764                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1765                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
1766                                         dma-names = "rx", "tx";
1767                                 };
1768                                 src8: src-8 {
1769                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1770                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
1771                                         dma-names = "rx", "tx";
1772                                 };
1773                                 src9: src-9 {
1774                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1775                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
1776                                         dma-names = "rx", "tx";
1777                                 };
1778                         };
1779
1780                         rcar_sound,ssi {
1781                                 ssi0: ssi-0 {
1782                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1783                                         dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1784                                         dma-names = "rx", "tx", "rxu", "txu";
1785                                 };
1786                                 ssi1: ssi-1 {
1787                                         interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1788                                         dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1789                                         dma-names = "rx", "tx", "rxu", "txu";
1790                                 };
1791                                 ssi2: ssi-2 {
1792                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1793                                         dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1794                                         dma-names = "rx", "tx", "rxu", "txu";
1795                                 };
1796                                 ssi3: ssi-3 {
1797                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1798                                         dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1799                                         dma-names = "rx", "tx", "rxu", "txu";
1800                                 };
1801                                 ssi4: ssi-4 {
1802                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1803                                         dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1804                                         dma-names = "rx", "tx", "rxu", "txu";
1805                                 };
1806                                 ssi5: ssi-5 {
1807                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1808                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1809                                         dma-names = "rx", "tx", "rxu", "txu";
1810                                 };
1811                                 ssi6: ssi-6 {
1812                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1813                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1814                                         dma-names = "rx", "tx", "rxu", "txu";
1815                                 };
1816                                 ssi7: ssi-7 {
1817                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1818                                         dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1819                                         dma-names = "rx", "tx", "rxu", "txu";
1820                                 };
1821                                 ssi8: ssi-8 {
1822                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1823                                         dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1824                                         dma-names = "rx", "tx", "rxu", "txu";
1825                                 };
1826                                 ssi9: ssi-9 {
1827                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1828                                         dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1829                                         dma-names = "rx", "tx", "rxu", "txu";
1830                                 };
1831                         };
1832
1833                         ports {
1834                                 #address-cells = <1>;
1835                                 #size-cells = <0>;
1836                                 port@0 {
1837                                         reg = <0>;
1838                                 };
1839                                 port@1 {
1840                                         reg = <1>;
1841                                 };
1842                         };
1843                 };
1844
1845                 audma0: dma-controller@ec700000 {
1846                         compatible = "renesas,dmac-r8a774a1",
1847                                      "renesas,rcar-dmac";
1848                         reg = <0 0xec700000 0 0x10000>;
1849                         interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
1850                                       GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
1851                                       GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
1852                                       GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
1853                                       GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
1854                                       GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
1855                                       GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
1856                                       GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
1857                                       GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
1858                                       GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
1859                                       GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
1860                                       GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
1861                                       GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
1862                                       GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
1863                                       GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
1864                                       GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
1865                                       GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
1866                         interrupt-names = "error",
1867                                         "ch0", "ch1", "ch2", "ch3",
1868                                         "ch4", "ch5", "ch6", "ch7",
1869                                         "ch8", "ch9", "ch10", "ch11",
1870                                         "ch12", "ch13", "ch14", "ch15";
1871                         clocks = <&cpg CPG_MOD 502>;
1872                         clock-names = "fck";
1873                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1874                         resets = <&cpg 502>;
1875                         #dma-cells = <1>;
1876                         dma-channels = <16>;
1877                         iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
1878                                <&ipmmu_mp 2>, <&ipmmu_mp 3>,
1879                                <&ipmmu_mp 4>, <&ipmmu_mp 5>,
1880                                <&ipmmu_mp 6>, <&ipmmu_mp 7>,
1881                                <&ipmmu_mp 8>, <&ipmmu_mp 9>,
1882                                <&ipmmu_mp 10>, <&ipmmu_mp 11>,
1883                                <&ipmmu_mp 12>, <&ipmmu_mp 13>,
1884                                <&ipmmu_mp 14>, <&ipmmu_mp 15>;
1885                 };
1886
1887                 audma1: dma-controller@ec720000 {
1888                         compatible = "renesas,dmac-r8a774a1",
1889                                      "renesas,rcar-dmac";
1890                         reg = <0 0xec720000 0 0x10000>;
1891                         interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
1892                                       GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
1893                                       GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
1894                                       GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
1895                                       GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
1896                                       GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
1897                                       GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
1898                                       GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
1899                                       GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
1900                                       GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
1901                                       GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
1902                                       GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
1903                                       GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
1904                                       GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
1905                                       GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
1906                                       GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
1907                                       GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
1908                         interrupt-names = "error",
1909                                         "ch0", "ch1", "ch2", "ch3",
1910                                         "ch4", "ch5", "ch6", "ch7",
1911                                         "ch8", "ch9", "ch10", "ch11",
1912                                         "ch12", "ch13", "ch14", "ch15";
1913                         clocks = <&cpg CPG_MOD 501>;
1914                         clock-names = "fck";
1915                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1916                         resets = <&cpg 501>;
1917                         #dma-cells = <1>;
1918                         dma-channels = <16>;
1919                         iommus = <&ipmmu_mp 16>, <&ipmmu_mp 17>,
1920                                <&ipmmu_mp 18>, <&ipmmu_mp 19>,
1921                                <&ipmmu_mp 20>, <&ipmmu_mp 21>,
1922                                <&ipmmu_mp 22>, <&ipmmu_mp 23>,
1923                                <&ipmmu_mp 24>, <&ipmmu_mp 25>,
1924                                <&ipmmu_mp 26>, <&ipmmu_mp 27>,
1925                                <&ipmmu_mp 28>, <&ipmmu_mp 29>,
1926                                <&ipmmu_mp 30>, <&ipmmu_mp 31>;
1927                 };
1928
1929                 xhci0: usb@ee000000 {
1930                         compatible = "renesas,xhci-r8a774a1",
1931                                      "renesas,rcar-gen3-xhci";
1932                         reg = <0 0xee000000 0 0xc00>;
1933                         interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1934                         clocks = <&cpg CPG_MOD 328>;
1935                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1936                         resets = <&cpg 328>;
1937                         status = "disabled";
1938                 };
1939
1940                 usb3_peri0: usb@ee020000 {
1941                         compatible = "renesas,r8a774a1-usb3-peri",
1942                                      "renesas,rcar-gen3-usb3-peri";
1943                         reg = <0 0xee020000 0 0x400>;
1944                         interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
1945                         clocks = <&cpg CPG_MOD 328>;
1946                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1947                         resets = <&cpg 328>;
1948                         status = "disabled";
1949                 };
1950
1951                 ohci0: usb@ee080000 {
1952                         compatible = "generic-ohci";
1953                         reg = <0 0xee080000 0 0x100>;
1954                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1955                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1956                         phys = <&usb2_phy0 1>;
1957                         phy-names = "usb";
1958                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1959                         resets = <&cpg 703>, <&cpg 704>;
1960                         status = "disabled";
1961                 };
1962
1963                 ohci1: usb@ee0a0000 {
1964                         compatible = "generic-ohci";
1965                         reg = <0 0xee0a0000 0 0x100>;
1966                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1967                         clocks = <&cpg CPG_MOD 702>;
1968                         phys = <&usb2_phy1 1>;
1969                         phy-names = "usb";
1970                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1971                         resets = <&cpg 702>;
1972                         status = "disabled";
1973                 };
1974
1975                 ehci0: usb@ee080100 {
1976                         compatible = "generic-ehci";
1977                         reg = <0 0xee080100 0 0x100>;
1978                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1979                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1980                         phys = <&usb2_phy0 2>;
1981                         phy-names = "usb";
1982                         companion = <&ohci0>;
1983                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1984                         resets = <&cpg 703>, <&cpg 704>;
1985                         status = "disabled";
1986                 };
1987
1988                 ehci1: usb@ee0a0100 {
1989                         compatible = "generic-ehci";
1990                         reg = <0 0xee0a0100 0 0x100>;
1991                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1992                         clocks = <&cpg CPG_MOD 702>;
1993                         phys = <&usb2_phy1 2>;
1994                         phy-names = "usb";
1995                         companion = <&ohci1>;
1996                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1997                         resets = <&cpg 702>;
1998                         status = "disabled";
1999                 };
2000
2001                 usb2_phy0: usb-phy@ee080200 {
2002                         compatible = "renesas,usb2-phy-r8a774a1",
2003                                      "renesas,rcar-gen3-usb2-phy";
2004                         reg = <0 0xee080200 0 0x700>;
2005                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2006                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2007                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2008                         resets = <&cpg 703>, <&cpg 704>;
2009                         #phy-cells = <1>;
2010                         status = "disabled";
2011                 };
2012
2013                 usb2_phy1: usb-phy@ee0a0200 {
2014                         compatible = "renesas,usb2-phy-r8a774a1",
2015                                      "renesas,rcar-gen3-usb2-phy";
2016                         reg = <0 0xee0a0200 0 0x700>;
2017                         clocks = <&cpg CPG_MOD 702>;
2018                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2019                         resets = <&cpg 702>;
2020                         #phy-cells = <1>;
2021                         status = "disabled";
2022                 };
2023
2024                 sdhi0: sd@ee100000 {
2025                         compatible = "renesas,sdhi-r8a774a1",
2026                                      "renesas,rcar-gen3-sdhi";
2027                         reg = <0 0xee100000 0 0x2000>;
2028                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
2029                         clocks = <&cpg CPG_MOD 314>;
2030                         max-frequency = <200000000>;
2031                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2032                         resets = <&cpg 314>;
2033                         status = "disabled";
2034                 };
2035
2036                 sdhi1: sd@ee120000 {
2037                         compatible = "renesas,sdhi-r8a774a1",
2038                                      "renesas,rcar-gen3-sdhi";
2039                         reg = <0 0xee120000 0 0x2000>;
2040                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
2041                         clocks = <&cpg CPG_MOD 313>;
2042                         max-frequency = <200000000>;
2043                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2044                         resets = <&cpg 313>;
2045                         status = "disabled";
2046                 };
2047
2048                 sdhi2: sd@ee140000 {
2049                         compatible = "renesas,sdhi-r8a774a1",
2050                                      "renesas,rcar-gen3-sdhi";
2051                         reg = <0 0xee140000 0 0x2000>;
2052                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
2053                         clocks = <&cpg CPG_MOD 312>;
2054                         max-frequency = <200000000>;
2055                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2056                         resets = <&cpg 312>;
2057                         status = "disabled";
2058                 };
2059
2060                 sdhi3: sd@ee160000 {
2061                         compatible = "renesas,sdhi-r8a774a1",
2062                                      "renesas,rcar-gen3-sdhi";
2063                         reg = <0 0xee160000 0 0x2000>;
2064                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
2065                         clocks = <&cpg CPG_MOD 311>;
2066                         max-frequency = <200000000>;
2067                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2068                         resets = <&cpg 311>;
2069                         status = "disabled";
2070                 };
2071
2072                 gic: interrupt-controller@f1010000 {
2073                         compatible = "arm,gic-400";
2074                         #interrupt-cells = <3>;
2075                         #address-cells = <0>;
2076                         interrupt-controller;
2077                         reg = <0x0 0xf1010000 0 0x1000>,
2078                               <0x0 0xf1020000 0 0x20000>,
2079                               <0x0 0xf1040000 0 0x20000>,
2080                               <0x0 0xf1060000 0 0x20000>;
2081                         interrupts = <GIC_PPI 9
2082                                         (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
2083                         clocks = <&cpg CPG_MOD 408>;
2084                         clock-names = "clk";
2085                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2086                         resets = <&cpg 408>;
2087                 };
2088
2089                 pciec0: pcie@fe000000 {
2090                         compatible = "renesas,pcie-r8a774a1",
2091                                      "renesas,pcie-rcar-gen3";
2092                         reg = <0 0xfe000000 0 0x80000>;
2093                         #address-cells = <3>;
2094                         #size-cells = <2>;
2095                         bus-range = <0x00 0xff>;
2096                         device_type = "pci";
2097                         ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
2098                                 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
2099                                 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
2100                                 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2101                         /* Map all possible DDR as inbound ranges */
2102                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2103                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2104                                 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2105                                 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2106                         #interrupt-cells = <1>;
2107                         interrupt-map-mask = <0 0 0 0>;
2108                         interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2109                         clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
2110                         clock-names = "pcie", "pcie_bus";
2111                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2112                         resets = <&cpg 319>;
2113                         status = "disabled";
2114                 };
2115
2116                 pciec1: pcie@ee800000 {
2117                         compatible = "renesas,pcie-r8a774a1",
2118                                      "renesas,pcie-rcar-gen3";
2119                         reg = <0 0xee800000 0 0x80000>;
2120                         #address-cells = <3>;
2121                         #size-cells = <2>;
2122                         bus-range = <0x00 0xff>;
2123                         device_type = "pci";
2124                         ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
2125                                 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
2126                                 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
2127                                 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2128                         /* Map all possible DDR as inbound ranges */
2129                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2130                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2131                                 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2132                                 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2133                         #interrupt-cells = <1>;
2134                         interrupt-map-mask = <0 0 0 0>;
2135                         interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2136                         clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2137                         clock-names = "pcie", "pcie_bus";
2138                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2139                         resets = <&cpg 318>;
2140                         status = "disabled";
2141                 };
2142
2143                 fdp1@fe940000 {
2144                         compatible = "renesas,fdp1";
2145                         reg = <0 0xfe940000 0 0x2400>;
2146                         interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
2147                         clocks = <&cpg CPG_MOD 119>;
2148                         power-domains = <&sysc R8A774A1_PD_A3VC>;
2149                         resets = <&cpg 119>;
2150                         renesas,fcp = <&fcpf0>;
2151                 };
2152
2153                 fcpf0: fcp@fe950000 {
2154                         compatible = "renesas,fcpf";
2155                         reg = <0 0xfe950000 0 0x200>;
2156                         clocks = <&cpg CPG_MOD 615>;
2157                         power-domains = <&sysc R8A774A1_PD_A3VC>;
2158                         resets = <&cpg 615>;
2159                 };
2160
2161                 fcpvb0: fcp@fe96f000 {
2162                         compatible = "renesas,fcpv";
2163                         reg = <0 0xfe96f000 0 0x200>;
2164                         clocks = <&cpg CPG_MOD 607>;
2165                         power-domains = <&sysc R8A774A1_PD_A3VC>;
2166                         resets = <&cpg 607>;
2167                 };
2168
2169                 fcpvd0: fcp@fea27000 {
2170                         compatible = "renesas,fcpv";
2171                         reg = <0 0xfea27000 0 0x200>;
2172                         clocks = <&cpg CPG_MOD 603>;
2173                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2174                         resets = <&cpg 603>;
2175                         iommus = <&ipmmu_vi0 8>;
2176                 };
2177
2178                 fcpvd1: fcp@fea2f000 {
2179                         compatible = "renesas,fcpv";
2180                         reg = <0 0xfea2f000 0 0x200>;
2181                         clocks = <&cpg CPG_MOD 602>;
2182                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2183                         resets = <&cpg 602>;
2184                         iommus = <&ipmmu_vi0 9>;
2185                 };
2186
2187                 fcpvd2: fcp@fea37000 {
2188                         compatible = "renesas,fcpv";
2189                         reg = <0 0xfea37000 0 0x200>;
2190                         clocks = <&cpg CPG_MOD 601>;
2191                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2192                         resets = <&cpg 601>;
2193                         iommus = <&ipmmu_vi0 10>;
2194                 };
2195
2196                 fcpvi0: fcp@fe9af000 {
2197                         compatible = "renesas,fcpv";
2198                         reg = <0 0xfe9af000 0 0x200>;
2199                         clocks = <&cpg CPG_MOD 611>;
2200                         power-domains = <&sysc R8A774A1_PD_A3VC>;
2201                         resets = <&cpg 611>;
2202                         iommus = <&ipmmu_vc0 19>;
2203                 };
2204
2205                 vspb: vsp@fe960000 {
2206                         compatible = "renesas,vsp2";
2207                         reg = <0 0xfe960000 0 0x8000>;
2208                         interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
2209                         clocks = <&cpg CPG_MOD 626>;
2210                         power-domains = <&sysc R8A774A1_PD_A3VC>;
2211                         resets = <&cpg 626>;
2212
2213                         renesas,fcp = <&fcpvb0>;
2214                 };
2215
2216                 vspd0: vsp@fea20000 {
2217                         compatible = "renesas,vsp2";
2218                         reg = <0 0xfea20000 0 0x5000>;
2219                         interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
2220                         clocks = <&cpg CPG_MOD 623>;
2221                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2222                         resets = <&cpg 623>;
2223
2224                         renesas,fcp = <&fcpvd0>;
2225                 };
2226
2227                 vspd1: vsp@fea28000 {
2228                         compatible = "renesas,vsp2";
2229                         reg = <0 0xfea28000 0 0x5000>;
2230                         interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
2231                         clocks = <&cpg CPG_MOD 622>;
2232                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2233                         resets = <&cpg 622>;
2234
2235                         renesas,fcp = <&fcpvd1>;
2236                 };
2237
2238                 vspd2: vsp@fea30000 {
2239                         compatible = "renesas,vsp2";
2240                         reg = <0 0xfea30000 0 0x5000>;
2241                         interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
2242                         clocks = <&cpg CPG_MOD 621>;
2243                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2244                         resets = <&cpg 621>;
2245
2246                         renesas,fcp = <&fcpvd2>;
2247                 };
2248
2249                 vspi0: vsp@fe9a0000 {
2250                         compatible = "renesas,vsp2";
2251                         reg = <0 0xfe9a0000 0 0x8000>;
2252                         interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
2253                         clocks = <&cpg CPG_MOD 631>;
2254                         power-domains = <&sysc R8A774A1_PD_A3VC>;
2255                         resets = <&cpg 631>;
2256
2257                         renesas,fcp = <&fcpvi0>;
2258                 };
2259
2260                 csi20: csi2@fea80000 {
2261                         compatible = "renesas,r8a774a1-csi2";
2262                         reg = <0 0xfea80000 0 0x10000>;
2263                         interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
2264                         clocks = <&cpg CPG_MOD 714>;
2265                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2266                         resets = <&cpg 714>;
2267                         status = "disabled";
2268
2269                         ports {
2270                                 #address-cells = <1>;
2271                                 #size-cells = <0>;
2272
2273                                 port@1 {
2274                                         #address-cells = <1>;
2275                                         #size-cells = <0>;
2276
2277                                         reg = <1>;
2278
2279                                         csi20vin0: endpoint@0 {
2280                                                 reg = <0>;
2281                                                 remote-endpoint = <&vin0csi20>;
2282                                         };
2283                                         csi20vin1: endpoint@1 {
2284                                                 reg = <1>;
2285                                                 remote-endpoint = <&vin1csi20>;
2286                                         };
2287                                         csi20vin2: endpoint@2 {
2288                                                 reg = <2>;
2289                                                 remote-endpoint = <&vin2csi20>;
2290                                         };
2291                                         csi20vin3: endpoint@3 {
2292                                                 reg = <3>;
2293                                                 remote-endpoint = <&vin3csi20>;
2294                                         };
2295                                         csi20vin4: endpoint@4 {
2296                                                 reg = <4>;
2297                                                 remote-endpoint = <&vin4csi20>;
2298                                         };
2299                                         csi20vin5: endpoint@5 {
2300                                                 reg = <5>;
2301                                                 remote-endpoint = <&vin5csi20>;
2302                                         };
2303                                         csi20vin6: endpoint@6 {
2304                                                 reg = <6>;
2305                                                 remote-endpoint = <&vin6csi20>;
2306                                         };
2307                                         csi20vin7: endpoint@7 {
2308                                                 reg = <7>;
2309                                                 remote-endpoint = <&vin7csi20>;
2310                                         };
2311                                 };
2312                         };
2313                 };
2314
2315                 csi40: csi2@feaa0000 {
2316                         compatible = "renesas,r8a774a1-csi2";
2317                         reg = <0 0xfeaa0000 0 0x10000>;
2318                         interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
2319                         clocks = <&cpg CPG_MOD 716>;
2320                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2321                         resets = <&cpg 716>;
2322                         status = "disabled";
2323
2324                         ports {
2325                                 #address-cells = <1>;
2326                                 #size-cells = <0>;
2327
2328                                 port@1 {
2329                                         #address-cells = <1>;
2330                                         #size-cells = <0>;
2331
2332                                         reg = <1>;
2333
2334                                         csi40vin0: endpoint@0 {
2335                                                 reg = <0>;
2336                                                 remote-endpoint = <&vin0csi40>;
2337                                         };
2338                                         csi40vin1: endpoint@1 {
2339                                                 reg = <1>;
2340                                                 remote-endpoint = <&vin1csi40>;
2341                                         };
2342                                         csi40vin2: endpoint@2 {
2343                                                 reg = <2>;
2344                                                 remote-endpoint = <&vin2csi40>;
2345                                         };
2346                                         csi40vin3: endpoint@3 {
2347                                                 reg = <3>;
2348                                                 remote-endpoint = <&vin3csi40>;
2349                                         };
2350                                         csi40vin4: endpoint@4 {
2351                                                 reg = <4>;
2352                                                 remote-endpoint = <&vin4csi40>;
2353                                         };
2354                                         csi40vin5: endpoint@5 {
2355                                                 reg = <5>;
2356                                                 remote-endpoint = <&vin5csi40>;
2357                                         };
2358                                         csi40vin6: endpoint@6 {
2359                                                 reg = <6>;
2360                                                 remote-endpoint = <&vin6csi40>;
2361                                         };
2362                                         csi40vin7: endpoint@7 {
2363                                                 reg = <7>;
2364                                                 remote-endpoint = <&vin7csi40>;
2365                                         };
2366                                 };
2367
2368                         };
2369                 };
2370
2371                 hdmi0: hdmi@fead0000 {
2372                         compatible = "renesas,r8a774a1-hdmi",
2373                                      "renesas,rcar-gen3-hdmi";
2374                         reg = <0 0xfead0000 0 0x10000>;
2375                         interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
2376                         clocks = <&cpg CPG_MOD 729>,
2377                                  <&cpg CPG_CORE R8A774A1_CLK_HDMI>;
2378                         clock-names = "iahb", "isfr";
2379                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2380                         resets = <&cpg 729>;
2381                         status = "disabled";
2382
2383                         ports {
2384                                 #address-cells = <1>;
2385                                 #size-cells = <0>;
2386                                 port@0 {
2387                                         reg = <0>;
2388                                         dw_hdmi0_in: endpoint {
2389                                                 remote-endpoint = <&du_out_hdmi0>;
2390                                         };
2391                                 };
2392                                 port@1 {
2393                                         reg = <1>;
2394                                 };
2395                                 port@2 {
2396                                         /* HDMI sound */
2397                                         reg = <2>;
2398                                 };
2399                         };
2400                 };
2401
2402                 du: display@feb00000 {
2403                         compatible = "renesas,du-r8a774a1";
2404                         reg = <0 0xfeb00000 0 0x70000>;
2405                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2406                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
2407                                      <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
2408                         clocks = <&cpg CPG_MOD 724>,
2409                                  <&cpg CPG_MOD 723>,
2410                                  <&cpg CPG_MOD 722>;
2411                         clock-names = "du.0", "du.1", "du.2";
2412                         status = "disabled";
2413
2414                         vsps = <&vspd0 &vspd1 &vspd2>;
2415
2416                         ports {
2417                                 #address-cells = <1>;
2418                                 #size-cells = <0>;
2419
2420                                 port@0 {
2421                                         reg = <0>;
2422                                         du_out_rgb: endpoint {
2423                                         };
2424                                 };
2425                                 port@1 {
2426                                         reg = <1>;
2427                                         du_out_hdmi0: endpoint {
2428                                                 remote-endpoint = <&dw_hdmi0_in>;
2429                                         };
2430                                 };
2431                                 port@2 {
2432                                         reg = <2>;
2433                                         du_out_lvds0: endpoint {
2434                                                 remote-endpoint = <&lvds0_in>;
2435                                         };
2436                                 };
2437                         };
2438                 };
2439
2440                 lvds0: lvds@feb90000 {
2441                         compatible = "renesas,r8a774a1-lvds";
2442                         reg = <0 0xfeb90000 0 0x14>;
2443                         clocks = <&cpg CPG_MOD 727>;
2444                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2445                         resets = <&cpg 727>;
2446                         status = "disabled";
2447
2448                         ports {
2449                                 #address-cells = <1>;
2450                                 #size-cells = <0>;
2451
2452                                 port@0 {
2453                                         reg = <0>;
2454                                         lvds0_in: endpoint {
2455                                                 remote-endpoint = <&du_out_lvds0>;
2456                                         };
2457                                 };
2458                                 port@1 {
2459                                         reg = <1>;
2460                                         lvds0_out: endpoint {
2461                                         };
2462                                 };
2463                         };
2464                 };
2465
2466                 prr: chipid@fff00044 {
2467                         compatible = "renesas,prr";
2468                         reg = <0 0xfff00044 0 4>;
2469                 };
2470         };
2471
2472         thermal-zones {
2473                 sensor_thermal1: sensor-thermal1 {
2474                         polling-delay-passive = <250>;
2475                         polling-delay = <1000>;
2476                         thermal-sensors = <&tsc 0>;
2477                         sustainable-power = <3874>;
2478
2479                         trips {
2480                                 sensor1_crit: sensor1-crit {
2481                                         temperature = <120000>;
2482                                         hysteresis = <1000>;
2483                                         type = "critical";
2484                                 };
2485                         };
2486                 };
2487
2488                 sensor_thermal2: sensor-thermal2 {
2489                         polling-delay-passive = <250>;
2490                         polling-delay = <1000>;
2491                         thermal-sensors = <&tsc 1>;
2492                         sustainable-power = <3874>;
2493
2494                         trips {
2495                                 sensor2_crit: sensor2-crit {
2496                                         temperature = <120000>;
2497                                         hysteresis = <1000>;
2498                                         type = "critical";
2499                                 };
2500                         };
2501                 };
2502
2503                 sensor_thermal3: sensor-thermal3 {
2504                         polling-delay-passive = <250>;
2505                         polling-delay = <1000>;
2506                         thermal-sensors = <&tsc 2>;
2507                         sustainable-power = <3874>;
2508
2509                         trips {
2510                                 target: trip-point1 {
2511                                         temperature = <100000>;
2512                                         hysteresis = <1000>;
2513                                         type = "passive";
2514                                 };
2515
2516                                 sensor3_crit: sensor3-crit {
2517                                         temperature = <120000>;
2518                                         hysteresis = <1000>;
2519                                         type = "critical";
2520                                 };
2521                         };
2522                         cooling-maps {
2523                                 map0 {
2524                                         trip = <&target>;
2525                                         cooling-device = <&a57_0 0 2>;
2526                                         contribution = <1024>;
2527                                 };
2528                                 map1 {
2529                                         trip = <&target>;
2530                                         cooling-device = <&a53_0 0 2>;
2531                                         contribution = <1024>;
2532                                 };
2533                         };
2534                 };
2535         };
2536
2537         timer {
2538                 compatible = "arm,armv8-timer";
2539                 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
2540                                       <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
2541                                       <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
2542                                       <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
2543         };
2544
2545         /* External USB clocks - can be overridden by the board */
2546         usb3s0_clk: usb3s0 {
2547                 compatible = "fixed-clock";
2548                 #clock-cells = <0>;
2549                 clock-frequency = <0>;
2550         };
2551
2552         usb_extal_clk: usb_extal {
2553                 compatible = "fixed-clock";
2554                 #clock-cells = <0>;
2555                 clock-frequency = <0>;
2556         };
2557 };