arch/arm64/boot/dts/renesas/r8a774a1.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the r8a774a1 SoC
   4  *
   5  * Copyright (C) 2018 Renesas Electronics Corp.
   6  */
   7
   8 #include <dt-bindings/interrupt-controller/irq.h>
   9 #include <dt-bindings/interrupt-controller/arm-gic.h>
  10 #include <dt-bindings/clock/r8a774a1-cpg-mssr.h>
  11 #include <dt-bindings/power/r8a774a1-sysc.h>
  12
  13 / {
  14         compatible = "renesas,r8a774a1";
  15         #address-cells = <2>;
  16         #size-cells = <2>;
  17
  18         aliases {
  19                 i2c0 = &i2c0;
  20                 i2c1 = &i2c1;
  21                 i2c2 = &i2c2;
  22                 i2c3 = &i2c3;
  23                 i2c4 = &i2c4;
  24                 i2c5 = &i2c5;
  25                 i2c6 = &i2c6;
  26                 i2c7 = &i2c_dvfs;
  27         };
  28
  29         /*
  30          * The external audio clocks are configured as 0 Hz fixed frequency
  31          * clocks by default.
  32          * Boards that provide audio clocks should override them.
  33          */
  34         audio_clk_a: audio_clk_a {
  35                 compatible = "fixed-clock";
  36                 #clock-cells = <0>;
  37                 clock-frequency = <0>;
  38         };
  39
  40         audio_clk_b: audio_clk_b {
  41                 compatible = "fixed-clock";
  42                 #clock-cells = <0>;
  43                 clock-frequency = <0>;
  44         };
  45
  46         audio_clk_c: audio_clk_c {
  47                 compatible = "fixed-clock";
  48                 #clock-cells = <0>;
  49                 clock-frequency = <0>;
  50         };
  51
  52         /* External CAN clock - to be overridden by boards that provide it */
  53         can_clk: can {
  54                 compatible = "fixed-clock";
  55                 #clock-cells = <0>;
  56                 clock-frequency = <0>;
  57         };
  58
  59         cpus {
  60                 #address-cells = <1>;
  61                 #size-cells = <0>;
  62
  63                 a57_0: cpu@0 {
  64                         compatible = "arm,cortex-a57", "arm,armv8";
  65                         reg = <0x0>;
  66                         device_type = "cpu";
  67                         power-domains = <&sysc R8A774A1_PD_CA57_CPU0>;
  68                         next-level-cache = <&L2_CA57>;
  69                         enable-method = "psci";
  70                         clocks = <&cpg CPG_CORE R8A774A1_CLK_Z>;
  71                 };
  72
  73                 a57_1: cpu@1 {
  74                         compatible = "arm,cortex-a57", "arm,armv8";
  75                         reg = <0x1>;
  76                         device_type = "cpu";
  77                         power-domains = <&sysc R8A774A1_PD_CA57_CPU1>;
  78                         next-level-cache = <&L2_CA57>;
  79                         enable-method = "psci";
  80                         clocks = <&cpg CPG_CORE R8A774A1_CLK_Z>;
  81                 };
  82
  83                 a53_0: cpu@100 {
  84                         compatible = "arm,cortex-a53", "arm,armv8";
  85                         reg = <0x100>;
  86                         device_type = "cpu";
  87                         power-domains = <&sysc R8A774A1_PD_CA53_CPU0>;
  88                         next-level-cache = <&L2_CA53>;
  89                         enable-method = "psci";
  90                         clocks = <&cpg CPG_CORE R8A774A1_CLK_Z2>;
  91                 };
  92
  93                 a53_1: cpu@101 {
  94                         compatible = "arm,cortex-a53", "arm,armv8";
  95                         reg = <0x101>;
  96                         device_type = "cpu";
  97                         power-domains = <&sysc R8A774A1_PD_CA53_CPU1>;
  98                         next-level-cache = <&L2_CA53>;
  99                         enable-method = "psci";
 100                         clocks = <&cpg CPG_CORE R8A774A1_CLK_Z2>;
 101                 };
 102
 103                 a53_2: cpu@102 {
 104                         compatible = "arm,cortex-a53", "arm,armv8";
 105                         reg = <0x102>;
 106                         device_type = "cpu";
 107                         power-domains = <&sysc R8A774A1_PD_CA53_CPU2>;
 108                         next-level-cache = <&L2_CA53>;
 109                         enable-method = "psci";
 110                         clocks = <&cpg CPG_CORE R8A774A1_CLK_Z2>;
 111                 };
 112
 113                 a53_3: cpu@103 {
 114                         compatible = "arm,cortex-a53", "arm,armv8";
 115                         reg = <0x103>;
 116                         device_type = "cpu";
 117                         power-domains = <&sysc R8A774A1_PD_CA53_CPU3>;
 118                         next-level-cache = <&L2_CA53>;
 119                         enable-method = "psci";
 120                         clocks = <&cpg CPG_CORE R8A774A1_CLK_Z2>;
 121                 };
 122
 123                 L2_CA57: cache-controller-0 {
 124                         compatible = "cache";
 125                         power-domains = <&sysc R8A774A1_PD_CA57_SCU>;
 126                         cache-unified;
 127                         cache-level = <2>;
 128                 };
 129
 130                 L2_CA53: cache-controller-1 {
 131                         compatible = "cache";
 132                         power-domains = <&sysc R8A774A1_PD_CA53_SCU>;
 133                         cache-unified;
 134                         cache-level = <2>;
 135                 };
 136         };
 137
 138         extal_clk: extal {
 139                 compatible = "fixed-clock";
 140                 #clock-cells = <0>;
 141                 /* This value must be overridden by the board */
 142                 clock-frequency = <0>;
 143         };
 144
 145         extalr_clk: extalr {
 146                 compatible = "fixed-clock";
 147                 #clock-cells = <0>;
 148                 /* This value must be overridden by the board */
 149                 clock-frequency = <0>;
 150         };
 151
 152         /* External PCIe clock - can be overridden by the board */
 153         pcie_bus_clk: pcie_bus {
 154                 compatible = "fixed-clock";
 155                 #clock-cells = <0>;
 156                 clock-frequency = <0>;
 157         };
 158
 159         pmu_a53 {
 160                 compatible = "arm,cortex-a53-pmu";
 161                 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
 162                                       <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
 163                                       <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
 164                                       <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
 165                 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>;
 166         };
 167
 168         pmu_a57 {
 169                 compatible = "arm,cortex-a57-pmu";
 170                 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 171                                       <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 172                 interrupt-affinity = <&a57_0>, <&a57_1>;
 173         };
 174
 175         psci {
 176                 compatible = "arm,psci-1.0", "arm,psci-0.2";
 177                 method = "smc";
 178         };
 179
 180         /* External SCIF clock - to be overridden by boards that provide it */
 181         scif_clk: scif {
 182                 compatible = "fixed-clock";
 183                 #clock-cells = <0>;
 184                 clock-frequency = <0>;
 185         };
 186
 187         soc {
 188                 compatible = "simple-bus";
 189                 interrupt-parent = <&gic>;
 190                 #address-cells = <2>;
 191                 #size-cells = <2>;
 192                 ranges;
 193
 194                 rwdt: watchdog@e6020000 {
 195                         compatible = "renesas,r8a774a1-wdt",
 196                                      "renesas,rcar-gen3-wdt";
 197                         reg = <0 0xe6020000 0 0x0c>;
 198                         clocks = <&cpg CPG_MOD 402>;
 199                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 200                         resets = <&cpg 402>;
 201                         status = "disabled";
 202                 };
 203
 204                 gpio0: gpio@e6050000 {
 205                         compatible = "renesas,gpio-r8a774a1",
 206                                      "renesas,rcar-gen3-gpio";
 207                         reg = <0 0xe6050000 0 0x50>;
 208                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 209                         #gpio-cells = <2>;
 210                         gpio-controller;
 211                         gpio-ranges = <&pfc 0 0 16>;
 212                         #interrupt-cells = <2>;
 213                         interrupt-controller;
 214                         clocks = <&cpg CPG_MOD 912>;
 215                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 216                         resets = <&cpg 912>;
 217                 };
 218
 219                 gpio1: gpio@e6051000 {
 220                         compatible = "renesas,gpio-r8a774a1",
 221                                      "renesas,rcar-gen3-gpio";
 222                         reg = <0 0xe6051000 0 0x50>;
 223                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 224                         #gpio-cells = <2>;
 225                         gpio-controller;
 226                         gpio-ranges = <&pfc 0 32 29>;
 227                         #interrupt-cells = <2>;
 228                         interrupt-controller;
 229                         clocks = <&cpg CPG_MOD 911>;
 230                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 231                         resets = <&cpg 911>;
 232                 };
 233
 234                 gpio2: gpio@e6052000 {
 235                         compatible = "renesas,gpio-r8a774a1",
 236                                      "renesas,rcar-gen3-gpio";
 237                         reg = <0 0xe6052000 0 0x50>;
 238                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 239                         #gpio-cells = <2>;
 240                         gpio-controller;
 241                         gpio-ranges = <&pfc 0 64 15>;
 242                         #interrupt-cells = <2>;
 243                         interrupt-controller;
 244                         clocks = <&cpg CPG_MOD 910>;
 245                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 246                         resets = <&cpg 910>;
 247                 };
 248
 249                 gpio3: gpio@e6053000 {
 250                         compatible = "renesas,gpio-r8a774a1",
 251                                      "renesas,rcar-gen3-gpio";
 252                         reg = <0 0xe6053000 0 0x50>;
 253                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 254                         #gpio-cells = <2>;
 255                         gpio-controller;
 256                         gpio-ranges = <&pfc 0 96 16>;
 257                         #interrupt-cells = <2>;
 258                         interrupt-controller;
 259                         clocks = <&cpg CPG_MOD 909>;
 260                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 261                         resets = <&cpg 909>;
 262                 };
 263
 264                 gpio4: gpio@e6054000 {
 265                         compatible = "renesas,gpio-r8a774a1",
 266                                      "renesas,rcar-gen3-gpio";
 267                         reg = <0 0xe6054000 0 0x50>;
 268                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 269                         #gpio-cells = <2>;
 270                         gpio-controller;
 271                         gpio-ranges = <&pfc 0 128 18>;
 272                         #interrupt-cells = <2>;
 273                         interrupt-controller;
 274                         clocks = <&cpg CPG_MOD 908>;
 275                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 276                         resets = <&cpg 908>;
 277                 };
 278
 279                 gpio5: gpio@e6055000 {
 280                         compatible = "renesas,gpio-r8a774a1",
 281                                      "renesas,rcar-gen3-gpio";
 282                         reg = <0 0xe6055000 0 0x50>;
 283                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 284                         #gpio-cells = <2>;
 285                         gpio-controller;
 286                         gpio-ranges = <&pfc 0 160 26>;
 287                         #interrupt-cells = <2>;
 288                         interrupt-controller;
 289                         clocks = <&cpg CPG_MOD 907>;
 290                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 291                         resets = <&cpg 907>;
 292                 };
 293
 294                 gpio6: gpio@e6055400 {
 295                         compatible = "renesas,gpio-r8a774a1",
 296                                      "renesas,rcar-gen3-gpio";
 297                         reg = <0 0xe6055400 0 0x50>;
 298                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 299                         #gpio-cells = <2>;
 300                         gpio-controller;
 301                         gpio-ranges = <&pfc 0 192 32>;
 302                         #interrupt-cells = <2>;
 303                         interrupt-controller;
 304                         clocks = <&cpg CPG_MOD 906>;
 305                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 306                         resets = <&cpg 906>;
 307                 };
 308
 309                 gpio7: gpio@e6055800 {
 310                         compatible = "renesas,gpio-r8a774a1",
 311                                      "renesas,rcar-gen3-gpio";
 312                         reg = <0 0xe6055800 0 0x50>;
 313                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 314                         #gpio-cells = <2>;
 315                         gpio-controller;
 316                         gpio-ranges = <&pfc 0 224 4>;
 317                         #interrupt-cells = <2>;
 318                         interrupt-controller;
 319                         clocks = <&cpg CPG_MOD 905>;
 320                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 321                         resets = <&cpg 905>;
 322                 };
 323
 324                 pfc: pin-controller@e6060000 {
 325                         compatible = "renesas,pfc-r8a774a1";
 326                         reg = <0 0xe6060000 0 0x50c>;
 327                 };
 328
 329                 cpg: clock-controller@e6150000 {
 330                         compatible = "renesas,r8a774a1-cpg-mssr";
 331                         reg = <0 0xe6150000 0 0x0bb0>;
 332                         clocks = <&extal_clk>, <&extalr_clk>;
 333                         clock-names = "extal", "extalr";
 334                         #clock-cells = <2>;
 335                         #power-domain-cells = <0>;
 336                         #reset-cells = <1>;
 337                 };
 338
 339                 rst: reset-controller@e6160000 {
 340                         compatible = "renesas,r8a774a1-rst";
 341                         reg = <0 0xe6160000 0 0x018c>;
 342                 };
 343
 344                 sysc: system-controller@e6180000 {
 345                         compatible = "renesas,r8a774a1-sysc";
 346                         reg = <0 0xe6180000 0 0x0400>;
 347                         #power-domain-cells = <1>;
 348                 };
 349
 350                 tsc: thermal@e6198000 {
 351                         compatible = "renesas,r8a774a1-thermal";
 352                         reg = <0 0xe6198000 0 0x100>,
 353                               <0 0xe61a0000 0 0x100>,
 354                               <0 0xe61a8000 0 0x100>;
 355                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
 356                                      <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
 357                                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 358                         clocks = <&cpg CPG_MOD 522>;
 359                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 360                         resets = <&cpg 522>;
 361                         #thermal-sensor-cells = <1>;
 362                 };
 363
 364                 intc_ex: interrupt-controller@e61c0000 {
 365                         compatible = "renesas,intc-ex-r8a774a1", "renesas,irqc";
 366                         #interrupt-cells = <2>;
 367                         interrupt-controller;
 368                         reg = <0 0xe61c0000 0 0x200>;
 369                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
 370                                       GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
 371                                       GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
 372                                       GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
 373                                       GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
 374                                       GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 375                         clocks = <&cpg CPG_MOD 407>;
 376                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 377                         resets = <&cpg 407>;
 378                 };
 379
 380                 i2c0: i2c@e6500000 {
 381                         #address-cells = <1>;
 382                         #size-cells = <0>;
 383                         compatible = "renesas,i2c-r8a774a1",
 384                                      "renesas,rcar-gen3-i2c";
 385                         reg = <0 0xe6500000 0 0x40>;
 386                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 387                         clocks = <&cpg CPG_MOD 931>;
 388                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 389                         resets = <&cpg 931>;
 390                         dmas = <&dmac1 0x91>, <&dmac1 0x90>,
 391                                <&dmac2 0x91>, <&dmac2 0x90>;
 392                         dma-names = "tx", "rx", "tx", "rx";
 393                         i2c-scl-internal-delay-ns = <110>;
 394                         status = "disabled";
 395                 };
 396
 397                 i2c1: i2c@e6508000 {
 398                         #address-cells = <1>;
 399                         #size-cells = <0>;
 400                         compatible = "renesas,i2c-r8a774a1",
 401                                      "renesas,rcar-gen3-i2c";
 402                         reg = <0 0xe6508000 0 0x40>;
 403                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 404                         clocks = <&cpg CPG_MOD 930>;
 405                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 406                         resets = <&cpg 930>;
 407                         dmas = <&dmac1 0x93>, <&dmac1 0x92>,
 408                                <&dmac2 0x93>, <&dmac2 0x92>;
 409                         dma-names = "tx", "rx", "tx", "rx";
 410                         i2c-scl-internal-delay-ns = <6>;
 411                         status = "disabled";
 412                 };
 413
 414                 i2c2: i2c@e6510000 {
 415                         #address-cells = <1>;
 416                         #size-cells = <0>;
 417                         compatible = "renesas,i2c-r8a774a1",
 418                                      "renesas,rcar-gen3-i2c";
 419                         reg = <0 0xe6510000 0 0x40>;
 420                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 421                         clocks = <&cpg CPG_MOD 929>;
 422                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 423                         resets = <&cpg 929>;
 424                         dmas = <&dmac1 0x95>, <&dmac1 0x94>,
 425                                <&dmac2 0x95>, <&dmac2 0x94>;
 426                         dma-names = "tx", "rx", "tx", "rx";
 427                         i2c-scl-internal-delay-ns = <6>;
 428                         status = "disabled";
 429                 };
 430
 431                 i2c3: i2c@e66d0000 {
 432                         #address-cells = <1>;
 433                         #size-cells = <0>;
 434                         compatible = "renesas,i2c-r8a774a1",
 435                                      "renesas,rcar-gen3-i2c";
 436                         reg = <0 0xe66d0000 0 0x40>;
 437                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 438                         clocks = <&cpg CPG_MOD 928>;
 439                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 440                         resets = <&cpg 928>;
 441                         dmas = <&dmac0 0x97>, <&dmac0 0x96>;
 442                         dma-names = "tx", "rx";
 443                         i2c-scl-internal-delay-ns = <110>;
 444                         status = "disabled";
 445                 };
 446
 447                 i2c4: i2c@e66d8000 {
 448                         #address-cells = <1>;
 449                         #size-cells = <0>;
 450                         compatible = "renesas,i2c-r8a774a1",
 451                                      "renesas,rcar-gen3-i2c";
 452                         reg = <0 0xe66d8000 0 0x40>;
 453                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 454                         clocks = <&cpg CPG_MOD 927>;
 455                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 456                         resets = <&cpg 927>;
 457                         dmas = <&dmac0 0x99>, <&dmac0 0x98>;
 458                         dma-names = "tx", "rx";
 459                         i2c-scl-internal-delay-ns = <110>;
 460                         status = "disabled";
 461                 };
 462
 463                 i2c5: i2c@e66e0000 {
 464                         #address-cells = <1>;
 465                         #size-cells = <0>;
 466                         compatible = "renesas,i2c-r8a774a1",
 467                                      "renesas,rcar-gen3-i2c";
 468                         reg = <0 0xe66e0000 0 0x40>;
 469                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 470                         clocks = <&cpg CPG_MOD 919>;
 471                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 472                         resets = <&cpg 919>;
 473                         dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
 474                         dma-names = "tx", "rx";
 475                         i2c-scl-internal-delay-ns = <110>;
 476                         status = "disabled";
 477                 };
 478
 479                 i2c6: i2c@e66e8000 {
 480                         #address-cells = <1>;
 481                         #size-cells = <0>;
 482                         compatible = "renesas,i2c-r8a774a1",
 483                                      "renesas,rcar-gen3-i2c";
 484                         reg = <0 0xe66e8000 0 0x40>;
 485                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 486                         clocks = <&cpg CPG_MOD 918>;
 487                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 488                         resets = <&cpg 918>;
 489                         dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
 490                         dma-names = "tx", "rx";
 491                         i2c-scl-internal-delay-ns = <6>;
 492                         status = "disabled";
 493                 };
 494
 495                 i2c_dvfs: i2c@e60b0000 {
 496                         #address-cells = <1>;
 497                         #size-cells = <0>;
 498                         compatible = "renesas,iic-r8a774a1",
 499                                      "renesas,rcar-gen3-iic",
 500                                      "renesas,rmobile-iic";
 501                         reg = <0 0xe60b0000 0 0x425>;
 502                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 503                         clocks = <&cpg CPG_MOD 926>;
 504                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 505                         resets = <&cpg 926>;
 506                         dmas = <&dmac0 0x11>, <&dmac0 0x10>;
 507                         dma-names = "tx", "rx";
 508                         status = "disabled";
 509                 };
 510
 511                 hscif0: serial@e6540000 {
 512                         compatible = "renesas,hscif-r8a774a1",
 513                                      "renesas,rcar-gen3-hscif",
 514                                      "renesas,hscif";
 515                         reg = <0 0xe6540000 0 0x60>;
 516                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 517                         clocks = <&cpg CPG_MOD 520>,
 518                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
 519                                  <&scif_clk>;
 520                         clock-names = "fck", "brg_int", "scif_clk";
 521                         dmas = <&dmac1 0x31>, <&dmac1 0x30>,
 522                                <&dmac2 0x31>, <&dmac2 0x30>;
 523                         dma-names = "tx", "rx", "tx", "rx";
 524                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 525                         resets = <&cpg 520>;
 526                         status = "disabled";
 527                 };
 528
 529                 hscif1: serial@e6550000 {
 530                         compatible = "renesas,hscif-r8a774a1",
 531                                      "renesas,rcar-gen3-hscif",
 532                                      "renesas,hscif";
 533                         reg = <0 0xe6550000 0 0x60>;
 534                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 535                         clocks = <&cpg CPG_MOD 519>,
 536                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
 537                                  <&scif_clk>;
 538                         clock-names = "fck", "brg_int", "scif_clk";
 539                         dmas = <&dmac1 0x33>, <&dmac1 0x32>,
 540                                <&dmac2 0x33>, <&dmac2 0x32>;
 541                         dma-names = "tx", "rx", "tx", "rx";
 542                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 543                         resets = <&cpg 519>;
 544                         status = "disabled";
 545                 };
 546
 547                 hscif2: serial@e6560000 {
 548                         compatible = "renesas,hscif-r8a774a1",
 549                                      "renesas,rcar-gen3-hscif",
 550                                      "renesas,hscif";
 551                         reg = <0 0xe6560000 0 0x60>;
 552                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 553                         clocks = <&cpg CPG_MOD 518>,
 554                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
 555                                  <&scif_clk>;
 556                         clock-names = "fck", "brg_int", "scif_clk";
 557                         dmas = <&dmac1 0x35>, <&dmac1 0x34>,
 558                                <&dmac2 0x35>, <&dmac2 0x34>;
 559                         dma-names = "tx", "rx", "tx", "rx";
 560                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 561                         resets = <&cpg 518>;
 562                         status = "disabled";
 563                 };
 564
 565                 hscif3: serial@e66a0000 {
 566                         compatible = "renesas,hscif-r8a774a1",
 567                                      "renesas,rcar-gen3-hscif",
 568                                      "renesas,hscif";
 569                         reg = <0 0xe66a0000 0 0x60>;
 570                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 571                         clocks = <&cpg CPG_MOD 517>,
 572                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
 573                                  <&scif_clk>;
 574                         clock-names = "fck", "brg_int", "scif_clk";
 575                         dmas = <&dmac0 0x37>, <&dmac0 0x36>;
 576                         dma-names = "tx", "rx";
 577                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 578                         resets = <&cpg 517>;
 579                         status = "disabled";
 580                 };
 581
 582                 hscif4: serial@e66b0000 {
 583                         compatible = "renesas,hscif-r8a774a1",
 584                                      "renesas,rcar-gen3-hscif",
 585                                      "renesas,hscif";
 586                         reg = <0 0xe66b0000 0 0x60>;
 587                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
 588                         clocks = <&cpg CPG_MOD 516>,
 589                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
 590                                  <&scif_clk>;
 591                         clock-names = "fck", "brg_int", "scif_clk";
 592                         dmas = <&dmac0 0x39>, <&dmac0 0x38>;
 593                         dma-names = "tx", "rx";
 594                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 595                         resets = <&cpg 516>;
 596                         status = "disabled";
 597                 };
 598
 599                 hsusb: usb@e6590000 {
 600                         compatible = "renesas,usbhs-r8a774a1",
 601                                      "renesas,rcar-gen3-usbhs";
 602                         reg = <0 0xe6590000 0 0x100>;
 603                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
 604                         clocks = <&cpg CPG_MOD 704>;
 605                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
 606                                <&usb_dmac1 0>, <&usb_dmac1 1>;
 607                         dma-names = "ch0", "ch1", "ch2", "ch3";
 608                         renesas,buswait = <11>;
 609                         phys = <&usb2_phy0>;
 610                         phy-names = "usb";
 611                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 612                         resets = <&cpg 704>;
 613                         status = "disabled";
 614                 };
 615
 616                 usb_dmac0: dma-controller@e65a0000 {
 617                         compatible = "renesas,r8a774a1-usb-dmac",
 618                                      "renesas,usb-dmac";
 619                         reg = <0 0xe65a0000 0 0x100>;
 620                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
 621                                       GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 622                         interrupt-names = "ch0", "ch1";
 623                         clocks = <&cpg CPG_MOD 330>;
 624                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 625                         resets = <&cpg 330>;
 626                         #dma-cells = <1>;
 627                         dma-channels = <2>;
 628                 };
 629
 630                 usb_dmac1: dma-controller@e65b0000 {
 631                         compatible = "renesas,r8a774a1-usb-dmac",
 632                                      "renesas,usb-dmac";
 633                         reg = <0 0xe65b0000 0 0x100>;
 634                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
 635                                       GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 636                         interrupt-names = "ch0", "ch1";
 637                         clocks = <&cpg CPG_MOD 331>;
 638                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 639                         resets = <&cpg 331>;
 640                         #dma-cells = <1>;
 641                         dma-channels = <2>;
 642                 };
 643
 644                 usb3_phy0: usb-phy@e65ee000 {
 645                         compatible = "renesas,r8a774a1-usb3-phy",
 646                                      "renesas,rcar-gen3-usb3-phy";
 647                         reg = <0 0xe65ee000 0 0x90>;
 648                         clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
 649                                  <&usb_extal_clk>;
 650                         clock-names = "usb3-if", "usb3s_clk", "usb_extal";
 651                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 652                         resets = <&cpg 328>;
 653                         #phy-cells = <0>;
 654                         status = "disabled";
 655                 };
 656
 657                 dmac0: dma-controller@e6700000 {
 658                         compatible = "renesas,dmac-r8a774a1",
 659                                      "renesas,rcar-dmac";
 660                         reg = <0 0xe6700000 0 0x10000>;
 661                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
 662                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 663                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 664                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 665                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 666                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 667                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 668                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 669                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 670                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 671                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 672                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 673                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 674                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 675                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 676                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
 677                                       GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 678                         interrupt-names = "error",
 679                                         "ch0", "ch1", "ch2", "ch3",
 680                                         "ch4", "ch5", "ch6", "ch7",
 681                                         "ch8", "ch9", "ch10", "ch11",
 682                                         "ch12", "ch13", "ch14", "ch15";
 683                         clocks = <&cpg CPG_MOD 219>;
 684                         clock-names = "fck";
 685                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 686                         resets = <&cpg 219>;
 687                         #dma-cells = <1>;
 688                         dma-channels = <16>;
 689                 };
 690
 691                 dmac1: dma-controller@e7300000 {
 692                         compatible = "renesas,dmac-r8a774a1",
 693                                      "renesas,rcar-dmac";
 694                         reg = <0 0xe7300000 0 0x10000>;
 695                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 696                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 697                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 698                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 699                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 700                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 701                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 702                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 703                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 704                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 705                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 706                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 707                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 708                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 709                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 710                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
 711                                       GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
 712                         interrupt-names = "error",
 713                                         "ch0", "ch1", "ch2", "ch3",
 714                                         "ch4", "ch5", "ch6", "ch7",
 715                                         "ch8", "ch9", "ch10", "ch11",
 716                                         "ch12", "ch13", "ch14", "ch15";
 717                         clocks = <&cpg CPG_MOD 218>;
 718                         clock-names = "fck";
 719                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 720                         resets = <&cpg 218>;
 721                         #dma-cells = <1>;
 722                         dma-channels = <16>;
 723                 };
 724
 725                 dmac2: dma-controller@e7310000 {
 726                         compatible = "renesas,dmac-r8a774a1",
 727                                      "renesas,rcar-dmac";
 728                         reg = <0 0xe7310000 0 0x10000>;
 729                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
 730                                       GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
 731                                       GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
 732                                       GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
 733                                       GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
 734                                       GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
 735                                       GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
 736                                       GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
 737                                       GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
 738                                       GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
 739                                       GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
 740                                       GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
 741                                       GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
 742                                       GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
 743                                       GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
 744                                       GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
 745                                       GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
 746                         interrupt-names = "error",
 747                                         "ch0", "ch1", "ch2", "ch3",
 748                                         "ch4", "ch5", "ch6", "ch7",
 749                                         "ch8", "ch9", "ch10", "ch11",
 750                                         "ch12", "ch13", "ch14", "ch15";
 751                         clocks = <&cpg CPG_MOD 217>;
 752                         clock-names = "fck";
 753                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 754                         resets = <&cpg 217>;
 755                         #dma-cells = <1>;
 756                         dma-channels = <16>;
 757                 };
 758
 759                 ipmmu_ds0: mmu@e6740000 {
 760                         compatible = "renesas,ipmmu-r8a774a1";
 761                         reg = <0 0xe6740000 0 0x1000>;
 762                         renesas,ipmmu-main = <&ipmmu_mm 0>;
 763                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 764                         #iommu-cells = <1>;
 765                 };
 766
 767                 ipmmu_ds1: mmu@e7740000 {
 768                         compatible = "renesas,ipmmu-r8a774a1";
 769                         reg = <0 0xe7740000 0 0x1000>;
 770                         renesas,ipmmu-main = <&ipmmu_mm 1>;
 771                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 772                         #iommu-cells = <1>;
 773                 };
 774
 775                 ipmmu_hc: mmu@e6570000 {
 776                         compatible = "renesas,ipmmu-r8a774a1";
 777                         reg = <0 0xe6570000 0 0x1000>;
 778                         renesas,ipmmu-main = <&ipmmu_mm 2>;
 779                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 780                         #iommu-cells = <1>;
 781                 };
 782
 783                 ipmmu_mm: mmu@e67b0000 {
 784                         compatible = "renesas,ipmmu-r8a774a1";
 785                         reg = <0 0xe67b0000 0 0x1000>;
 786                         interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
 787                                      <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
 788                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 789                         #iommu-cells = <1>;
 790                 };
 791
 792                 ipmmu_mp: mmu@ec670000 {
 793                         compatible = "renesas,ipmmu-r8a774a1";
 794                         reg = <0 0xec670000 0 0x1000>;
 795                         renesas,ipmmu-main = <&ipmmu_mm 4>;
 796                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 797                         #iommu-cells = <1>;
 798                 };
 799
 800                 ipmmu_pv0: mmu@fd800000 {
 801                         compatible = "renesas,ipmmu-r8a774a1";
 802                         reg = <0 0xfd800000 0 0x1000>;
 803                         renesas,ipmmu-main = <&ipmmu_mm 5>;
 804                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 805                         #iommu-cells = <1>;
 806                 };
 807
 808                 ipmmu_pv1: mmu@fd950000 {
 809                         compatible = "renesas,ipmmu-r8a774a1";
 810                         reg = <0 0xfd950000 0 0x1000>;
 811                         renesas,ipmmu-main = <&ipmmu_mm 6>;
 812                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 813                         #iommu-cells = <1>;
 814                 };
 815
 816                 ipmmu_vc0: mmu@fe6b0000 {
 817                         compatible = "renesas,ipmmu-r8a774a1";
 818                         reg = <0 0xfe6b0000 0 0x1000>;
 819                         renesas,ipmmu-main = <&ipmmu_mm 8>;
 820                         power-domains = <&sysc R8A774A1_PD_A3VC>;
 821                         #iommu-cells = <1>;
 822                 };
 823
 824                 ipmmu_vi0: mmu@febd0000 {
 825                         compatible = "renesas,ipmmu-r8a774a1";
 826                         reg = <0 0xfebd0000 0 0x1000>;
 827                         renesas,ipmmu-main = <&ipmmu_mm 9>;
 828                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 829                         #iommu-cells = <1>;
 830                 };
 831
 832                 avb: ethernet@e6800000 {
 833                         compatible = "renesas,etheravb-r8a774a1",
 834                                      "renesas,etheravb-rcar-gen3";
 835                         reg = <0 0xe6800000 0 0x800>;
 836                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
 837                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
 838                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
 839                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
 840                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
 841                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
 842                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
 843                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
 844                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
 845                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
 846                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
 847                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
 848                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
 849                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
 850                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
 851                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 852                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 853                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
 854                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 855                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
 856                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
 857                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
 858                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
 859                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
 860                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 861                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
 862                                           "ch4", "ch5", "ch6", "ch7",
 863                                           "ch8", "ch9", "ch10", "ch11",
 864                                           "ch12", "ch13", "ch14", "ch15",
 865                                           "ch16", "ch17", "ch18", "ch19",
 866                                           "ch20", "ch21", "ch22", "ch23",
 867                                           "ch24";
 868                         clocks = <&cpg CPG_MOD 812>;
 869                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 870                         resets = <&cpg 812>;
 871                         phy-mode = "rgmii";
 872                         #address-cells = <1>;
 873                         #size-cells = <0>;
 874                         status = "disabled";
 875                 };
 876
 877                 can0: can@e6c30000 {
 878                         compatible = "renesas,can-r8a774a1",
 879                                      "renesas,rcar-gen3-can";
 880                         reg = <0 0xe6c30000 0 0x1000>;
 881                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
 882                         clocks = <&cpg CPG_MOD 916>, <&can_clk>;
 883                         clock-names = "clkp1", "can_clk";
 884                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 885                         resets = <&cpg 916>;
 886                         status = "disabled";
 887                 };
 888
 889                 can1: can@e6c38000 {
 890                         compatible = "renesas,can-r8a774a1",
 891                                      "renesas,rcar-gen3-can";
 892                         reg = <0 0xe6c38000 0 0x1000>;
 893                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
 894                         clocks = <&cpg CPG_MOD 915>, <&can_clk>;
 895                         clock-names = "clkp1", "can_clk";
 896                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 897                         resets = <&cpg 915>;
 898                         status = "disabled";
 899                 };
 900
 901                 pwm0: pwm@e6e30000 {
 902                         compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
 903                         reg = <0 0xe6e30000 0 0x8>;
 904                         #pwm-cells = <2>;
 905                         clocks = <&cpg CPG_MOD 523>;
 906                         resets = <&cpg 523>;
 907                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 908                         status = "disabled";
 909                 };
 910
 911                 pwm1: pwm@e6e31000 {
 912                         compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
 913                         reg = <0 0xe6e31000 0 0x8>;
 914                         #pwm-cells = <2>;
 915                         clocks = <&cpg CPG_MOD 523>;
 916                         resets = <&cpg 523>;
 917                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 918                         status = "disabled";
 919                 };
 920
 921                 pwm2: pwm@e6e32000 {
 922                         compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
 923                         reg = <0 0xe6e32000 0 0x8>;
 924                         #pwm-cells = <2>;
 925                         clocks = <&cpg CPG_MOD 523>;
 926                         resets = <&cpg 523>;
 927                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 928                         status = "disabled";
 929                 };
 930
 931                 pwm3: pwm@e6e33000 {
 932                         compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
 933                         reg = <0 0xe6e33000 0 0x8>;
 934                         #pwm-cells = <2>;
 935                         clocks = <&cpg CPG_MOD 523>;
 936                         resets = <&cpg 523>;
 937                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 938                         status = "disabled";
 939                 };
 940
 941                 pwm4: pwm@e6e34000 {
 942                         compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
 943                         reg = <0 0xe6e34000 0 0x8>;
 944                         #pwm-cells = <2>;
 945                         clocks = <&cpg CPG_MOD 523>;
 946                         resets = <&cpg 523>;
 947                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 948                         status = "disabled";
 949                 };
 950
 951                 pwm5: pwm@e6e35000 {
 952                         compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
 953                         reg = <0 0xe6e35000 0 0x8>;
 954                         #pwm-cells = <2>;
 955                         clocks = <&cpg CPG_MOD 523>;
 956                         resets = <&cpg 523>;
 957                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 958                         status = "disabled";
 959                 };
 960
 961                 pwm6: pwm@e6e36000 {
 962                         compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
 963                         reg = <0 0xe6e36000 0 0x8>;
 964                         #pwm-cells = <2>;
 965                         clocks = <&cpg CPG_MOD 523>;
 966                         resets = <&cpg 523>;
 967                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 968                         status = "disabled";
 969                 };
 970
 971                 scif0: serial@e6e60000 {
 972                         compatible = "renesas,scif-r8a774a1",
 973                                      "renesas,rcar-gen3-scif", "renesas,scif";
 974                         reg = <0 0xe6e60000 0 0x40>;
 975                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 976                         clocks = <&cpg CPG_MOD 207>,
 977                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
 978                                  <&scif_clk>;
 979                         clock-names = "fck", "brg_int", "scif_clk";
 980                         dmas = <&dmac1 0x51>, <&dmac1 0x50>,
 981                                <&dmac2 0x51>, <&dmac2 0x50>;
 982                         dma-names = "tx", "rx", "tx", "rx";
 983                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 984                         resets = <&cpg 207>;
 985                         status = "disabled";
 986                 };
 987
 988                 scif1: serial@e6e68000 {
 989                         compatible = "renesas,scif-r8a774a1",
 990                                      "renesas,rcar-gen3-scif", "renesas,scif";
 991                         reg = <0 0xe6e68000 0 0x40>;
 992                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 993                         clocks = <&cpg CPG_MOD 206>,
 994                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
 995                                  <&scif_clk>;
 996                         clock-names = "fck", "brg_int", "scif_clk";
 997                         dmas = <&dmac1 0x53>, <&dmac1 0x52>,
 998                                <&dmac2 0x53>, <&dmac2 0x52>;
 999                         dma-names = "tx", "rx", "tx", "rx";
1000                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1001                         resets = <&cpg 206>;
1002                         status = "disabled";
1003                 };
1004
1005                 scif2: serial@e6e88000 {
1006                         compatible = "renesas,scif-r8a774a1",
1007                                      "renesas,rcar-gen3-scif", "renesas,scif";
1008                         reg = <0 0xe6e88000 0 0x40>;
1009                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1010                         clocks = <&cpg CPG_MOD 310>,
1011                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
1012                                  <&scif_clk>;
1013                         clock-names = "fck", "brg_int", "scif_clk";
1014                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1015                         resets = <&cpg 310>;
1016                         status = "disabled";
1017                 };
1018
1019                 scif3: serial@e6c50000 {
1020                         compatible = "renesas,scif-r8a774a1",
1021                                      "renesas,rcar-gen3-scif", "renesas,scif";
1022                         reg = <0 0xe6c50000 0 0x40>;
1023                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1024                         clocks = <&cpg CPG_MOD 204>,
1025                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
1026                                  <&scif_clk>;
1027                         clock-names = "fck", "brg_int", "scif_clk";
1028                         dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1029                         dma-names = "tx", "rx";
1030                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1031                         resets = <&cpg 204>;
1032                         status = "disabled";
1033                 };
1034
1035                 scif4: serial@e6c40000 {
1036                         compatible = "renesas,scif-r8a774a1",
1037                                      "renesas,rcar-gen3-scif", "renesas,scif";
1038                         reg = <0 0xe6c40000 0 0x40>;
1039                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1040                         clocks = <&cpg CPG_MOD 203>,
1041                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
1042                                  <&scif_clk>;
1043                         clock-names = "fck", "brg_int", "scif_clk";
1044                         dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1045                         dma-names = "tx", "rx";
1046                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1047                         resets = <&cpg 203>;
1048                         status = "disabled";
1049                 };
1050
1051                 scif5: serial@e6f30000 {
1052                         compatible = "renesas,scif-r8a774a1",
1053                                      "renesas,rcar-gen3-scif", "renesas,scif";
1054                         reg = <0 0xe6f30000 0 0x40>;
1055                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1056                         clocks = <&cpg CPG_MOD 202>,
1057                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
1058                                  <&scif_clk>;
1059                         clock-names = "fck", "brg_int", "scif_clk";
1060                         dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1061                                <&dmac2 0x5b>, <&dmac2 0x5a>;
1062                         dma-names = "tx", "rx", "tx", "rx";
1063                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1064                         resets = <&cpg 202>;
1065                         status = "disabled";
1066                 };
1067
1068                 msiof0: spi@e6e90000 {
1069                         compatible = "renesas,msiof-r8a774a1",
1070                                      "renesas,rcar-gen3-msiof";
1071                         reg = <0 0xe6e90000 0 0x0064>;
1072                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1073                         clocks = <&cpg CPG_MOD 211>;
1074                         dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1075                                <&dmac2 0x41>, <&dmac2 0x40>;
1076                         dma-names = "tx", "rx", "tx", "rx";
1077                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1078                         resets = <&cpg 211>;
1079                         #address-cells = <1>;
1080                         #size-cells = <0>;
1081                         status = "disabled";
1082                 };
1083
1084                 msiof1: spi@e6ea0000 {
1085                         compatible = "renesas,msiof-r8a774a1",
1086                                      "renesas,rcar-gen3-msiof";
1087                         reg = <0 0xe6ea0000 0 0x0064>;
1088                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1089                         clocks = <&cpg CPG_MOD 210>;
1090                         dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1091                                <&dmac2 0x43>, <&dmac2 0x42>;
1092                         dma-names = "tx", "rx", "tx", "rx";
1093                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1094                         resets = <&cpg 210>;
1095                         #address-cells = <1>;
1096                         #size-cells = <0>;
1097                         status = "disabled";
1098                 };
1099
1100                 msiof2: spi@e6c00000 {
1101                         compatible = "renesas,msiof-r8a774a1",
1102                                      "renesas,rcar-gen3-msiof";
1103                         reg = <0 0xe6c00000 0 0x0064>;
1104                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1105                         clocks = <&cpg CPG_MOD 209>;
1106                         dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1107                         dma-names = "tx", "rx";
1108                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1109                         resets = <&cpg 209>;
1110                         #address-cells = <1>;
1111                         #size-cells = <0>;
1112                         status = "disabled";
1113                 };
1114
1115                 msiof3: spi@e6c10000 {
1116                         compatible = "renesas,msiof-r8a774a1",
1117                                      "renesas,rcar-gen3-msiof";
1118                         reg = <0 0xe6c10000 0 0x0064>;
1119                         interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1120                         clocks = <&cpg CPG_MOD 208>;
1121                         dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1122                         dma-names = "tx", "rx";
1123                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1124                         resets = <&cpg 208>;
1125                         #address-cells = <1>;
1126                         #size-cells = <0>;
1127                         status = "disabled";
1128                 };
1129
1130                 vin0: video@e6ef0000 {
1131                         compatible = "renesas,vin-r8a774a1";
1132                         reg = <0 0xe6ef0000 0 0x1000>;
1133                         interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1134                         clocks = <&cpg CPG_MOD 811>;
1135                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1136                         resets = <&cpg 811>;
1137                         renesas,id = <0>;
1138                         status = "disabled";
1139
1140                         ports {
1141                                 #address-cells = <1>;
1142                                 #size-cells = <0>;
1143
1144                                 port@1 {
1145                                         #address-cells = <1>;
1146                                         #size-cells = <0>;
1147
1148                                         reg = <1>;
1149
1150                                         vin0csi20: endpoint@0 {
1151                                                 reg = <0>;
1152                                                 remote-endpoint = <&csi20vin0>;
1153                                         };
1154                                         vin0csi40: endpoint@2 {
1155                                                 reg = <2>;
1156                                                 remote-endpoint = <&csi40vin0>;
1157                                         };
1158                                 };
1159                         };
1160                 };
1161
1162                 vin1: video@e6ef1000 {
1163                         compatible = "renesas,vin-r8a774a1";
1164                         reg = <0 0xe6ef1000 0 0x1000>;
1165                         interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1166                         clocks = <&cpg CPG_MOD 810>;
1167                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1168                         resets = <&cpg 810>;
1169                         renesas,id = <1>;
1170                         status = "disabled";
1171
1172                         ports {
1173                                 #address-cells = <1>;
1174                                 #size-cells = <0>;
1175
1176                                 port@1 {
1177                                         #address-cells = <1>;
1178                                         #size-cells = <0>;
1179
1180                                         reg = <1>;
1181
1182                                         vin1csi20: endpoint@0 {
1183                                                 reg = <0>;
1184                                                 remote-endpoint = <&csi20vin1>;
1185                                         };
1186                                         vin1csi40: endpoint@2 {
1187                                                 reg = <2>;
1188                                                 remote-endpoint = <&csi40vin1>;
1189                                         };
1190                                 };
1191                         };
1192                 };
1193
1194                 vin2: video@e6ef2000 {
1195                         compatible = "renesas,vin-r8a774a1";
1196                         reg = <0 0xe6ef2000 0 0x1000>;
1197                         interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1198                         clocks = <&cpg CPG_MOD 809>;
1199                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1200                         resets = <&cpg 809>;
1201                         renesas,id = <2>;
1202                         status = "disabled";
1203
1204                         ports {
1205                                 #address-cells = <1>;
1206                                 #size-cells = <0>;
1207
1208                                 port@1 {
1209                                         #address-cells = <1>;
1210                                         #size-cells = <0>;
1211
1212                                         reg = <1>;
1213
1214                                         vin2csi20: endpoint@0 {
1215                                                 reg = <0>;
1216                                                 remote-endpoint = <&csi20vin2>;
1217                                         };
1218                                         vin2csi40: endpoint@2 {
1219                                                 reg = <2>;
1220                                                 remote-endpoint = <&csi40vin2>;
1221                                         };
1222                                 };
1223                         };
1224                 };
1225
1226                 vin3: video@e6ef3000 {
1227                         compatible = "renesas,vin-r8a774a1";
1228                         reg = <0 0xe6ef3000 0 0x1000>;
1229                         interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1230                         clocks = <&cpg CPG_MOD 808>;
1231                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1232                         resets = <&cpg 808>;
1233                         renesas,id = <3>;
1234                         status = "disabled";
1235
1236                         ports {
1237                                 #address-cells = <1>;
1238                                 #size-cells = <0>;
1239
1240                                 port@1 {
1241                                         #address-cells = <1>;
1242                                         #size-cells = <0>;
1243
1244                                         reg = <1>;
1245
1246                                         vin3csi20: endpoint@0 {
1247                                                 reg = <0>;
1248                                                 remote-endpoint = <&csi20vin3>;
1249                                         };
1250                                         vin3csi40: endpoint@2 {
1251                                                 reg = <2>;
1252                                                 remote-endpoint = <&csi40vin3>;
1253                                         };
1254                                 };
1255                         };
1256                 };
1257
1258                 vin4: video@e6ef4000 {
1259                         compatible = "renesas,vin-r8a774a1";
1260                         reg = <0 0xe6ef4000 0 0x1000>;
1261                         interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1262                         clocks = <&cpg CPG_MOD 807>;
1263                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1264                         resets = <&cpg 807>;
1265                         renesas,id = <4>;
1266                         status = "disabled";
1267
1268                         ports {
1269                                 #address-cells = <1>;
1270                                 #size-cells = <0>;
1271
1272                                 port@1 {
1273                                         #address-cells = <1>;
1274                                         #size-cells = <0>;
1275
1276                                         reg = <1>;
1277
1278                                         vin4csi20: endpoint@0 {
1279                                                 reg = <0>;
1280                                                 remote-endpoint = <&csi20vin4>;
1281                                         };
1282                                         vin4csi40: endpoint@2 {
1283                                                 reg = <2>;
1284                                                 remote-endpoint = <&csi40vin4>;
1285                                         };
1286                                 };
1287                         };
1288                 };
1289
1290                 vin5: video@e6ef5000 {
1291                         compatible = "renesas,vin-r8a774a1";
1292                         reg = <0 0xe6ef5000 0 0x1000>;
1293                         interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1294                         clocks = <&cpg CPG_MOD 806>;
1295                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1296                         resets = <&cpg 806>;
1297                         renesas,id = <5>;
1298                         status = "disabled";
1299
1300                         ports {
1301                                 #address-cells = <1>;
1302                                 #size-cells = <0>;
1303
1304                                 port@1 {
1305                                         #address-cells = <1>;
1306                                         #size-cells = <0>;
1307
1308                                         reg = <1>;
1309
1310                                         vin5csi20: endpoint@0 {
1311                                                 reg = <0>;
1312                                                 remote-endpoint = <&csi20vin5>;
1313                                         };
1314                                         vin5csi40: endpoint@2 {
1315                                                 reg = <2>;
1316                                                 remote-endpoint = <&csi40vin5>;
1317                                         };
1318                                 };
1319                         };
1320                 };
1321
1322                 vin6: video@e6ef6000 {
1323                         compatible = "renesas,vin-r8a774a1";
1324                         reg = <0 0xe6ef6000 0 0x1000>;
1325                         interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1326                         clocks = <&cpg CPG_MOD 805>;
1327                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1328                         resets = <&cpg 805>;
1329                         renesas,id = <6>;
1330                         status = "disabled";
1331
1332                         ports {
1333                                 #address-cells = <1>;
1334                                 #size-cells = <0>;
1335
1336                                 port@1 {
1337                                         #address-cells = <1>;
1338                                         #size-cells = <0>;
1339
1340                                         reg = <1>;
1341
1342                                         vin6csi20: endpoint@0 {
1343                                                 reg = <0>;
1344                                                 remote-endpoint = <&csi20vin6>;
1345                                         };
1346                                         vin6csi40: endpoint@2 {
1347                                                 reg = <2>;
1348                                                 remote-endpoint = <&csi40vin6>;
1349                                         };
1350                                 };
1351                         };
1352                 };
1353
1354                 vin7: video@e6ef7000 {
1355                         compatible = "renesas,vin-r8a774a1";
1356                         reg = <0 0xe6ef7000 0 0x1000>;
1357                         interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1358                         clocks = <&cpg CPG_MOD 804>;
1359                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1360                         resets = <&cpg 804>;
1361                         renesas,id = <7>;
1362                         status = "disabled";
1363
1364                         ports {
1365                                 #address-cells = <1>;
1366                                 #size-cells = <0>;
1367
1368                                 port@1 {
1369                                         #address-cells = <1>;
1370                                         #size-cells = <0>;
1371
1372                                         reg = <1>;
1373
1374                                         vin7csi20: endpoint@0 {
1375                                                 reg = <0>;
1376                                                 remote-endpoint = <&csi20vin7>;
1377                                         };
1378                                         vin7csi40: endpoint@2 {
1379                                                 reg = <2>;
1380                                                 remote-endpoint = <&csi40vin7>;
1381                                         };
1382                                 };
1383                         };
1384                 };
1385
1386                 rcar_sound: sound@ec500000 {
1387                         /*
1388                          * #sound-dai-cells is required
1389                          *
1390                          * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1391                          * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1392                          */
1393                         /*
1394                          * #clock-cells is required for audio_clkout0/1/2/3
1395                          *
1396                          * clkout       : #clock-cells = <0>;   <&rcar_sound>;
1397                          * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
1398                          */
1399                         compatible =  "renesas,rcar_sound-r8a774a1", "renesas,rcar_sound-gen3";
1400                         reg =   <0 0xec500000 0 0x1000>, /* SCU */
1401                                 <0 0xec5a0000 0 0x100>,  /* ADG */
1402                                 <0 0xec540000 0 0x1000>, /* SSIU */
1403                                 <0 0xec541000 0 0x280>,  /* SSI */
1404                                 <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
1405                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1406
1407                         clocks = <&cpg CPG_MOD 1005>,
1408                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1409                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1410                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1411                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1412                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1413                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1414                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1415                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1416                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1417                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1418                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1419                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1420                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1421                                  <&audio_clk_a>, <&audio_clk_b>,
1422                                  <&audio_clk_c>,
1423                                  <&cpg CPG_CORE R8A774A1_CLK_S0D4>;
1424                         clock-names = "ssi-all",
1425                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1426                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1427                                       "ssi.1", "ssi.0",
1428                                       "src.9", "src.8", "src.7", "src.6",
1429                                       "src.5", "src.4", "src.3", "src.2",
1430                                       "src.1", "src.0",
1431                                       "mix.1", "mix.0",
1432                                       "ctu.1", "ctu.0",
1433                                       "dvc.0", "dvc.1",
1434                                       "clk_a", "clk_b", "clk_c", "clk_i";
1435                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1436                         resets = <&cpg 1005>,
1437                                  <&cpg 1006>, <&cpg 1007>,
1438                                  <&cpg 1008>, <&cpg 1009>,
1439                                  <&cpg 1010>, <&cpg 1011>,
1440                                  <&cpg 1012>, <&cpg 1013>,
1441                                  <&cpg 1014>, <&cpg 1015>;
1442                         reset-names = "ssi-all",
1443                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1444                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1445                                       "ssi.1", "ssi.0";
1446                         status = "disabled";
1447
1448                         rcar_sound,dvc {
1449                                 dvc0: dvc-0 {
1450                                         dmas = <&audma1 0xbc>;
1451                                         dma-names = "tx";
1452                                 };
1453                                 dvc1: dvc-1 {
1454                                         dmas = <&audma1 0xbe>;
1455                                         dma-names = "tx";
1456                                 };
1457                         };
1458
1459                         rcar_sound,mix {
1460                                 mix0: mix-0 { };
1461                                 mix1: mix-1 { };
1462                         };
1463
1464                         rcar_sound,ctu {
1465                                 ctu00: ctu-0 { };
1466                                 ctu01: ctu-1 { };
1467                                 ctu02: ctu-2 { };
1468                                 ctu03: ctu-3 { };
1469                                 ctu10: ctu-4 { };
1470                                 ctu11: ctu-5 { };
1471                                 ctu12: ctu-6 { };
1472                                 ctu13: ctu-7 { };
1473                         };
1474
1475                         rcar_sound,src {
1476                                 src0: src-0 {
1477                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1478                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
1479                                         dma-names = "rx", "tx";
1480                                 };
1481                                 src1: src-1 {
1482                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1483                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
1484                                         dma-names = "rx", "tx";
1485                                 };
1486                                 src2: src-2 {
1487                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1488                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
1489                                         dma-names = "rx", "tx";
1490                                 };
1491                                 src3: src-3 {
1492                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1493                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1494                                         dma-names = "rx", "tx";
1495                                 };
1496                                 src4: src-4 {
1497                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1498                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1499                                         dma-names = "rx", "tx";
1500                                 };
1501                                 src5: src-5 {
1502                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1503                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1504                                         dma-names = "rx", "tx";
1505                                 };
1506                                 src6: src-6 {
1507                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1508                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
1509                                         dma-names = "rx", "tx";
1510                                 };
1511                                 src7: src-7 {
1512                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1513                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
1514                                         dma-names = "rx", "tx";
1515                                 };
1516                                 src8: src-8 {
1517                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1518                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
1519                                         dma-names = "rx", "tx";
1520                                 };
1521                                 src9: src-9 {
1522                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1523                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
1524                                         dma-names = "rx", "tx";
1525                                 };
1526                         };
1527
1528                         rcar_sound,ssi {
1529                                 ssi0: ssi-0 {
1530                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1531                                         dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1532                                         dma-names = "rx", "tx", "rxu", "txu";
1533                                 };
1534                                 ssi1: ssi-1 {
1535                                         interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1536                                         dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1537                                         dma-names = "rx", "tx", "rxu", "txu";
1538                                 };
1539                                 ssi2: ssi-2 {
1540                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1541                                         dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1542                                         dma-names = "rx", "tx", "rxu", "txu";
1543                                 };
1544                                 ssi3: ssi-3 {
1545                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1546                                         dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1547                                         dma-names = "rx", "tx", "rxu", "txu";
1548                                 };
1549                                 ssi4: ssi-4 {
1550                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1551                                         dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1552                                         dma-names = "rx", "tx", "rxu", "txu";
1553                                 };
1554                                 ssi5: ssi-5 {
1555                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1556                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1557                                         dma-names = "rx", "tx", "rxu", "txu";
1558                                 };
1559                                 ssi6: ssi-6 {
1560                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1561                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1562                                         dma-names = "rx", "tx", "rxu", "txu";
1563                                 };
1564                                 ssi7: ssi-7 {
1565                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1566                                         dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1567                                         dma-names = "rx", "tx", "rxu", "txu";
1568                                 };
1569                                 ssi8: ssi-8 {
1570                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1571                                         dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1572                                         dma-names = "rx", "tx", "rxu", "txu";
1573                                 };
1574                                 ssi9: ssi-9 {
1575                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1576                                         dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1577                                         dma-names = "rx", "tx", "rxu", "txu";
1578                                 };
1579                         };
1580
1581                         ports {
1582                                 #address-cells = <1>;
1583                                 #size-cells = <0>;
1584                                 port@0 {
1585                                         reg = <0>;
1586                                 };
1587                                 port@1 {
1588                                         reg = <1>;
1589                                 };
1590                         };
1591                 };
1592
1593                 audma0: dma-controller@ec700000 {
1594                         compatible = "renesas,dmac-r8a774a1",
1595                                      "renesas,rcar-dmac";
1596                         reg = <0 0xec700000 0 0x10000>;
1597                         interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
1598                                       GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
1599                                       GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
1600                                       GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
1601                                       GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
1602                                       GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
1603                                       GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
1604                                       GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
1605                                       GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
1606                                       GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
1607                                       GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
1608                                       GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
1609                                       GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
1610                                       GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
1611                                       GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
1612                                       GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
1613                                       GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
1614                         interrupt-names = "error",
1615                                         "ch0", "ch1", "ch2", "ch3",
1616                                         "ch4", "ch5", "ch6", "ch7",
1617                                         "ch8", "ch9", "ch10", "ch11",
1618                                         "ch12", "ch13", "ch14", "ch15";
1619                         clocks = <&cpg CPG_MOD 502>;
1620                         clock-names = "fck";
1621                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1622                         resets = <&cpg 502>;
1623                         #dma-cells = <1>;
1624                         dma-channels = <16>;
1625                 };
1626
1627                 audma1: dma-controller@ec720000 {
1628                         compatible = "renesas,dmac-r8a774a1",
1629                                      "renesas,rcar-dmac";
1630                         reg = <0 0xec720000 0 0x10000>;
1631                         interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
1632                                       GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
1633                                       GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
1634                                       GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
1635                                       GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
1636                                       GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
1637                                       GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
1638                                       GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
1639                                       GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
1640                                       GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
1641                                       GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
1642                                       GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
1643                                       GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
1644                                       GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
1645                                       GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
1646                                       GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
1647                                       GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
1648                         interrupt-names = "error",
1649                                         "ch0", "ch1", "ch2", "ch3",
1650                                         "ch4", "ch5", "ch6", "ch7",
1651                                         "ch8", "ch9", "ch10", "ch11",
1652                                         "ch12", "ch13", "ch14", "ch15";
1653                         clocks = <&cpg CPG_MOD 501>;
1654                         clock-names = "fck";
1655                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1656                         resets = <&cpg 501>;
1657                         #dma-cells = <1>;
1658                         dma-channels = <16>;
1659                 };
1660
1661                 xhci0: usb@ee000000 {
1662                         compatible = "renesas,xhci-r8a774a1",
1663                                      "renesas,rcar-gen3-xhci";
1664                         reg = <0 0xee000000 0 0xc00>;
1665                         interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1666                         clocks = <&cpg CPG_MOD 328>;
1667                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1668                         resets = <&cpg 328>;
1669                         status = "disabled";
1670                 };
1671
1672                 usb3_peri0: usb@ee020000 {
1673                         compatible = "renesas,r8a774a1-usb3-peri",
1674                                      "renesas,rcar-gen3-usb3-peri";
1675                         reg = <0 0xee020000 0 0x400>;
1676                         interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
1677                         clocks = <&cpg CPG_MOD 328>;
1678                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1679                         resets = <&cpg 328>;
1680                         status = "disabled";
1681                 };
1682
1683                 ohci0: usb@ee080000 {
1684                         compatible = "generic-ohci";
1685                         reg = <0 0xee080000 0 0x100>;
1686                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1687                         clocks = <&cpg CPG_MOD 703>;
1688                         phys = <&usb2_phy0>;
1689                         phy-names = "usb";
1690                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1691                         resets = <&cpg 703>;
1692                         status = "disabled";
1693                 };
1694
1695                 ohci1: usb@ee0a0000 {
1696                         compatible = "generic-ohci";
1697                         reg = <0 0xee0a0000 0 0x100>;
1698                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1699                         clocks = <&cpg CPG_MOD 702>;
1700                         phys = <&usb2_phy1>;
1701                         phy-names = "usb";
1702                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1703                         resets = <&cpg 702>;
1704                         status = "disabled";
1705                 };
1706
1707                 ehci0: usb@ee080100 {
1708                         compatible = "generic-ehci";
1709                         reg = <0 0xee080100 0 0x100>;
1710                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1711                         clocks = <&cpg CPG_MOD 703>;
1712                         phys = <&usb2_phy0>;
1713                         phy-names = "usb";
1714                         companion = <&ohci0>;
1715                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1716                         resets = <&cpg 703>;
1717                         status = "disabled";
1718                 };
1719
1720                 ehci1: usb@ee0a0100 {
1721                         compatible = "generic-ehci";
1722                         reg = <0 0xee0a0100 0 0x100>;
1723                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1724                         clocks = <&cpg CPG_MOD 702>;
1725                         phys = <&usb2_phy1>;
1726                         phy-names = "usb";
1727                         companion = <&ohci1>;
1728                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1729                         resets = <&cpg 702>;
1730                         status = "disabled";
1731                 };
1732
1733                 usb2_phy0: usb-phy@ee080200 {
1734                         compatible = "renesas,usb2-phy-r8a774a1",
1735                                      "renesas,rcar-gen3-usb2-phy";
1736                         reg = <0 0xee080200 0 0x700>;
1737                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1738                         clocks = <&cpg CPG_MOD 703>;
1739                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1740                         resets = <&cpg 703>;
1741                         #phy-cells = <0>;
1742                         status = "disabled";
1743                 };
1744
1745                 usb2_phy1: usb-phy@ee0a0200 {
1746                         compatible = "renesas,usb2-phy-r8a774a1",
1747                                      "renesas,rcar-gen3-usb2-phy";
1748                         reg = <0 0xee0a0200 0 0x700>;
1749                         clocks = <&cpg CPG_MOD 702>;
1750                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1751                         resets = <&cpg 702>;
1752                         #phy-cells = <0>;
1753                         status = "disabled";
1754                 };
1755
1756                 sdhi0: sd@ee100000 {
1757                         compatible = "renesas,sdhi-r8a774a1",
1758                                      "renesas,rcar-gen3-sdhi";
1759                         reg = <0 0xee100000 0 0x2000>;
1760                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1761                         clocks = <&cpg CPG_MOD 314>;
1762                         max-frequency = <200000000>;
1763                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1764                         resets = <&cpg 314>;
1765                         status = "disabled";
1766                 };
1767
1768                 sdhi1: sd@ee120000 {
1769                         compatible = "renesas,sdhi-r8a774a1",
1770                                      "renesas,rcar-gen3-sdhi";
1771                         reg = <0 0xee120000 0 0x2000>;
1772                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1773                         clocks = <&cpg CPG_MOD 313>;
1774                         max-frequency = <200000000>;
1775                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1776                         resets = <&cpg 313>;
1777                         status = "disabled";
1778                 };
1779
1780                 sdhi2: sd@ee140000 {
1781                         compatible = "renesas,sdhi-r8a774a1",
1782                                      "renesas,rcar-gen3-sdhi";
1783                         reg = <0 0xee140000 0 0x2000>;
1784                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1785                         clocks = <&cpg CPG_MOD 312>;
1786                         max-frequency = <200000000>;
1787                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1788                         resets = <&cpg 312>;
1789                         status = "disabled";
1790                 };
1791
1792                 sdhi3: sd@ee160000 {
1793                         compatible = "renesas,sdhi-r8a774a1",
1794                                      "renesas,rcar-gen3-sdhi";
1795                         reg = <0 0xee160000 0 0x2000>;
1796                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1797                         clocks = <&cpg CPG_MOD 311>;
1798                         max-frequency = <200000000>;
1799                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1800                         resets = <&cpg 311>;
1801                         status = "disabled";
1802                 };
1803
1804                 gic: interrupt-controller@f1010000 {
1805                         compatible = "arm,gic-400";
1806                         #interrupt-cells = <3>;
1807                         #address-cells = <0>;
1808                         interrupt-controller;
1809                         reg = <0x0 0xf1010000 0 0x1000>,
1810                               <0x0 0xf1020000 0 0x20000>,
1811                               <0x0 0xf1040000 0 0x20000>,
1812                               <0x0 0xf1060000 0 0x20000>;
1813                         interrupts = <GIC_PPI 9
1814                                         (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
1815                         clocks = <&cpg CPG_MOD 408>;
1816                         clock-names = "clk";
1817                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1818                         resets = <&cpg 408>;
1819                 };
1820
1821                 fcpf0: fcp@fe950000 {
1822                         compatible = "renesas,fcpf";
1823                         reg = <0 0xfe950000 0 0x200>;
1824                         clocks = <&cpg CPG_MOD 615>;
1825                         power-domains = <&sysc R8A774A1_PD_A3VC>;
1826                         resets = <&cpg 615>;
1827                 };
1828
1829                 fcpvb0: fcp@fe96f000 {
1830                         compatible = "renesas,fcpv";
1831                         reg = <0 0xfe96f000 0 0x200>;
1832                         clocks = <&cpg CPG_MOD 607>;
1833                         power-domains = <&sysc R8A774A1_PD_A3VC>;
1834                         resets = <&cpg 607>;
1835                 };
1836
1837                 fcpvd0: fcp@fea27000 {
1838                         compatible = "renesas,fcpv";
1839                         reg = <0 0xfea27000 0 0x200>;
1840                         clocks = <&cpg CPG_MOD 603>;
1841                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1842                         resets = <&cpg 603>;
1843                         iommus = <&ipmmu_vi0 8>;
1844                 };
1845
1846                 fcpvd1: fcp@fea2f000 {
1847                         compatible = "renesas,fcpv";
1848                         reg = <0 0xfea2f000 0 0x200>;
1849                         clocks = <&cpg CPG_MOD 602>;
1850                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1851                         resets = <&cpg 602>;
1852                         iommus = <&ipmmu_vi0 9>;
1853                 };
1854
1855                 fcpvd2: fcp@fea37000 {
1856                         compatible = "renesas,fcpv";
1857                         reg = <0 0xfea37000 0 0x200>;
1858                         clocks = <&cpg CPG_MOD 601>;
1859                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1860                         resets = <&cpg 601>;
1861                         iommus = <&ipmmu_vi0 10>;
1862                 };
1863
1864                 fcpvi0: fcp@fe9af000 {
1865                         compatible = "renesas,fcpv";
1866                         reg = <0 0xfe9af000 0 0x200>;
1867                         clocks = <&cpg CPG_MOD 611>;
1868                         power-domains = <&sysc R8A774A1_PD_A3VC>;
1869                         resets = <&cpg 611>;
1870                         iommus = <&ipmmu_vc0 19>;
1871                 };
1872
1873                 csi20: csi2@fea80000 {
1874                         compatible = "renesas,r8a774a1-csi2";
1875                         reg = <0 0xfea80000 0 0x10000>;
1876                         interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
1877                         clocks = <&cpg CPG_MOD 714>;
1878                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1879                         resets = <&cpg 714>;
1880                         status = "disabled";
1881
1882                         ports {
1883                                 #address-cells = <1>;
1884                                 #size-cells = <0>;
1885
1886                                 port@1 {
1887                                         #address-cells = <1>;
1888                                         #size-cells = <0>;
1889
1890                                         reg = <1>;
1891
1892                                         csi20vin0: endpoint@0 {
1893                                                 reg = <0>;
1894                                                 remote-endpoint = <&vin0csi20>;
1895                                         };
1896                                         csi20vin1: endpoint@1 {
1897                                                 reg = <1>;
1898                                                 remote-endpoint = <&vin1csi20>;
1899                                         };
1900                                         csi20vin2: endpoint@2 {
1901                                                 reg = <2>;
1902                                                 remote-endpoint = <&vin2csi20>;
1903                                         };
1904                                         csi20vin3: endpoint@3 {
1905                                                 reg = <3>;
1906                                                 remote-endpoint = <&vin3csi20>;
1907                                         };
1908                                         csi20vin4: endpoint@4 {
1909                                                 reg = <4>;
1910                                                 remote-endpoint = <&vin4csi20>;
1911                                         };
1912                                         csi20vin5: endpoint@5 {
1913                                                 reg = <5>;
1914                                                 remote-endpoint = <&vin5csi20>;
1915                                         };
1916                                         csi20vin6: endpoint@6 {
1917                                                 reg = <6>;
1918                                                 remote-endpoint = <&vin6csi20>;
1919                                         };
1920                                         csi20vin7: endpoint@7 {
1921                                                 reg = <7>;
1922                                                 remote-endpoint = <&vin7csi20>;
1923                                         };
1924                                 };
1925                         };
1926                 };
1927
1928                 csi40: csi2@feaa0000 {
1929                         compatible = "renesas,r8a774a1-csi2";
1930                         reg = <0 0xfeaa0000 0 0x10000>;
1931                         interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1932                         clocks = <&cpg CPG_MOD 716>;
1933                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1934                         resets = <&cpg 716>;
1935                         status = "disabled";
1936
1937                         ports {
1938                                 #address-cells = <1>;
1939                                 #size-cells = <0>;
1940
1941                                 port@1 {
1942                                         #address-cells = <1>;
1943                                         #size-cells = <0>;
1944
1945                                         reg = <1>;
1946
1947                                         csi40vin0: endpoint@0 {
1948                                                 reg = <0>;
1949                                                 remote-endpoint = <&vin0csi40>;
1950                                         };
1951                                         csi40vin1: endpoint@1 {
1952                                                 reg = <1>;
1953                                                 remote-endpoint = <&vin1csi40>;
1954                                         };
1955                                         csi40vin2: endpoint@2 {
1956                                                 reg = <2>;
1957                                                 remote-endpoint = <&vin2csi40>;
1958                                         };
1959                                         csi40vin3: endpoint@3 {
1960                                                 reg = <3>;
1961                                                 remote-endpoint = <&vin3csi40>;
1962                                         };
1963                                         csi40vin4: endpoint@4 {
1964                                                 reg = <4>;
1965                                                 remote-endpoint = <&vin4csi40>;
1966                                         };
1967                                         csi40vin5: endpoint@5 {
1968                                                 reg = <5>;
1969                                                 remote-endpoint = <&vin5csi40>;
1970                                         };
1971                                         csi40vin6: endpoint@6 {
1972                                                 reg = <6>;
1973                                                 remote-endpoint = <&vin6csi40>;
1974                                         };
1975                                         csi40vin7: endpoint@7 {
1976                                                 reg = <7>;
1977                                                 remote-endpoint = <&vin7csi40>;
1978                                         };
1979                                 };
1980
1981                         };
1982                 };
1983
1984                 prr: chipid@fff00044 {
1985                         compatible = "renesas,prr";
1986                         reg = <0 0xfff00044 0 4>;
1987                 };
1988         };
1989
1990         thermal-zones {
1991                 sensor_thermal1: sensor-thermal1 {
1992                         polling-delay-passive = <250>;
1993                         polling-delay = <1000>;
1994                         thermal-sensors = <&tsc 0>;
1995
1996                         trips {
1997                                 sensor1_crit: sensor1-crit {
1998                                         temperature = <120000>;
1999                                         hysteresis = <1000>;
2000                                         type = "critical";
2001                                 };
2002                         };
2003                 };
2004
2005                 sensor_thermal2: sensor-thermal2 {
2006                         polling-delay-passive = <250>;
2007                         polling-delay = <1000>;
2008                         thermal-sensors = <&tsc 1>;
2009
2010                         trips {
2011                                 sensor2_crit: sensor2-crit {
2012                                         temperature = <120000>;
2013                                         hysteresis = <1000>;
2014                                         type = "critical";
2015                                 };
2016                         };
2017
2018                 };
2019
2020                 sensor_thermal3: sensor-thermal3 {
2021                         polling-delay-passive = <250>;
2022                         polling-delay = <1000>;
2023                         thermal-sensors = <&tsc 2>;
2024
2025                         trips {
2026                                 sensor3_crit: sensor3-crit {
2027                                         temperature = <120000>;
2028                                         hysteresis = <1000>;
2029                                         type = "critical";
2030                                 };
2031                         };
2032                 };
2033         };
2034
2035         timer {
2036                 compatible = "arm,armv8-timer";
2037                 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
2038                                       <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
2039                                       <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
2040                                       <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
2041         };
2042
2043         /* External USB clocks - can be overridden by the board */
2044         usb3s0_clk: usb3s0 {
2045                 compatible = "fixed-clock";
2046                 #clock-cells = <0>;
2047                 clock-frequency = <0>;
2048         };
2049
2050         usb_extal_clk: usb_extal {
2051                 compatible = "fixed-clock";
2052                 #clock-cells = <0>;
2053                 clock-frequency = <0>;
2054         };
2055 };