Merge remote-tracking branches 'spi/fix/dw', 'spi/fix/lantiq' and 'spi/fix/pl022...
[sfrench/cifs-2.6.git] / arch / arm64 / boot / dts / nvidia / tegra210-smaug.dts
1 /dts-v1/;
2
3 #include <dt-bindings/input/input.h>
4 #include <dt-bindings/mfd/max77620.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6
7 #include "tegra210.dtsi"
8
9 / {
10         model = "Google Pixel C";
11         compatible = "google,smaug-rev8", "google,smaug-rev7",
12                      "google,smaug-rev6", "google,smaug-rev5",
13                      "google,smaug-rev4", "google,smaug-rev3",
14                      "google,smaug-rev2", "google,smaug-rev1",
15                      "google,smaug", "nvidia,tegra210";
16
17         aliases {
18                 serial0 = &uarta;
19         };
20
21         chosen {
22                 bootargs = "earlycon";
23                 stdout-path = "serial0:115200n8";
24         };
25
26         memory {
27                 device_type = "memory";
28                 reg = <0x0 0x80000000 0x0 0xc0000000>;
29         };
30
31         host1x@50000000 {
32                 dpaux: dpaux@545c0000 {
33                         status = "okay";
34                 };
35         };
36
37         pinmux: pinmux@700008d4 {
38                 pinctrl-names = "boot";
39                 pinctrl-0 = <&state_boot>;
40
41                 state_boot: pinmux {
42                         pex_l0_rst_n_pa0 {
43                                 nvidia,pins = "pex_l0_rst_n_pa0";
44                                 nvidia,function = "rsvd1";
45                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
46                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
47                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
48                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
49                                 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
50                         };
51                         pex_l0_clkreq_n_pa1 {
52                                 nvidia,pins = "pex_l0_clkreq_n_pa1";
53                                 nvidia,function = "rsvd1";
54                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
55                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
56                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
57                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
58                                 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
59                         };
60                         pex_wake_n_pa2 {
61                                 nvidia,pins = "pex_wake_n_pa2";
62                                 nvidia,function = "rsvd1";
63                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
64                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
65                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
66                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
67                                 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
68                         };
69                         pex_l1_rst_n_pa3 {
70                                 nvidia,pins = "pex_l1_rst_n_pa3";
71                                 nvidia,function = "rsvd1";
72                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
73                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
74                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
75                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
76                                 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
77                         };
78                         pex_l1_clkreq_n_pa4 {
79                                 nvidia,pins = "pex_l1_clkreq_n_pa4";
80                                 nvidia,function = "rsvd1";
81                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
82                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
83                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
84                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
85                                 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
86                         };
87                         sata_led_active_pa5 {
88                                 nvidia,pins = "sata_led_active_pa5";
89                                 nvidia,function = "rsvd1";
90                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
91                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
92                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
93                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
94                         };
95                         pa6 {
96                                 nvidia,pins = "pa6";
97                                 nvidia,function = "rsvd1";
98                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
99                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
100                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
101                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
102                         };
103                         dap1_fs_pb0 {
104                                 nvidia,pins = "dap1_fs_pb0";
105                                 nvidia,function = "i2s1";
106                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
107                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
108                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
109                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
110                         };
111                         dap1_din_pb1 {
112                                 nvidia,pins = "dap1_din_pb1";
113                                 nvidia,function = "i2s1";
114                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
115                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
116                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
117                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
118                         };
119                         dap1_dout_pb2 {
120                                 nvidia,pins = "dap1_dout_pb2";
121                                 nvidia,function = "i2s1";
122                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
123                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
124                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
125                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
126                         };
127                         dap1_sclk_pb3 {
128                                 nvidia,pins = "dap1_sclk_pb3";
129                                 nvidia,function = "i2s1";
130                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
131                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
132                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
133                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
134                         };
135                         spi2_mosi_pb4 {
136                                 nvidia,pins = "spi2_mosi_pb4";
137                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
138                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
139                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
140                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
141                         };
142                         spi2_miso_pb5 {
143                                 nvidia,pins = "spi2_miso_pb5";
144                                 nvidia,function = "rsvd2";
145                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
146                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
147                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
148                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
149                         };
150                         spi2_sck_pb6 {
151                                 nvidia,pins = "spi2_sck_pb6";
152                                 nvidia,function = "rsvd2";
153                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
154                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
155                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
156                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
157                         };
158                         spi2_cs0_pb7 {
159                                 nvidia,pins = "spi2_cs0_pb7";
160                                 nvidia,function = "rsvd2";
161                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
162                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
163                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
164                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
165                         };
166                         spi1_mosi_pc0 {
167                                 nvidia,pins = "spi1_mosi_pc0";
168                                 nvidia,function = "spi1";
169                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
170                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
171                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
172                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
173                         };
174                         spi1_miso_pc1 {
175                                 nvidia,pins = "spi1_miso_pc1";
176                                 nvidia,function = "spi1";
177                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
178                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
179                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
180                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
181                         };
182                         spi1_sck_pc2 {
183                                 nvidia,pins = "spi1_sck_pc2";
184                                 nvidia,function = "spi1";
185                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
186                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
187                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
188                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
189                         };
190                         spi1_cs0_pc3 {
191                                 nvidia,pins = "spi1_cs0_pc3";
192                                 nvidia,function = "spi1";
193                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
194                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
195                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
196                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
197                         };
198                         spi1_cs1_pc4 {
199                                 nvidia,pins = "spi1_cs1_pc4";
200                                 nvidia,function = "rsvd1";
201                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
202                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
203                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
204                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
205                         };
206                         spi4_sck_pc5 {
207                                 nvidia,pins = "spi4_sck_pc5";
208                                 nvidia,function = "rsvd1";
209                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
210                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
211                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
212                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
213                         };
214                         spi4_cs0_pc6 {
215                                 nvidia,pins = "spi4_cs0_pc6";
216                                 nvidia,function = "rsvd1";
217                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
218                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
219                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
220                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
221                         };
222                         spi4_mosi_pc7 {
223                                 nvidia,pins = "spi4_mosi_pc7";
224                                 nvidia,function = "rsvd1";
225                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
226                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
227                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
228                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
229                         };
230                         spi4_miso_pd0 {
231                                 nvidia,pins = "spi4_miso_pd0";
232                                 nvidia,function = "rsvd1";
233                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
234                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
235                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
236                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
237                         };
238                         uart3_tx_pd1 {
239                                 nvidia,pins = "uart3_tx_pd1";
240                                 nvidia,function = "uartc";
241                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
242                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
243                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
244                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
245                         };
246                         uart3_rx_pd2 {
247                                 nvidia,pins = "uart3_rx_pd2";
248                                 nvidia,function = "uartc";
249                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
250                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
251                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
252                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
253                         };
254                         uart3_rts_pd3 {
255                                 nvidia,pins = "uart3_rts_pd3";
256                                 nvidia,function = "uartc";
257                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
258                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
259                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
260                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
261                         };
262                         uart3_cts_pd4 {
263                                 nvidia,pins = "uart3_cts_pd4";
264                                 nvidia,function = "uartc";
265                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
266                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
267                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
268                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
269                         };
270                         dmic1_clk_pe0 {
271                                 nvidia,pins = "dmic1_clk_pe0";
272                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
273                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
274                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
275                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
276                         };
277                         dmic1_dat_pe1 {
278                                 nvidia,pins = "dmic1_dat_pe1";
279                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
280                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
281                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
282                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
283                         };
284                         dmic2_clk_pe2 {
285                                 nvidia,pins = "dmic2_clk_pe2";
286                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
287                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
288                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
289                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
290                         };
291                         dmic2_dat_pe3 {
292                                 nvidia,pins = "dmic2_dat_pe3";
293                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
294                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
295                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
296                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
297                         };
298                         dmic3_clk_pe4 {
299                                 nvidia,pins = "dmic3_clk_pe4";
300                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
301                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
302                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
303                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
304                         };
305                         dmic3_dat_pe5 {
306                                 nvidia,pins = "dmic3_dat_pe5";
307                                 nvidia,function = "rsvd2";
308                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
309                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
310                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
311                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
312                         };
313                         pe6 {
314                                 nvidia,pins = "pe6";
315                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
316                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
317                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
318                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
319                         };
320                         pe7 {
321                                 nvidia,pins = "pe7";
322                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
323                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
324                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
325                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
326                         };
327                         gen3_i2c_scl_pf0 {
328                                 nvidia,pins = "gen3_i2c_scl_pf0";
329                                 nvidia,function = "i2c3";
330                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
331                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
332                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
333                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
334                                 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
335                         };
336                         gen3_i2c_sda_pf1 {
337                                 nvidia,pins = "gen3_i2c_sda_pf1";
338                                 nvidia,function = "i2c3";
339                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
340                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
341                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
342                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
343                                 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
344                         };
345                         uart2_tx_pg0 {
346                                 nvidia,pins = "uart2_tx_pg0";
347                                 nvidia,function = "uartb";
348                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
349                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
350                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
351                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
352                         };
353                         uart2_rx_pg1 {
354                                 nvidia,pins = "uart2_rx_pg1";
355                                 nvidia,function = "uartb";
356                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
357                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
358                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
359                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
360                         };
361                         uart2_rts_pg2 {
362                                 nvidia,pins = "uart2_rts_pg2";
363                                 nvidia,function = "rsvd2";
364                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
365                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
366                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
367                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
368                         };
369                         uart2_cts_pg3 {
370                                 nvidia,pins = "uart2_cts_pg3";
371                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
372                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
373                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
374                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
375                         };
376                         wifi_en_ph0 {
377                                 nvidia,pins = "wifi_en_ph0";
378                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
379                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
380                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
381                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
382                         };
383                         wifi_rst_ph1 {
384                                 nvidia,pins = "wifi_rst_ph1";
385                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
386                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
387                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
388                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
389                         };
390                         wifi_wake_ap_ph2 {
391                                 nvidia,pins = "wifi_wake_ap_ph2";
392                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
393                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
394                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
395                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
396                         };
397                         ap_wake_bt_ph3 {
398                                 nvidia,pins = "ap_wake_bt_ph3";
399                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
400                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
401                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
402                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
403                         };
404                         bt_rst_ph4 {
405                                 nvidia,pins = "bt_rst_ph4";
406                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
407                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
408                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
409                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
410                         };
411                         bt_wake_ap_ph5 {
412                                 nvidia,pins = "bt_wake_ap_ph5";
413                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
414                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
415                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
416                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
417                         };
418                         ph6 {
419                                 nvidia,pins = "ph6";
420                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
421                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
422                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
423                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
424                         };
425                         ap_wake_nfc_ph7 {
426                                 nvidia,pins = "ap_wake_nfc_ph7";
427                                 nvidia,function = "rsvd0";
428                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
429                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
430                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
431                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
432                         };
433                         nfc_en_pi0 {
434                                 nvidia,pins = "nfc_en_pi0";
435                                 nvidia,function = "rsvd0";
436                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
437                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
438                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
439                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
440                         };
441                         nfc_int_pi1 {
442                                 nvidia,pins = "nfc_int_pi1";
443                                 nvidia,function = "rsvd0";
444                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
445                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
446                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
447                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
448                         };
449                         gps_en_pi2 {
450                                 nvidia,pins = "gps_en_pi2";
451                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
452                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
453                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
454                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
455                         };
456                         gps_rst_pi3 {
457                                 nvidia,pins = "gps_rst_pi3";
458                                 nvidia,function = "rsvd0";
459                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
460                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
461                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
462                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
463                         };
464                         uart4_tx_pi4 {
465                                 nvidia,pins = "uart4_tx_pi4";
466                                 nvidia,function = "uartd";
467                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
468                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
469                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
470                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
471                         };
472                         uart4_rx_pi5 {
473                                 nvidia,pins = "uart4_rx_pi5";
474                                 nvidia,function = "uartd";
475                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
476                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
477                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
478                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
479                         };
480                         uart4_rts_pi6 {
481                                 nvidia,pins = "uart4_rts_pi6";
482                                 nvidia,function = "uartd";
483                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
484                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
485                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
486                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
487                         };
488                         uart4_cts_pi7 {
489                                 nvidia,pins = "uart4_cts_pi7";
490                                 nvidia,function = "uartd";
491                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
492                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
493                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
494                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
495                         };
496                         gen1_i2c_sda_pj0 {
497                                 nvidia,pins = "gen1_i2c_sda_pj0";
498                                 nvidia,function = "i2c1";
499                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
500                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
501                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
502                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
503                                 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
504                         };
505                         gen1_i2c_scl_pj1 {
506                                 nvidia,pins = "gen1_i2c_scl_pj1";
507                                 nvidia,function = "i2c1";
508                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
509                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
510                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
511                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
512                                 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
513                         };
514                         gen2_i2c_scl_pj2 {
515                                 nvidia,pins = "gen2_i2c_scl_pj2";
516                                 nvidia,function = "i2c2";
517                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
518                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
519                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
520                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
521                                 nvidia,io-hv = <TEGRA_PIN_ENABLE>;
522                         };
523                         gen2_i2c_sda_pj3 {
524                                 nvidia,pins = "gen2_i2c_sda_pj3";
525                                 nvidia,function = "i2c2";
526                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
527                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
528                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
529                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
530                                 nvidia,io-hv = <TEGRA_PIN_ENABLE>;
531                         };
532                         dap4_fs_pj4 {
533                                 nvidia,pins = "dap4_fs_pj4";
534                                 nvidia,function = "rsvd1";
535                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
536                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
537                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
538                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
539                         };
540                         dap4_din_pj5 {
541                                 nvidia,pins = "dap4_din_pj5";
542                                 nvidia,function = "rsvd1";
543                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
544                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
545                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
546                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
547                         };
548                         dap4_dout_pj6 {
549                                 nvidia,pins = "dap4_dout_pj6";
550                                 nvidia,function = "rsvd1";
551                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
552                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
553                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
554                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
555                         };
556                         dap4_sclk_pj7 {
557                                 nvidia,pins = "dap4_sclk_pj7";
558                                 nvidia,function = "rsvd1";
559                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
560                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
561                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
562                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
563                         };
564                         pk0 {
565                                 nvidia,pins = "pk0";
566                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
567                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
568                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
569                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
570                         };
571                         pk1 {
572                                 nvidia,pins = "pk1";
573                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
574                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
575                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
576                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
577                         };
578                         pk2 {
579                                 nvidia,pins = "pk2";
580                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
581                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
582                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
583                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
584                         };
585                         pk3 {
586                                 nvidia,pins = "pk3";
587                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
588                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
589                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
590                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
591                         };
592                         pk4 {
593                                 nvidia,pins = "pk4";
594                                 nvidia,function = "rsvd1";
595                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
596                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
597                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
598                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
599                         };
600                         pk5 {
601                                 nvidia,pins = "pk5";
602                                 nvidia,function = "rsvd1";
603                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
604                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
605                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
606                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
607                         };
608                         pk6 {
609                                 nvidia,pins = "pk6";
610                                 nvidia,function = "rsvd1";
611                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
612                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
613                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
614                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
615                         };
616                         pk7 {
617                                 nvidia,pins = "pk7";
618                                 nvidia,function = "rsvd1";
619                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
620                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
621                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
622                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
623                         };
624                         pl0 {
625                                 nvidia,pins = "pl0";
626                                 nvidia,function = "rsvd0";
627                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
628                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
629                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
630                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
631                         };
632                         pl1 {
633                                 nvidia,pins = "pl1";
634                                 nvidia,function = "rsvd1";
635                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
636                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
637                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
638                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
639                         };
640                         sdmmc1_clk_pm0 {
641                                 nvidia,pins = "sdmmc1_clk_pm0";
642                                 nvidia,function = "rsvd1";
643                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
644                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
645                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
646                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
647                         };
648                         sdmmc1_cmd_pm1 {
649                                 nvidia,pins = "sdmmc1_cmd_pm1";
650                                 nvidia,function = "rsvd2";
651                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
652                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
653                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
654                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
655                         };
656                         sdmmc1_dat3_pm2 {
657                                 nvidia,pins = "sdmmc1_dat3_pm2";
658                                 nvidia,function = "rsvd2";
659                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
660                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
661                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
662                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
663                         };
664                         sdmmc1_dat2_pm3 {
665                                 nvidia,pins = "sdmmc1_dat2_pm3";
666                                 nvidia,function = "rsvd2";
667                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
668                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
669                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
670                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
671                         };
672                         sdmmc1_dat1_pm4 {
673                                 nvidia,pins = "sdmmc1_dat1_pm4";
674                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
675                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
676                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
677                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
678                         };
679                         sdmmc1_dat0_pm5 {
680                                 nvidia,pins = "sdmmc1_dat0_pm5";
681                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
682                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
683                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
684                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
685                         };
686                         sdmmc3_clk_pp0 {
687                                 nvidia,pins = "sdmmc3_clk_pp0";
688                                 nvidia,function = "rsvd1";
689                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
690                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
691                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
692                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
693                         };
694                         sdmmc3_cmd_pp1 {
695                                 nvidia,pins = "sdmmc3_cmd_pp1";
696                                 nvidia,function = "rsvd1";
697                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
698                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
699                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
700                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
701                         };
702                         sdmmc3_dat3_pp2 {
703                                 nvidia,pins = "sdmmc3_dat3_pp2";
704                                 nvidia,function = "rsvd1";
705                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
706                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
707                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
708                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
709                         };
710                         sdmmc3_dat2_pp3 {
711                                 nvidia,pins = "sdmmc3_dat2_pp3";
712                                 nvidia,function = "rsvd1";
713                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
714                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
715                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
716                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
717                         };
718                         sdmmc3_dat1_pp4 {
719                                 nvidia,pins = "sdmmc3_dat1_pp4";
720                                 nvidia,function = "rsvd1";
721                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
722                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
723                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
724                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
725                         };
726                         sdmmc3_dat0_pp5 {
727                                 nvidia,pins = "sdmmc3_dat0_pp5";
728                                 nvidia,function = "rsvd1";
729                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
730                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
731                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
732                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
733                         };
734                         cam1_mclk_ps0 {
735                                 nvidia,pins = "cam1_mclk_ps0";
736                                 nvidia,function = "extperiph3";
737                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
738                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
739                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
740                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
741                         };
742                         cam2_mclk_ps1 {
743                                 nvidia,pins = "cam2_mclk_ps1";
744                                 nvidia,function = "extperiph3";
745                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
746                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
747                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
748                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
749                         };
750                         cam_i2c_scl_ps2 {
751                                 nvidia,pins = "cam_i2c_scl_ps2";
752                                 nvidia,function = "i2cvi";
753                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
754                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
755                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
756                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
757                                 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
758                         };
759                         cam_i2c_sda_ps3 {
760                                 nvidia,pins = "cam_i2c_sda_ps3";
761                                 nvidia,function = "i2cvi";
762                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
763                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
764                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
765                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
766                                 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
767                         };
768                         cam_rst_ps4 {
769                                 nvidia,pins = "cam_rst_ps4";
770                                 nvidia,function = "rsvd1";
771                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
772                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
773                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
774                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
775                         };
776                         cam_af_en_ps5 {
777                                 nvidia,pins = "cam_af_en_ps5";
778                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
779                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
780                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
781                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
782                         };
783                         cam_flash_en_ps6 {
784                                 nvidia,pins = "cam_flash_en_ps6";
785                                 nvidia,function = "rsvd2";
786                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
787                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
788                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
789                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
790                         };
791                         cam1_pwdn_ps7 {
792                                 nvidia,pins = "cam1_pwdn_ps7";
793                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
794                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
795                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
796                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
797                         };
798                         cam2_pwdn_pt0 {
799                                 nvidia,pins = "cam2_pwdn_pt0";
800                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
801                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
802                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
803                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
804                         };
805                         cam1_strobe_pt1 {
806                                 nvidia,pins = "cam1_strobe_pt1";
807                                 nvidia,function = "rsvd1";
808                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
809                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
810                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
811                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
812                         };
813                         uart1_tx_pu0 {
814                                 nvidia,pins = "uart1_tx_pu0";
815                                 nvidia,function = "uarta";
816                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
817                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
818                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
819                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
820                         };
821                         uart1_rx_pu1 {
822                                 nvidia,pins = "uart1_rx_pu1";
823                                 nvidia,function = "uarta";
824                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
825                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
826                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
827                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
828                         };
829                         uart1_rts_pu2 {
830                                 nvidia,pins = "uart1_rts_pu2";
831                                 nvidia,function = "rsvd1";
832                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
833                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
834                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
835                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
836                         };
837                         uart1_cts_pu3 {
838                                 nvidia,pins = "uart1_cts_pu3";
839                                 nvidia,function = "rsvd1";
840                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
841                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
842                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
843                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
844                         };
845                         lcd_bl_pwm_pv0 {
846                                 nvidia,pins = "lcd_bl_pwm_pv0";
847                                 nvidia,function = "rsvd3";
848                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
849                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
850                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
851                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
852                         };
853                         lcd_bl_en_pv1 {
854                                 nvidia,pins = "lcd_bl_en_pv1";
855                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
856                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
857                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
858                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
859                         };
860                         lcd_rst_pv2 {
861                                 nvidia,pins = "lcd_rst_pv2";
862                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
863                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
864                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
865                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
866                         };
867                         lcd_gpio1_pv3 {
868                                 nvidia,pins = "lcd_gpio1_pv3";
869                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
870                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
871                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
872                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
873                         };
874                         lcd_gpio2_pv4 {
875                                 nvidia,pins = "lcd_gpio2_pv4";
876                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
877                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
878                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
879                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
880                         };
881                         ap_ready_pv5 {
882                                 nvidia,pins = "ap_ready_pv5";
883                                 nvidia,function = "rsvd0";
884                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
885                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
886                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
887                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
888                         };
889                         touch_rst_pv6 {
890                                 nvidia,pins = "touch_rst_pv6";
891                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
892                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
893                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
894                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
895                         };
896                         touch_clk_pv7 {
897                                 nvidia,pins = "touch_clk_pv7";
898                                 nvidia,function = "touch";
899                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
900                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
901                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
902                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
903                         };
904                         modem_wake_ap_px0 {
905                                 nvidia,pins = "modem_wake_ap_px0";
906                                 nvidia,function = "rsvd0";
907                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
908                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
909                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
910                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
911                         };
912                         touch_int_px1 {
913                                 nvidia,pins = "touch_int_px1";
914                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
915                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
916                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
917                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
918                         };
919                         motion_int_px2 {
920                                 nvidia,pins = "motion_int_px2";
921                                 nvidia,function = "rsvd0";
922                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
923                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
924                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
925                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
926                         };
927                         als_prox_int_px3 {
928                                 nvidia,pins = "als_prox_int_px3";
929                                 nvidia,function = "rsvd0";
930                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
931                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
932                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
933                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
934                         };
935                         temp_alert_px4 {
936                                 nvidia,pins = "temp_alert_px4";
937                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
938                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
939                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
940                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
941                         };
942                         button_power_on_px5 {
943                                 nvidia,pins = "button_power_on_px5";
944                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
945                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
946                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
947                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
948                         };
949                         button_vol_up_px6 {
950                                 nvidia,pins = "button_vol_up_px6";
951                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
952                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
953                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
954                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
955                         };
956                         button_vol_down_px7 {
957                                 nvidia,pins = "button_vol_down_px7";
958                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
959                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
960                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
961                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
962                         };
963                         button_slide_sw_py0 {
964                                 nvidia,pins = "button_slide_sw_py0";
965                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
966                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
967                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
968                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
969                         };
970                         button_home_py1 {
971                                 nvidia,pins = "button_home_py1";
972                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
973                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
974                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
975                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
976                         };
977                         lcd_te_py2 {
978                                 nvidia,pins = "lcd_te_py2";
979                                 nvidia,function = "displaya";
980                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
981                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
982                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
983                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
984                         };
985                         pwr_i2c_scl_py3 {
986                                 nvidia,pins = "pwr_i2c_scl_py3";
987                                 nvidia,function = "i2cpmu";
988                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
989                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
990                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
991                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
992                                 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
993                         };
994                         pwr_i2c_sda_py4 {
995                                 nvidia,pins = "pwr_i2c_sda_py4";
996                                 nvidia,function = "i2cpmu";
997                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
998                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
999                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1000                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1001                                 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
1002                         };
1003                         clk_32k_out_py5 {
1004                                 nvidia,pins = "clk_32k_out_py5";
1005                                 nvidia,function = "soc";
1006                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1007                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1008                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1009                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1010                         };
1011                         pz0 {
1012                                 nvidia,pins = "pz0";
1013                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1014                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1015                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1016                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1017                         };
1018                         pz1 {
1019                                 nvidia,pins = "pz1";
1020                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1021                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1022                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1023                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1024                         };
1025                         pz2 {
1026                                 nvidia,pins = "pz2";
1027                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1028                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1029                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1030                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1031                         };
1032                         pz3 {
1033                                 nvidia,pins = "pz3";
1034                                 nvidia,function = "rsvd1";
1035                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1036                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1037                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1038                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1039                         };
1040                         pz4 {
1041                                 nvidia,pins = "pz4";
1042                                 nvidia,function = "rsvd1";
1043                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1044                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1045                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1046                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1047                         };
1048                         pz5 {
1049                                 nvidia,pins = "pz5";
1050                                 nvidia,function = "soc";
1051                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1052                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1053                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1054                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1055                         };
1056                         dap2_fs_paa0 {
1057                                 nvidia,pins = "dap2_fs_paa0";
1058                                 nvidia,function = "i2s2";
1059                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1060                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1061                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1062                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1063                         };
1064                         dap2_sclk_paa1 {
1065                                 nvidia,pins = "dap2_sclk_paa1";
1066                                 nvidia,function = "i2s2";
1067                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1068                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1069                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1070                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1071                         };
1072                         dap2_din_paa2 {
1073                                 nvidia,pins = "dap2_din_paa2";
1074                                 nvidia,function = "i2s2";
1075                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1076                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1077                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1078                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1079                         };
1080                         dap2_dout_paa3 {
1081                                 nvidia,pins = "dap2_dout_paa3";
1082                                 nvidia,function = "i2s2";
1083                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1084                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1085                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1086                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1087                         };
1088                         aud_mclk_pbb0 {
1089                                 nvidia,pins = "aud_mclk_pbb0";
1090                                 nvidia,function = "aud";
1091                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1092                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1093                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1094                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1095                         };
1096                         dvfs_pwm_pbb1 {
1097                                 nvidia,pins = "dvfs_pwm_pbb1";
1098                                 nvidia,function = "rsvd0";
1099                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1100                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1101                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1102                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1103                         };
1104                         dvfs_clk_pbb2 {
1105                                 nvidia,pins = "dvfs_clk_pbb2";
1106                                 nvidia,function = "rsvd0";
1107                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1108                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1109                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1110                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1111                         };
1112                         gpio_x1_aud_pbb3 {
1113                                 nvidia,pins = "gpio_x1_aud_pbb3";
1114                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1115                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1116                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1117                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1118                         };
1119                         gpio_x3_aud_pbb4 {
1120                                 nvidia,pins = "gpio_x3_aud_pbb4";
1121                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1122                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1123                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1124                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1125                         };
1126                         hdmi_cec_pcc0 {
1127                                 nvidia,pins = "hdmi_cec_pcc0";
1128                                 nvidia,function = "rsvd1";
1129                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1130                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1131                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1132                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1133                                 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
1134                         };
1135                         hdmi_int_dp_hpd_pcc1 {
1136                                 nvidia,pins = "hdmi_int_dp_hpd_pcc1";
1137                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1138                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1139                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1140                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1141                                 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
1142                         };
1143                         spdif_out_pcc2 {
1144                                 nvidia,pins = "spdif_out_pcc2";
1145                                 nvidia,function = "rsvd1";
1146                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1147                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1148                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1149                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1150                         };
1151                         spdif_in_pcc3 {
1152                                 nvidia,pins = "spdif_in_pcc3";
1153                                 nvidia,function = "rsvd1";
1154                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1155                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1156                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1157                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1158                         };
1159                         usb_vbus_en0_pcc4 {
1160                                 nvidia,pins = "usb_vbus_en0_pcc4";
1161                                 nvidia,function = "rsvd1";
1162                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1163                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1164                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1165                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1166                                 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
1167                         };
1168                         usb_vbus_en1_pcc5 {
1169                                 nvidia,pins = "usb_vbus_en1_pcc5";
1170                                 nvidia,function = "rsvd1";
1171                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1172                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1173                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1174                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1175                                 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
1176                         };
1177                         dp_hpd0_pcc6 {
1178                                 nvidia,pins = "dp_hpd0_pcc6";
1179                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1180                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1181                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1182                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1183                         };
1184                         pcc7 {
1185                                 nvidia,pins = "pcc7";
1186                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1187                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1188                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1189                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1190                                 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
1191                         };
1192                         spi2_cs1_pdd0 {
1193                                 nvidia,pins = "spi2_cs1_pdd0";
1194                                 nvidia,function = "rsvd1";
1195                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1196                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1197                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1198                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1199                         };
1200                         qspi_sck_pee0 {
1201                                 nvidia,pins = "qspi_sck_pee0";
1202                                 nvidia,function = "qspi";
1203                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1204                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1205                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1206                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1207                         };
1208                         qspi_cs_n_pee1 {
1209                                 nvidia,pins = "qspi_cs_n_pee1";
1210                                 nvidia,function = "qspi";
1211                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1212                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1213                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1214                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1215                         };
1216                         qspi_io0_pee2 {
1217                                 nvidia,pins = "qspi_io0_pee2";
1218                                 nvidia,function = "qspi";
1219                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1220                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1221                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1222                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1223                         };
1224                         qspi_io1_pee3 {
1225                                 nvidia,pins = "qspi_io1_pee3";
1226                                 nvidia,function = "qspi";
1227                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1228                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1229                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1230                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1231                         };
1232                         qspi_io2_pee4 {
1233                                 nvidia,pins = "qspi_io2_pee4";
1234                                 nvidia,function = "rsvd1";
1235                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1236                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1237                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1238                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1239                         };
1240                         qspi_io3_pee5 {
1241                                 nvidia,pins = "qspi_io3_pee5";
1242                                 nvidia,function = "rsvd1";
1243                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1244                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1245                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1246                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1247                         };
1248                         core_pwr_req {
1249                                 nvidia,pins = "core_pwr_req";
1250                                 nvidia,function = "core";
1251                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1252                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1253                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1254                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1255                         };
1256                         cpu_pwr_req {
1257                                 nvidia,pins = "cpu_pwr_req";
1258                                 nvidia,function = "cpu";
1259                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1260                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1261                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1262                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1263                         };
1264                         pwr_int_n {
1265                                 nvidia,pins = "pwr_int_n";
1266                                 nvidia,function = "pmi";
1267                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1268                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1269                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1270                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1271                         };
1272                         clk_32k_in {
1273                                 nvidia,pins = "clk_32k_in";
1274                                 nvidia,function = "clk";
1275                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1276                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1277                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1278                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1279                         };
1280                         jtag_rtck {
1281                                 nvidia,pins = "jtag_rtck";
1282                                 nvidia,function = "jtag";
1283                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1284                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1285                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1286                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1287                         };
1288                         clk_req {
1289                                 nvidia,pins = "clk_req";
1290                                 nvidia,function = "rsvd1";
1291                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1292                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1293                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1294                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1295                         };
1296                         shutdown {
1297                                 nvidia,pins = "shutdown";
1298                                 nvidia,function = "shutdown";
1299                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1300                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1301                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1302                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1303                         };
1304                 };
1305         };
1306
1307         serial@70006000 {
1308                 status = "okay";
1309         };
1310
1311         i2c@7000c400 {
1312                 status = "okay";
1313                 clock-frequency = <1000000>;
1314
1315                 ec@1e {
1316                         compatible = "google,cros-ec-i2c";
1317                         reg = <0x1e>;
1318                         interrupt-parent = <&gpio>;
1319                         interrupts = <TEGRA_GPIO(Z, 1) IRQ_TYPE_LEVEL_LOW>;
1320                         wakeup-source;
1321
1322                         ec_i2c_0: i2c-tunnel {
1323                                 compatible = "google,cros-ec-i2c-tunnel";
1324                                 #address-cells = <1>;
1325                                 #size-cells = <0>;
1326
1327                                 google,remote-bus = <0>;
1328
1329                                 battery: bq27742@55 {
1330                                         compatible = "ti,bq27742";
1331                                         reg = <0x55>;
1332                                         battery-name = "battery";
1333                                 };
1334                         };
1335                 };
1336         };
1337
1338         i2c@7000d000 {
1339                 status = "okay";
1340                 clock-frequency = <1000000>;
1341
1342                 max77620: max77620@3c {
1343                         compatible = "maxim,max77620";
1344                         reg = <0x3c>;
1345                         interrupts = <0 86 IRQ_TYPE_NONE>;
1346
1347                         #interrupt-cells = <2>;
1348                         interrupt-controller;
1349
1350                         gpio-controller;
1351                         #gpio-cells = <2>;
1352
1353                         pinctrl-names = "default";
1354                         pinctrl-0 = <&max77620_default>;
1355
1356                         max77620_default: pinmux@0 {
1357                                 pin_gpio {
1358                                         pins = "gpio0", "gpio1", "gpio2", "gpio7";
1359                                         function = "gpio";
1360                                 };
1361
1362                                 /*
1363                                  * GPIO3 is used to en_pp3300, and it is part of power
1364                                  * sequence, So it must be sequenced up (automatically
1365                                  * set by OTP) and down properly.
1366                                  */
1367                                 pin_gpio3 {
1368                                         pins = "gpio3";
1369                                         function = "fps-out";
1370                                         drive-open-drain = <1>;
1371                                         maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
1372                                         maxim,active-fps-power-up-slot = <4>;
1373                                         maxim,active-fps-power-down-slot = <2>;
1374                                 };
1375
1376                                 pin_gpio5_6 {
1377                                         pins = "gpio5", "gpio6";
1378                                         function = "gpio";
1379                                         drive-push-pull = <1>;
1380                                 };
1381
1382                                 pin_32k {
1383                                         pins = "gpio4";
1384                                         function = "32k-out1";
1385                                 };
1386                         };
1387
1388                         fps {
1389                                 fps0 {
1390                                         maxim,shutdown-fps-time-period-us = <5120>;
1391                                         maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
1392                                 };
1393
1394                                 fps1 {
1395                                         maxim,shutdown-fps-time-period-us = <5120>;
1396                                         maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
1397                                         maxim,device-state-on-disabled-event = <MAX77620_FPS_INACTIVE_STATE_SLEEP>;
1398                                 };
1399
1400                                 fps2 {
1401                                         maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
1402                                 };
1403                         };
1404
1405                         regulators {
1406                                 in-ldo0-1-supply = <&pp1350>;
1407                                 in-ldo2-supply = <&pp3300>;
1408                                 in-ldo3-5-supply = <&pp3300>;
1409                                 in-ldo7-8-supply = <&pp1350>;
1410
1411                                 ppvar_soc: sd0 {
1412                                         regulator-name = "PPVAR_SOC";
1413                                         regulator-min-microvolt = <825000>;
1414                                         regulator-max-microvolt = <1125000>;
1415                                         regulator-always-on;
1416                                         regulator-boot-on;
1417                                         maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
1418                                         maxim,active-fps-power-up-slot = <1>;
1419                                         maxim,active-fps-power-down-slot = <7>;
1420                                 };
1421
1422                                 pp1100_sd1: sd1 {
1423                                         regulator-name = "PP1100";
1424                                         regulator-min-microvolt = <1125000>;
1425                                         regulator-max-microvolt = <1125000>;
1426                                         regulator-always-on;
1427                                         regulator-boot-on;
1428                                         maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
1429                                         maxim,active-fps-power-up-slot = <5>;
1430                                         maxim,active-fps-power-down-slot = <1>;
1431                                 };
1432
1433                                 pp1350: sd2 {
1434                                         regulator-name = "PP1350";
1435                                         regulator-min-microvolt = <1350000>;
1436                                         regulator-max-microvolt = <1350000>;
1437                                         regulator-always-on;
1438                                         regulator-boot-on;
1439                                         maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
1440                                         maxim,active-fps-power-up-slot = <2>;
1441                                         maxim,active-fps-power-down-slot = <5>;
1442                                 };
1443
1444                                 pp1800: sd3 {
1445                                         regulator-name = "PP1800";
1446                                         regulator-min-microvolt = <1800000>;
1447                                         regulator-max-microvolt = <1800000>;
1448                                         regulator-always-on;
1449                                         regulator-boot-on;
1450                                         maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
1451                                         maxim,active-fps-power-up-slot = <3>;
1452                                         maxim,active-fps-power-down-slot = <3>;
1453                                 };
1454
1455                                 pp1200_avdd: ldo0 {
1456                                         regulator-name = "PP1200_AVDD";
1457                                         regulator-min-microvolt = <1200000>;
1458                                         regulator-max-microvolt = <1200000>;
1459                                         regulator-enable-ramp-delay = <26>;
1460                                         regulator-ramp-delay = <100000>;
1461                                         regulator-boot-on;
1462                                         maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
1463                                         maxim,active-fps-power-up-slot = <0>;
1464                                         maxim,active-fps-power-down-slot = <7>;
1465                                 };
1466
1467                                 pp1200_rcam: ldo1 {
1468                                         regulator-name = "PP1200_RCAM";
1469                                         regulator-min-microvolt = <1200000>;
1470                                         regulator-max-microvolt = <1200000>;
1471                                         regulator-enable-ramp-delay = <22>;
1472                                         regulator-ramp-delay = <100000>;
1473                                         maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
1474                                         maxim,active-fps-power-up-slot = <0>;
1475                                         maxim,active-fps-power-down-slot = <7>;
1476                                 };
1477
1478                                 pp_ldo2: ldo2 {
1479                                         regulator-name = "PP_LDO2";
1480                                         regulator-min-microvolt = <1800000>;
1481                                         regulator-max-microvolt = <1800000>;
1482                                         regulator-enable-ramp-delay = <62>;
1483                                         regulator-ramp-delay = <11000>;
1484                                         regulator-always-on;
1485                                         regulator-boot-on;
1486                                         maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
1487                                         maxim,active-fps-power-up-slot = <0>;
1488                                         maxim,active-fps-power-down-slot = <7>;
1489                                 };
1490
1491                                 pp2800l_rcam: ldo3 {
1492                                         regulator-name = "PP2800L_RCAM";
1493                                         regulator-min-microvolt = <2800000>;
1494                                         regulator-max-microvolt = <2800000>;
1495                                         regulator-enable-ramp-delay = <50>;
1496                                         regulator-ramp-delay = <100000>;
1497                                         maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
1498                                         maxim,active-fps-power-up-slot = <0>;
1499                                         maxim,active-fps-power-down-slot = <7>;
1500                                 };
1501
1502                                 pp100_soc_rtc: ldo4 {
1503                                         regulator-name = "PP1100_SOC_RTC";
1504                                         regulator-min-microvolt = <850000>;
1505                                         regulator-max-microvolt = <850000>;
1506                                         regulator-enable-ramp-delay = <22>;
1507                                         regulator-ramp-delay = <100000>;
1508                                         regulator-always-on; /* Check this */
1509                                         regulator-boot-on;
1510                                         maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
1511                                         maxim,active-fps-power-up-slot = <1>;
1512                                         maxim,active-fps-power-down-slot = <7>;
1513                                 };
1514
1515                                 pp2800l_fcam: ldo5 {
1516                                         regulator-name = "PP2800L_FCAM";
1517                                         regulator-min-microvolt = <2800000>;
1518                                         regulator-max-microvolt = <2800000>;
1519                                         regulator-enable-ramp-delay = <62>;
1520                                         regulator-ramp-delay = <100000>;
1521                                         maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
1522                                         maxim,active-fps-power-up-slot = <0>;
1523                                         maxim,active-fps-power-down-slot = <7>;
1524                                 };
1525
1526                                 ldo6 {
1527                                         /* Unused. */
1528                                         regulator-name = "PP_LDO6";
1529                                         regulator-min-microvolt = <1800000>;
1530                                         regulator-max-microvolt = <1800000>;
1531                                         regulator-enable-ramp-delay = <36>;
1532                                         regulator-ramp-delay = <100000>;
1533                                         maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
1534                                         maxim,active-fps-power-up-slot = <0>;
1535                                         maxim,active-fps-power-down-slot = <7>;
1536                                 };
1537
1538                                 pp1050_avdd: ldo7 {
1539                                         regulator-name = "PP1050_AVDD";
1540                                         regulator-min-microvolt = <1050000>;
1541                                         regulator-max-microvolt = <1050000>;
1542                                         regulator-enable-ramp-delay = <24>;
1543                                         regulator-ramp-delay = <100000>;
1544                                         regulator-always-on;
1545                                         regulator-boot-on;
1546                                         maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
1547                                         maxim,active-fps-power-up-slot = <3>;
1548                                         maxim,active-fps-power-down-slot = <4>;
1549                                 };
1550
1551                                 avddio_1v05: ldo8 {
1552                                         regulator-name = "AVDDIO_1V05";
1553                                         regulator-min-microvolt = <1050000>;
1554                                         regulator-max-microvolt = <1050000>;
1555                                         regulator-enable-ramp-delay = <22>;
1556                                         regulator-ramp-delay = <100000>;
1557                                         regulator-boot-on;
1558                                         maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
1559                                         maxim,active-fps-power-up-slot = <0>;
1560                                         maxim,active-fps-power-down-slot = <7>;
1561                                 };
1562                         };
1563                 };
1564         };
1565
1566         i2c@7000d100 {
1567                 status = "okay";
1568                 clock-frequency = <400000>;
1569
1570                 nau8825@1a {
1571                         compatible = "nuvoton,nau8825";
1572                         reg = <0x1a>;
1573                         interrupt-parent = <&gpio>;
1574                         interrupts = <TEGRA_GPIO(E, 6) IRQ_TYPE_LEVEL_LOW>;
1575                         clocks = <&tegra_car TEGRA210_CLK_CLK_OUT_2>;
1576                         clock-names = "mclk";
1577
1578                         nuvoton,jkdet-enable;
1579                         nuvoton,jkdet-polarity = <GPIO_ACTIVE_LOW>;
1580                         nuvoton,vref-impedance = <2>;
1581                         nuvoton,micbias-voltage = <6>;
1582                         nuvoton,sar-threshold-num = <4>;
1583                         nuvoton,sar-threshold = <0xc 0x1e 0x38 0x60>;
1584                         nuvoton,sar-hysteresis = <1>;
1585                         nuvoton,sar-voltage = <0>;
1586                         nuvoton,sar-compare-time = <0>;
1587                         nuvoton,sar-sampling-time = <0>;
1588                         nuvoton,short-key-debounce = <2>;
1589                         nuvoton,jack-insert-debounce = <7>;
1590                         nuvoton,jack-eject-debounce = <7>;
1591                         status = "okay";
1592                 };
1593
1594                 audio-codec@2d {
1595                         compatible = "realtek,rt5677";
1596                         reg = <0x2d>;
1597                         interrupt-parent = <&gpio>;
1598                         interrupts = <TEGRA_GPIO(X, 0) IRQ_TYPE_LEVEL_HIGH>;
1599                         realtek,reset-gpio = <&gpio TEGRA_GPIO(BB, 3) GPIO_ACTIVE_LOW>;
1600                         gpio-controller;
1601                         #gpio-cells = <2>;
1602                         status = "okay";
1603                 };
1604         };
1605
1606         pmc@7000e400 {
1607                 nvidia,invert-interrupt;
1608                 nvidia,suspend-mode = <0>;
1609                 nvidia,cpu-pwr-good-time = <0>;
1610                 nvidia,cpu-pwr-off-time = <0>;
1611                 nvidia,core-pwr-good-time = <12000 6000>;
1612                 nvidia,core-pwr-off-time = <39053>;
1613                 nvidia,core-power-req-active-high;
1614                 nvidia,sys-clock-req-active-high;
1615                 status = "okay";
1616         };
1617
1618         usb@70090000 {
1619                 phys = <&{/padctl@7009f000/pads/usb2/lanes/usb2-0}>,
1620                        <&{/padctl@7009f000/pads/pcie/lanes/pcie-6}>;
1621                 phy-names = "usb2-0", "usb3-0";
1622
1623                 dvddio-pex-supply = <&avddio_1v05>;
1624                 hvddio-pex-supply = <&pp1800>;
1625                 avdd-usb-supply = <&pp3300>;
1626                 avdd-pll-utmip-supply = <&pp1800>;
1627                 avdd-pll-uerefe-supply = <&pp1050_avdd>;
1628                 dvdd-pex-pll-supply = <&avddio_1v05>;
1629                 hvdd-pex-pll-e-supply = <&pp1800>;
1630
1631                 status = "okay";
1632         };
1633
1634         padctl@7009f000 {
1635                 status = "okay";
1636
1637                 pads {
1638                         usb2 {
1639                                 status = "okay";
1640
1641                                 lanes {
1642                                         usb2-0 {
1643                                                 nvidia,function = "xusb";
1644                                                 status = "okay";
1645                                         };
1646                                 };
1647                         };
1648
1649                         pcie {
1650                                 status = "okay";
1651
1652                                 lanes {
1653                                         pcie-6 {
1654                                                 nvidia,function = "usb3-ss";
1655                                                 status = "okay";
1656                                         };
1657                                 };
1658                         };
1659                 };
1660
1661                 ports {
1662                         usb2-0 {
1663                                 status = "okay";
1664                                 vbus-supply = <&usbc_vbus>;
1665                                 mode = "otg";
1666                         };
1667
1668                         usb3-0 {
1669                                 nvidia,usb2-companion = <0>;
1670                                 status = "okay";
1671                         };
1672                 };
1673         };
1674
1675         sdhci@700b0600 {
1676                 bus-width = <8>;
1677                 non-removable;
1678                 status = "okay";
1679         };
1680
1681         aconnect@702c0000 {
1682                 status = "okay";
1683
1684                 dma@702e2000 {
1685                         status = "okay";
1686                 };
1687
1688                 agic@702f9000 {
1689                         status = "okay";
1690                 };
1691         };
1692
1693         clocks {
1694                 compatible = "simple-bus";
1695                 #address-cells = <1>;
1696                 #size-cells = <0>;
1697
1698                 clk32k_in: clock@0 {
1699                         compatible = "fixed-clock";
1700                         reg = <0>;
1701                         #clock-cells = <0>;
1702                         clock-frequency = <32768>;
1703                 };
1704         };
1705
1706         cpus {
1707                 cpu@0 {
1708                         enable-method = "psci";
1709                 };
1710
1711                 cpu@1 {
1712                         enable-method = "psci";
1713                 };
1714
1715                 cpu@2 {
1716                         enable-method = "psci";
1717                 };
1718
1719                 cpu@3 {
1720                         enable-method = "psci";
1721                 };
1722         };
1723
1724         gpio-keys {
1725                 compatible = "gpio-keys";
1726                 gpio-keys,name = "gpio-keys";
1727
1728                 power {
1729                         label = "Power";
1730                         gpios = <&gpio TEGRA_GPIO(X, 5) GPIO_ACTIVE_LOW>;
1731                         linux,code = <KEY_POWER>;
1732                         debounce-interval = <30>;
1733                         wakeup-source;
1734                 };
1735
1736                 lid {
1737                         label = "Lid";
1738                         gpios = <&gpio TEGRA_GPIO(B, 4) GPIO_ACTIVE_LOW>;
1739                         linux,input-type = <EV_SW>;
1740                         linux,code = <SW_LID>;
1741                         wakeup-source;
1742                 };
1743
1744                 tablet_mode {
1745                         label = "Tablet Mode";
1746                         gpios = <&gpio TEGRA_GPIO(Z, 2) GPIO_ACTIVE_HIGH>;
1747                         linux,input-type = <EV_SW>;
1748                         linux,code = <SW_TABLET_MODE>;
1749                         wakeup-source;
1750                 };
1751
1752                 volume_down {
1753                         label = "Volume Down";
1754                         gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>;
1755                         linux,code = <KEY_VOLUMEDOWN>;
1756                 };
1757
1758                 volume_up {
1759                         label = "Volume Up";
1760                         gpios = <&gpio TEGRA_GPIO(M, 4) GPIO_ACTIVE_LOW>;
1761                         linux,code = <KEY_VOLUMEUP>;
1762                 };
1763         };
1764
1765         max98357a {
1766                 compatible = "maxim,max98357a";
1767                 status = "okay";
1768         };
1769
1770         psci {
1771                 compatible = "arm,psci-1.0";
1772                 method = "smc";
1773         };
1774
1775         regulators {
1776                 compatible = "simple-bus";
1777                 device_type = "fixed-regulators";
1778                 #address-cells = <1>;
1779                 #size-cells = <0>;
1780
1781                 ppvar_sys: regulator@0 {
1782                         compatible = "regulator-fixed";
1783                         reg = <0>;
1784                         regulator-name = "PPVAR_SYS";
1785                         regulator-min-microvolt = <4400000>;
1786                         regulator-max-microvolt = <4400000>;
1787                         regulator-always-on;
1788                 };
1789
1790                 pplcd_vdd: regulator@1 {
1791                         compatible = "regulator-fixed";
1792                         reg = <1>;
1793                         regulator-name = "PPLCD_VDD";
1794                         regulator-min-microvolt = <4400000>;
1795                         regulator-max-microvolt = <4400000>;
1796                         gpio = <&gpio TEGRA_GPIO(V, 4) 0>;
1797                         enable-active-high;
1798                         regulator-boot-on;
1799                 };
1800
1801                 pp3000_always: regulator@2 {
1802                         compatible = "regulator-fixed";
1803                         reg = <2>;
1804                         regulator-name = "PP3000_ALWAYS";
1805                         regulator-min-microvolt = <3000000>;
1806                         regulator-max-microvolt = <3000000>;
1807                         regulator-always-on;
1808                 };
1809
1810                 pp3300: regulator@3 {
1811                         compatible = "regulator-fixed";
1812                         reg = <3>;
1813                         regulator-name = "PP3300";
1814                         regulator-min-microvolt = <3300000>;
1815                         regulator-max-microvolt = <3300000>;
1816                         regulator-boot-on;
1817                         regulator-always-on;
1818                         enable-active-high;
1819                 };
1820
1821                 pp5000: regulator@4 {
1822                         compatible = "regulator-fixed";
1823                         reg = <4>;
1824                         regulator-name = "PP5000";
1825                         regulator-min-microvolt = <5000000>;
1826                         regulator-max-microvolt = <5000000>;
1827                         regulator-always-on;
1828                 };
1829
1830                 pp1800_lcdio: regulator@5 {
1831                         compatible = "regulator-fixed";
1832                         reg = <5>;
1833                         regulator-name = "PP1800_LCDIO";
1834                         regulator-min-microvolt = <1800000>;
1835                         regulator-max-microvolt = <1800000>;
1836                         gpio = <&gpio TEGRA_GPIO(V, 3) 0>;
1837                         enable-active-high;
1838                         regulator-boot-on;
1839                 };
1840
1841                 pp1800_cam: regulator@6 {
1842                         compatible = "regulator-fixed";
1843                         reg= <6>;
1844                         regulator-name = "PP1800_CAM";
1845                         regulator-min-microvolt = <1800000>;
1846                         regulator-max-microvolt = <1800000>;
1847                         gpio = <&gpio TEGRA_GPIO(K, 3) 0>;
1848                         enable-active-high;
1849                 };
1850
1851                 usbc_vbus: regulator@7 {
1852                         compatible = "regulator-fixed";
1853                         reg = <7>;
1854                         regulator-name = "USBC_VBUS";
1855                         regulator-min-microvolt = <5000000>;
1856                         regulator-max-microvolt = <5000000>;
1857                 };
1858         };
1859 };