arch/arm64/boot/dts/marvell/armada-cp110.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Copyright (C) 2016 Marvell Technology Group Ltd.
   4  *
   5  * Device Tree file for Marvell Armada CP110.
   6  */
   7
   8 #include <dt-bindings/interrupt-controller/mvebu-icu.h>
   9 #include <dt-bindings/thermal/thermal.h>
  10
  11 #include "armada-common.dtsi"
  12
  13 #define CP110_PCIEx_IO_BASE(iface)      (CP110_PCIE_IO_BASE + (iface *  0x10000))
  14 #define CP110_PCIEx_MEM_BASE(iface)     (CP110_PCIE_MEM_BASE + (iface *  0x1000000))
  15 #define CP110_PCIEx_CONF_BASE(iface)    (CP110_PCIEx_MEM_BASE(iface) + 0xf00000)
  16
  17 / {
  18         /*
  19          * The contents of the node are defined below, in order to
  20          * save one indentation level
  21          */
  22         CP110_NAME: CP110_NAME { };
  23
  24         /*
  25          * CPs only have one sensor in the thermal IC.
  26          *
  27          * The cooling maps are empty as there are no cooling devices.
  28          */
  29         thermal-zones {
  30                 CP110_LABEL(thermal_ic): CP110_NODE_NAME(thermal-ic) {
  31                         polling-delay-passive = <0>; /* Interrupt driven */
  32                         polling-delay = <0>; /* Interrupt driven */
  33
  34                         thermal-sensors = <&CP110_LABEL(thermal) 0>;
  35
  36                         trips {
  37                                 CP110_LABEL(crit): crit {
  38                                         temperature = <100000>; /* mC degrees */
  39                                         hysteresis = <2000>; /* mC degrees */
  40                                         type = "critical";
  41                                 };
  42                         };
  43
  44                         cooling-maps { };
  45                 };
  46         };
  47 };
  48
  49 &CP110_NAME {
  50         #address-cells = <2>;
  51         #size-cells = <2>;
  52         compatible = "simple-bus";
  53         interrupt-parent = <&CP110_LABEL(icu_nsr)>;
  54         ranges;
  55
  56         config-space@CP110_BASE {
  57                 #address-cells = <1>;
  58                 #size-cells = <1>;
  59                 compatible = "simple-bus";
  60                 ranges = <0x0 0x0 ADDRESSIFY(CP110_BASE) 0x2000000>;
  61
  62                 CP110_LABEL(ethernet): ethernet@0 {
  63                         compatible = "marvell,armada-7k-pp22";
  64                         reg = <0x0 0x100000>, <0x129000 0xb000>;
  65                         clocks = <&CP110_LABEL(clk) 1 3>, <&CP110_LABEL(clk) 1 9>,
  66                                  <&CP110_LABEL(clk) 1 5>, <&CP110_LABEL(clk) 1 6>,
  67                                  <&CP110_LABEL(clk) 1 18>;
  68                         clock-names = "pp_clk", "gop_clk",
  69                                       "mg_clk", "mg_core_clk", "axi_clk";
  70                         marvell,system-controller = <&CP110_LABEL(syscon0)>;
  71                         status = "disabled";
  72                         dma-coherent;
  73
  74                         CP110_LABEL(eth0): eth0 {
  75                                 interrupts = <39 IRQ_TYPE_LEVEL_HIGH>,
  76                                         <43 IRQ_TYPE_LEVEL_HIGH>,
  77                                         <47 IRQ_TYPE_LEVEL_HIGH>,
  78                                         <51 IRQ_TYPE_LEVEL_HIGH>,
  79                                         <55 IRQ_TYPE_LEVEL_HIGH>,
  80                                         <59 IRQ_TYPE_LEVEL_HIGH>,
  81                                         <63 IRQ_TYPE_LEVEL_HIGH>,
  82                                         <67 IRQ_TYPE_LEVEL_HIGH>,
  83                                         <71 IRQ_TYPE_LEVEL_HIGH>,
  84                                         <129 IRQ_TYPE_LEVEL_HIGH>;
  85                                 interrupt-names = "hif0", "hif1", "hif2",
  86                                         "hif3", "hif4", "hif5", "hif6", "hif7",
  87                                         "hif8", "link";
  88                                 port-id = <0>;
  89                                 gop-port-id = <0>;
  90                                 status = "disabled";
  91                         };
  92
  93                         CP110_LABEL(eth1): eth1 {
  94                                 interrupts = <40 IRQ_TYPE_LEVEL_HIGH>,
  95                                         <44 IRQ_TYPE_LEVEL_HIGH>,
  96                                         <48 IRQ_TYPE_LEVEL_HIGH>,
  97                                         <52 IRQ_TYPE_LEVEL_HIGH>,
  98                                         <56 IRQ_TYPE_LEVEL_HIGH>,
  99                                         <60 IRQ_TYPE_LEVEL_HIGH>,
 100                                         <64 IRQ_TYPE_LEVEL_HIGH>,
 101                                         <68 IRQ_TYPE_LEVEL_HIGH>,
 102                                         <72 IRQ_TYPE_LEVEL_HIGH>,
 103                                         <128 IRQ_TYPE_LEVEL_HIGH>;
 104                                 interrupt-names = "hif0", "hif1", "hif2",
 105                                         "hif3", "hif4", "hif5", "hif6", "hif7",
 106                                         "hif8", "link";
 107                                 port-id = <1>;
 108                                 gop-port-id = <2>;
 109                                 status = "disabled";
 110                         };
 111
 112                         CP110_LABEL(eth2): eth2 {
 113                                 interrupts = <41 IRQ_TYPE_LEVEL_HIGH>,
 114                                         <45 IRQ_TYPE_LEVEL_HIGH>,
 115                                         <49 IRQ_TYPE_LEVEL_HIGH>,
 116                                         <53 IRQ_TYPE_LEVEL_HIGH>,
 117                                         <57 IRQ_TYPE_LEVEL_HIGH>,
 118                                         <61 IRQ_TYPE_LEVEL_HIGH>,
 119                                         <65 IRQ_TYPE_LEVEL_HIGH>,
 120                                         <69 IRQ_TYPE_LEVEL_HIGH>,
 121                                         <73 IRQ_TYPE_LEVEL_HIGH>,
 122                                         <127 IRQ_TYPE_LEVEL_HIGH>;
 123                                 interrupt-names = "hif0", "hif1", "hif2",
 124                                         "hif3", "hif4", "hif5", "hif6", "hif7",
 125                                         "hif8", "link";
 126                                 port-id = <2>;
 127                                 gop-port-id = <3>;
 128                                 status = "disabled";
 129                         };
 130                 };
 131
 132                 CP110_LABEL(comphy): phy@120000 {
 133                         compatible = "marvell,comphy-cp110";
 134                         reg = <0x120000 0x6000>;
 135                         marvell,system-controller = <&CP110_LABEL(syscon0)>;
 136                         #address-cells = <1>;
 137                         #size-cells = <0>;
 138
 139                         CP110_LABEL(comphy0): phy@0 {
 140                                 reg = <0>;
 141                                 #phy-cells = <1>;
 142                         };
 143
 144                         CP110_LABEL(comphy1): phy@1 {
 145                                 reg = <1>;
 146                                 #phy-cells = <1>;
 147                         };
 148
 149                         CP110_LABEL(comphy2): phy@2 {
 150                                 reg = <2>;
 151                                 #phy-cells = <1>;
 152                         };
 153
 154                         CP110_LABEL(comphy3): phy@3 {
 155                                 reg = <3>;
 156                                 #phy-cells = <1>;
 157                         };
 158
 159                         CP110_LABEL(comphy4): phy@4 {
 160                                 reg = <4>;
 161                                 #phy-cells = <1>;
 162                         };
 163
 164                         CP110_LABEL(comphy5): phy@5 {
 165                                 reg = <5>;
 166                                 #phy-cells = <1>;
 167                         };
 168                 };
 169
 170                 CP110_LABEL(mdio): mdio@12a200 {
 171                         #address-cells = <1>;
 172                         #size-cells = <0>;
 173                         compatible = "marvell,orion-mdio";
 174                         reg = <0x12a200 0x10>;
 175                         clocks = <&CP110_LABEL(clk) 1 9>, <&CP110_LABEL(clk) 1 5>,
 176                                  <&CP110_LABEL(clk) 1 6>, <&CP110_LABEL(clk) 1 18>;
 177                         status = "disabled";
 178                 };
 179
 180                 CP110_LABEL(xmdio): mdio@12a600 {
 181                         #address-cells = <1>;
 182                         #size-cells = <0>;
 183                         compatible = "marvell,xmdio";
 184                         reg = <0x12a600 0x10>;
 185                         clocks = <&CP110_LABEL(clk) 1 5>,
 186                                  <&CP110_LABEL(clk) 1 6>, <&CP110_LABEL(clk) 1 18>;
 187                         status = "disabled";
 188                 };
 189
 190                 CP110_LABEL(icu): interrupt-controller@1e0000 {
 191                         compatible = "marvell,cp110-icu";
 192                         reg = <0x1e0000 0x440>;
 193                         #address-cells = <1>;
 194                         #size-cells = <1>;
 195
 196                         CP110_LABEL(icu_nsr): interrupt-controller@10 {
 197                                 compatible = "marvell,cp110-icu-nsr";
 198                                 reg = <0x10 0x20>;
 199                                 #interrupt-cells = <2>;
 200                                 interrupt-controller;
 201                                 msi-parent = <&gicp>;
 202                         };
 203
 204                         CP110_LABEL(icu_sei): interrupt-controller@50 {
 205                                 compatible = "marvell,cp110-icu-sei";
 206                                 reg = <0x50 0x10>;
 207                                 #interrupt-cells = <2>;
 208                                 interrupt-controller;
 209                                 msi-parent = <&sei>;
 210                         };
 211                 };
 212
 213                 CP110_LABEL(rtc): rtc@284000 {
 214                         compatible = "marvell,armada-8k-rtc";
 215                         reg = <0x284000 0x20>, <0x284080 0x24>;
 216                         reg-names = "rtc", "rtc-soc";
 217                         interrupts = <77 IRQ_TYPE_LEVEL_HIGH>;
 218                 };
 219
 220                 CP110_LABEL(syscon0): system-controller@440000 {
 221                         compatible = "syscon", "simple-mfd";
 222                         reg = <0x440000 0x2000>;
 223
 224                         CP110_LABEL(clk): clock {
 225                                 compatible = "marvell,cp110-clock";
 226                                 #clock-cells = <2>;
 227                         };
 228
 229                         CP110_LABEL(gpio1): gpio@100 {
 230                                 compatible = "marvell,armada-8k-gpio";
 231                                 offset = <0x100>;
 232                                 ngpios = <32>;
 233                                 gpio-controller;
 234                                 #gpio-cells = <2>;
 235                                 gpio-ranges = <&CP110_LABEL(pinctrl) 0 0 32>;
 236                                 interrupt-controller;
 237                                 interrupts = <86 IRQ_TYPE_LEVEL_HIGH>,
 238                                         <85 IRQ_TYPE_LEVEL_HIGH>,
 239                                         <84 IRQ_TYPE_LEVEL_HIGH>,
 240                                         <83 IRQ_TYPE_LEVEL_HIGH>;
 241                                 status = "disabled";
 242                         };
 243
 244                         CP110_LABEL(gpio2): gpio@140 {
 245                                 compatible = "marvell,armada-8k-gpio";
 246                                 offset = <0x140>;
 247                                 ngpios = <31>;
 248                                 gpio-controller;
 249                                 #gpio-cells = <2>;
 250                                 gpio-ranges = <&CP110_LABEL(pinctrl) 0 32 31>;
 251                                 interrupt-controller;
 252                                 interrupts = <82 IRQ_TYPE_LEVEL_HIGH>,
 253                                         <81 IRQ_TYPE_LEVEL_HIGH>,
 254                                         <80 IRQ_TYPE_LEVEL_HIGH>,
 255                                         <79 IRQ_TYPE_LEVEL_HIGH>;
 256                                 status = "disabled";
 257                         };
 258                 };
 259
 260                 CP110_LABEL(syscon1): system-controller@400000 {
 261                         compatible = "syscon", "simple-mfd";
 262                         reg = <0x400000 0x1000>;
 263                         #address-cells = <1>;
 264                         #size-cells = <1>;
 265
 266                         CP110_LABEL(thermal): thermal-sensor@70 {
 267                                 compatible = "marvell,armada-cp110-thermal";
 268                                 reg = <0x70 0x10>;
 269                                 interrupts-extended =
 270                                         <&CP110_LABEL(icu_sei) 116 IRQ_TYPE_LEVEL_HIGH>;
 271                                 #thermal-sensor-cells = <1>;
 272                         };
 273                 };
 274
 275                 CP110_LABEL(usb3_0): usb3@500000 {
 276                         compatible = "marvell,armada-8k-xhci",
 277                         "generic-xhci";
 278                         reg = <0x500000 0x4000>;
 279                         dma-coherent;
 280                         interrupts = <106 IRQ_TYPE_LEVEL_HIGH>;
 281                         clock-names = "core", "reg";
 282                         clocks = <&CP110_LABEL(clk) 1 22>,
 283                                  <&CP110_LABEL(clk) 1 16>;
 284                         status = "disabled";
 285                 };
 286
 287                 CP110_LABEL(usb3_1): usb3@510000 {
 288                         compatible = "marvell,armada-8k-xhci",
 289                         "generic-xhci";
 290                         reg = <0x510000 0x4000>;
 291                         dma-coherent;
 292                         interrupts = <105 IRQ_TYPE_LEVEL_HIGH>;
 293                         clock-names = "core", "reg";
 294                         clocks = <&CP110_LABEL(clk) 1 23>,
 295                                  <&CP110_LABEL(clk) 1 16>;
 296                         status = "disabled";
 297                 };
 298
 299                 CP110_LABEL(sata0): sata@540000 {
 300                         compatible = "marvell,armada-8k-ahci",
 301                         "generic-ahci";
 302                         reg = <0x540000 0x30000>;
 303                         dma-coherent;
 304                         interrupts = <107 IRQ_TYPE_LEVEL_HIGH>;
 305                         clocks = <&CP110_LABEL(clk) 1 15>,
 306                                  <&CP110_LABEL(clk) 1 16>;
 307                         status = "disabled";
 308                 };
 309
 310                 CP110_LABEL(xor0): xor@6a0000 {
 311                         compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
 312                         reg = <0x6a0000 0x1000>, <0x6b0000 0x1000>;
 313                         dma-coherent;
 314                         msi-parent = <&gic_v2m0>;
 315                         clock-names = "core", "reg";
 316                         clocks = <&CP110_LABEL(clk) 1 8>,
 317                                  <&CP110_LABEL(clk) 1 14>;
 318                 };
 319
 320                 CP110_LABEL(xor1): xor@6c0000 {
 321                         compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
 322                         reg = <0x6c0000 0x1000>, <0x6d0000 0x1000>;
 323                         dma-coherent;
 324                         msi-parent = <&gic_v2m0>;
 325                         clock-names = "core", "reg";
 326                         clocks = <&CP110_LABEL(clk) 1 7>,
 327                                  <&CP110_LABEL(clk) 1 14>;
 328                 };
 329
 330                 CP110_LABEL(spi0): spi@700600 {
 331                         compatible = "marvell,armada-380-spi";
 332                         reg = <0x700600 0x50>;
 333                         #address-cells = <0x1>;
 334                         #size-cells = <0x0>;
 335                         clock-names = "core", "axi";
 336                         clocks = <&CP110_LABEL(clk) 1 21>,
 337                                  <&CP110_LABEL(clk) 1 17>;
 338                         status = "disabled";
 339                 };
 340
 341                 CP110_LABEL(spi1): spi@700680 {
 342                         compatible = "marvell,armada-380-spi";
 343                         reg = <0x700680 0x50>;
 344                         #address-cells = <1>;
 345                         #size-cells = <0>;
 346                         clock-names = "core", "axi";
 347                         clocks = <&CP110_LABEL(clk) 1 21>,
 348                                  <&CP110_LABEL(clk) 1 17>;
 349                         status = "disabled";
 350                 };
 351
 352                 CP110_LABEL(i2c0): i2c@701000 {
 353                         compatible = "marvell,mv78230-i2c";
 354                         reg = <0x701000 0x20>;
 355                         #address-cells = <1>;
 356                         #size-cells = <0>;
 357                         interrupts = <120 IRQ_TYPE_LEVEL_HIGH>;
 358                         clock-names = "core", "reg";
 359                         clocks = <&CP110_LABEL(clk) 1 21>,
 360                                  <&CP110_LABEL(clk) 1 17>;
 361                         status = "disabled";
 362                 };
 363
 364                 CP110_LABEL(i2c1): i2c@701100 {
 365                         compatible = "marvell,mv78230-i2c";
 366                         reg = <0x701100 0x20>;
 367                         #address-cells = <1>;
 368                         #size-cells = <0>;
 369                         interrupts = <121 IRQ_TYPE_LEVEL_HIGH>;
 370                         clock-names = "core", "reg";
 371                         clocks = <&CP110_LABEL(clk) 1 21>,
 372                                  <&CP110_LABEL(clk) 1 17>;
 373                         status = "disabled";
 374                 };
 375
 376                 CP110_LABEL(uart0): serial@702000 {
 377                         compatible = "snps,dw-apb-uart";
 378                         reg = <0x702000 0x100>;
 379                         reg-shift = <2>;
 380                         interrupts = <122 IRQ_TYPE_LEVEL_HIGH>;
 381                         reg-io-width = <1>;
 382                         clock-names = "baudclk", "apb_pclk";
 383                         clocks = <&CP110_LABEL(clk) 1 21>,
 384                                  <&CP110_LABEL(clk) 1 17>;
 385                         status = "disabled";
 386                 };
 387
 388                 CP110_LABEL(uart1): serial@702100 {
 389                         compatible = "snps,dw-apb-uart";
 390                         reg = <0x702100 0x100>;
 391                         reg-shift = <2>;
 392                         interrupts = <123 IRQ_TYPE_LEVEL_HIGH>;
 393                         reg-io-width = <1>;
 394                         clock-names = "baudclk", "apb_pclk";
 395                         clocks = <&CP110_LABEL(clk) 1 21>,
 396                                  <&CP110_LABEL(clk) 1 17>;
 397                         status = "disabled";
 398                 };
 399
 400                 CP110_LABEL(uart2): serial@702200 {
 401                         compatible = "snps,dw-apb-uart";
 402                         reg = <0x702200 0x100>;
 403                         reg-shift = <2>;
 404                         interrupts = <124 IRQ_TYPE_LEVEL_HIGH>;
 405                         reg-io-width = <1>;
 406                         clock-names = "baudclk", "apb_pclk";
 407                         clocks = <&CP110_LABEL(clk) 1 21>,
 408                                  <&CP110_LABEL(clk) 1 17>;
 409                         status = "disabled";
 410                 };
 411
 412                 CP110_LABEL(uart3): serial@702300 {
 413                         compatible = "snps,dw-apb-uart";
 414                         reg = <0x702300 0x100>;
 415                         reg-shift = <2>;
 416                         interrupts = <125 IRQ_TYPE_LEVEL_HIGH>;
 417                         reg-io-width = <1>;
 418                         clock-names = "baudclk", "apb_pclk";
 419                         clocks = <&CP110_LABEL(clk) 1 21>,
 420                                  <&CP110_LABEL(clk) 1 17>;
 421                         status = "disabled";
 422                 };
 423
 424                 CP110_LABEL(nand_controller): nand@720000 {
 425                         /*
 426                         * Due to the limitation of the pins available
 427                         * this controller is only usable on the CPM
 428                         * for A7K and on the CPS for A8K.
 429                         */
 430                         compatible = "marvell,armada-8k-nand-controller",
 431                                 "marvell,armada370-nand-controller";
 432                         reg = <0x720000 0x54>;
 433                         #address-cells = <1>;
 434                         #size-cells = <0>;
 435                         interrupts = <115 IRQ_TYPE_LEVEL_HIGH>;
 436                         clock-names = "core", "reg";
 437                         clocks = <&CP110_LABEL(clk) 1 2>,
 438                                  <&CP110_LABEL(clk) 1 17>;
 439                         marvell,system-controller = <&CP110_LABEL(syscon0)>;
 440                         status = "disabled";
 441                 };
 442
 443                 CP110_LABEL(trng): trng@760000 {
 444                         compatible = "marvell,armada-8k-rng",
 445                         "inside-secure,safexcel-eip76";
 446                         reg = <0x760000 0x7d>;
 447                         interrupts = <95 IRQ_TYPE_LEVEL_HIGH>;
 448                         clock-names = "core", "reg";
 449                         clocks = <&CP110_LABEL(clk) 1 25>,
 450                                  <&CP110_LABEL(clk) 1 17>;
 451                         status = "okay";
 452                 };
 453
 454                 CP110_LABEL(sdhci0): sdhci@780000 {
 455                         compatible = "marvell,armada-cp110-sdhci";
 456                         reg = <0x780000 0x300>;
 457                         interrupts = <27 IRQ_TYPE_LEVEL_HIGH>;
 458                         clock-names = "core", "axi";
 459                         clocks = <&CP110_LABEL(clk) 1 4>, <&CP110_LABEL(clk) 1 18>;
 460                         dma-coherent;
 461                         status = "disabled";
 462                 };
 463
 464                 CP110_LABEL(crypto): crypto@800000 {
 465                         compatible = "inside-secure,safexcel-eip197b";
 466                         reg = <0x800000 0x200000>;
 467                         interrupts = <87 IRQ_TYPE_LEVEL_HIGH>,
 468                                 <88 IRQ_TYPE_LEVEL_HIGH>,
 469                                 <89 IRQ_TYPE_LEVEL_HIGH>,
 470                                 <90 IRQ_TYPE_LEVEL_HIGH>,
 471                                 <91 IRQ_TYPE_LEVEL_HIGH>,
 472                                 <92 IRQ_TYPE_LEVEL_HIGH>;
 473                         interrupt-names = "mem", "ring0", "ring1",
 474                                 "ring2", "ring3", "eip";
 475                         clock-names = "core", "reg";
 476                         clocks = <&CP110_LABEL(clk) 1 26>,
 477                                  <&CP110_LABEL(clk) 1 17>;
 478                         dma-coherent;
 479                 };
 480         };
 481
 482         CP110_LABEL(pcie0): pcie@CP110_PCIE0_BASE {
 483                 compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
 484                 reg = <0 ADDRESSIFY(CP110_PCIE0_BASE) 0 0x10000>,
 485                       <0 CP110_PCIEx_CONF_BASE(0) 0 0x80000>;
 486                 reg-names = "ctrl", "config";
 487                 #address-cells = <3>;
 488                 #size-cells = <2>;
 489                 #interrupt-cells = <1>;
 490                 device_type = "pci";
 491                 dma-coherent;
 492                 msi-parent = <&gic_v2m0>;
 493
 494                 bus-range = <0 0xff>;
 495                 ranges =
 496                 /* downstream I/O */
 497                 <0x81000000 0 CP110_PCIEx_IO_BASE(0) 0  CP110_PCIEx_IO_BASE(0) 0 0x10000
 498                 /* non-prefetchable memory */
 499                 0x82000000 0 CP110_PCIEx_MEM_BASE(0) 0  CP110_PCIEx_MEM_BASE(0) 0 0xf00000>;
 500                 interrupt-map-mask = <0 0 0 0>;
 501                 interrupt-map = <0 0 0 0 &CP110_LABEL(icu_nsr) 22 IRQ_TYPE_LEVEL_HIGH>;
 502                 interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;
 503                 num-lanes = <1>;
 504                 clock-names = "core", "reg";
 505                 clocks = <&CP110_LABEL(clk) 1 13>, <&CP110_LABEL(clk) 1 14>;
 506                 status = "disabled";
 507         };
 508
 509         CP110_LABEL(pcie1): pcie@CP110_PCIE1_BASE {
 510                 compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
 511                 reg = <0 ADDRESSIFY(CP110_PCIE1_BASE) 0 0x10000>,
 512                       <0 CP110_PCIEx_CONF_BASE(1) 0 0x80000>;
 513                 reg-names = "ctrl", "config";
 514                 #address-cells = <3>;
 515                 #size-cells = <2>;
 516                 #interrupt-cells = <1>;
 517                 device_type = "pci";
 518                 dma-coherent;
 519                 msi-parent = <&gic_v2m0>;
 520
 521                 bus-range = <0 0xff>;
 522                 ranges =
 523                 /* downstream I/O */
 524                 <0x81000000 0 CP110_PCIEx_IO_BASE(1) 0  CP110_PCIEx_IO_BASE(1) 0 0x10000
 525                 /* non-prefetchable memory */
 526                 0x82000000 0 CP110_PCIEx_MEM_BASE(1) 0  CP110_PCIEx_MEM_BASE(1) 0 0xf00000>;
 527                 interrupt-map-mask = <0 0 0 0>;
 528                 interrupt-map = <0 0 0 0 &CP110_LABEL(icu_nsr) 24 IRQ_TYPE_LEVEL_HIGH>;
 529                 interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
 530
 531                 num-lanes = <1>;
 532                 clock-names = "core", "reg";
 533                 clocks = <&CP110_LABEL(clk) 1 11>, <&CP110_LABEL(clk) 1 14>;
 534                 status = "disabled";
 535         };
 536
 537         CP110_LABEL(pcie2): pcie@CP110_PCIE2_BASE {
 538                 compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
 539                 reg = <0 ADDRESSIFY(CP110_PCIE2_BASE) 0 0x10000>,
 540                       <0 CP110_PCIEx_CONF_BASE(2) 0 0x80000>;
 541                 reg-names = "ctrl", "config";
 542                 #address-cells = <3>;
 543                 #size-cells = <2>;
 544                 #interrupt-cells = <1>;
 545                 device_type = "pci";
 546                 dma-coherent;
 547                 msi-parent = <&gic_v2m0>;
 548
 549                 bus-range = <0 0xff>;
 550                 ranges =
 551                 /* downstream I/O */
 552                 <0x81000000 0 CP110_PCIEx_IO_BASE(2) 0  CP110_PCIEx_IO_BASE(2) 0 0x10000
 553                 /* non-prefetchable memory */
 554                 0x82000000 0 CP110_PCIEx_MEM_BASE(2) 0  CP110_PCIEx_MEM_BASE(2) 0 0xf00000>;
 555                 interrupt-map-mask = <0 0 0 0>;
 556                 interrupt-map = <0 0 0 0 &CP110_LABEL(icu_nsr) 23 IRQ_TYPE_LEVEL_HIGH>;
 557                 interrupts = <23 IRQ_TYPE_LEVEL_HIGH>;
 558
 559                 num-lanes = <1>;
 560                 clock-names = "core", "reg";
 561                 clocks = <&CP110_LABEL(clk) 1 12>, <&CP110_LABEL(clk) 1 14>;
 562                 status = "disabled";
 563         };
 564 };