arch/arm64/boot/dts/marvell/armada-ap806.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Copyright (C) 2016 Marvell Technology Group Ltd.
   4  *
   5  * Device Tree file for Marvell Armada AP806.
   6  */
   7
   8 #include <dt-bindings/interrupt-controller/arm-gic.h>
   9
  10 /dts-v1/;
  11
  12 / {
  13         model = "Marvell Armada AP806";
  14         compatible = "marvell,armada-ap806";
  15         #address-cells = <2>;
  16         #size-cells = <2>;
  17
  18         aliases {
  19                 serial0 = &uart0;
  20                 serial1 = &uart1;
  21                 gpio0 = &ap_gpio;
  22                 spi0 = &spi0;
  23         };
  24
  25         psci {
  26                 compatible = "arm,psci-0.2";
  27                 method = "smc";
  28         };
  29
  30         ap806 {
  31                 #address-cells = <2>;
  32                 #size-cells = <2>;
  33                 compatible = "simple-bus";
  34                 interrupt-parent = <&gic>;
  35                 ranges;
  36
  37                 config-space@f0000000 {
  38                         #address-cells = <1>;
  39                         #size-cells = <1>;
  40                         compatible = "simple-bus";
  41                         ranges = <0x0 0x0 0xf0000000 0x1000000>;
  42
  43                         gic: interrupt-controller@210000 {
  44                                 compatible = "arm,gic-400";
  45                                 #interrupt-cells = <3>;
  46                                 #address-cells = <1>;
  47                                 #size-cells = <1>;
  48                                 ranges;
  49                                 interrupt-controller;
  50                                 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
  51                                 reg = <0x210000 0x10000>,
  52                                       <0x220000 0x20000>,
  53                                       <0x240000 0x20000>,
  54                                       <0x260000 0x20000>;
  55
  56                                 gic_v2m0: v2m@280000 {
  57                                         compatible = "arm,gic-v2m-frame";
  58                                         msi-controller;
  59                                         reg = <0x280000 0x1000>;
  60                                         arm,msi-base-spi = <160>;
  61                                         arm,msi-num-spis = <32>;
  62                                 };
  63                                 gic_v2m1: v2m@290000 {
  64                                         compatible = "arm,gic-v2m-frame";
  65                                         msi-controller;
  66                                         reg = <0x290000 0x1000>;
  67                                         arm,msi-base-spi = <192>;
  68                                         arm,msi-num-spis = <32>;
  69                                 };
  70                                 gic_v2m2: v2m@2a0000 {
  71                                         compatible = "arm,gic-v2m-frame";
  72                                         msi-controller;
  73                                         reg = <0x2a0000 0x1000>;
  74                                         arm,msi-base-spi = <224>;
  75                                         arm,msi-num-spis = <32>;
  76                                 };
  77                                 gic_v2m3: v2m@2b0000 {
  78                                         compatible = "arm,gic-v2m-frame";
  79                                         msi-controller;
  80                                         reg = <0x2b0000 0x1000>;
  81                                         arm,msi-base-spi = <256>;
  82                                         arm,msi-num-spis = <32>;
  83                                 };
  84                         };
  85
  86                         timer {
  87                                 compatible = "arm,armv8-timer";
  88                                 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
  89                                              <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
  90                                              <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
  91                                              <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
  92                         };
  93
  94                         pmu {
  95                                 compatible = "arm,cortex-a72-pmu";
  96                                 interrupt-parent = <&pic>;
  97                                 interrupts = <17>;
  98                         };
  99
 100                         odmi: odmi@300000 {
 101                                 compatible = "marvell,odmi-controller";
 102                                 interrupt-controller;
 103                                 msi-controller;
 104                                 marvell,odmi-frames = <4>;
 105                                 reg = <0x300000 0x4000>,
 106                                       <0x304000 0x4000>,
 107                                       <0x308000 0x4000>,
 108                                       <0x30C000 0x4000>;
 109                                 marvell,spi-base = <128>, <136>, <144>, <152>;
 110                         };
 111
 112                         gicp: gicp@3f0040 {
 113                                 compatible = "marvell,ap806-gicp";
 114                                 reg = <0x3f0040 0x10>;
 115                                 marvell,spi-ranges = <64 64>, <288 64>;
 116                                 msi-controller;
 117                         };
 118
 119                         pic: interrupt-controller@3f0100 {
 120                                 compatible = "marvell,armada-8k-pic";
 121                                 reg = <0x3f0100 0x10>;
 122                                 #interrupt-cells = <1>;
 123                                 interrupt-controller;
 124                                 interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>;
 125                         };
 126
 127                         xor@400000 {
 128                                 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
 129                                 reg = <0x400000 0x1000>,
 130                                       <0x410000 0x1000>;
 131                                 msi-parent = <&gic_v2m0>;
 132                                 clocks = <&ap_clk 3>;
 133                                 dma-coherent;
 134                         };
 135
 136                         xor@420000 {
 137                                 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
 138                                 reg = <0x420000 0x1000>,
 139                                       <0x430000 0x1000>;
 140                                 msi-parent = <&gic_v2m0>;
 141                                 clocks = <&ap_clk 3>;
 142                                 dma-coherent;
 143                         };
 144
 145                         xor@440000 {
 146                                 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
 147                                 reg = <0x440000 0x1000>,
 148                                       <0x450000 0x1000>;
 149                                 msi-parent = <&gic_v2m0>;
 150                                 clocks = <&ap_clk 3>;
 151                                 dma-coherent;
 152                         };
 153
 154                         xor@460000 {
 155                                 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
 156                                 reg = <0x460000 0x1000>,
 157                                       <0x470000 0x1000>;
 158                                 msi-parent = <&gic_v2m0>;
 159                                 clocks = <&ap_clk 3>;
 160                                 dma-coherent;
 161                         };
 162
 163                         spi0: spi@510600 {
 164                                 compatible = "marvell,armada-380-spi";
 165                                 reg = <0x510600 0x50>;
 166                                 #address-cells = <1>;
 167                                 #size-cells = <0>;
 168                                 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 169                                 clocks = <&ap_clk 3>;
 170                                 status = "disabled";
 171                         };
 172
 173                         i2c0: i2c@511000 {
 174                                 compatible = "marvell,mv78230-i2c";
 175                                 reg = <0x511000 0x20>;
 176                                 #address-cells = <1>;
 177                                 #size-cells = <0>;
 178                                 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 179                                 timeout-ms = <1000>;
 180                                 clocks = <&ap_clk 3>;
 181                                 status = "disabled";
 182                         };
 183
 184                         uart0: serial@512000 {
 185                                 compatible = "snps,dw-apb-uart";
 186                                 reg = <0x512000 0x100>;
 187                                 reg-shift = <2>;
 188                                 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 189                                 reg-io-width = <1>;
 190                                 clocks = <&ap_clk 3>;
 191                                 status = "disabled";
 192                         };
 193
 194                         uart1: serial@512100 {
 195                                 compatible = "snps,dw-apb-uart";
 196                                 reg = <0x512100 0x100>;
 197                                 reg-shift = <2>;
 198                                 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
 199                                 reg-io-width = <1>;
 200                                 clocks = <&ap_clk 3>;
 201                                 status = "disabled";
 202
 203                         };
 204
 205                         watchdog: watchdog@610000 {
 206                                 compatible = "arm,sbsa-gwdt";
 207                                 reg = <0x610000 0x1000>, <0x600000 0x1000>;
 208                                 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
 209                         };
 210
 211                         ap_sdhci0: sdhci@6e0000 {
 212                                 compatible = "marvell,armada-ap806-sdhci";
 213                                 reg = <0x6e0000 0x300>;
 214                                 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 215                                 clock-names = "core";
 216                                 clocks = <&ap_clk 4>;
 217                                 dma-coherent;
 218                                 marvell,xenon-phy-slow-mode;
 219                                 status = "disabled";
 220                         };
 221
 222                         ap_syscon: system-controller@6f4000 {
 223                                 compatible = "syscon", "simple-mfd";
 224                                 reg = <0x6f4000 0x2000>;
 225
 226                                 ap_clk: clock {
 227                                         compatible = "marvell,ap806-clock";
 228                                         #clock-cells = <1>;
 229                                 };
 230
 231                                 ap_pinctrl: pinctrl {
 232                                         compatible = "marvell,ap806-pinctrl";
 233
 234                                         uart0_pins: uart0-pins {
 235                                                 marvell,pins = "mpp11", "mpp19";
 236                                                 marvell,function = "uart0";
 237                                         };
 238                                 };
 239
 240                                 ap_gpio: gpio@1040 {
 241                                         compatible = "marvell,armada-8k-gpio";
 242                                         offset = <0x1040>;
 243                                         ngpios = <20>;
 244                                         gpio-controller;
 245                                         #gpio-cells = <2>;
 246                                         gpio-ranges = <&ap_pinctrl 0 0 20>;
 247                                 };
 248                         };
 249
 250                         ap_thermal: thermal@6f808c {
 251                                 compatible = "marvell,armada-ap806-thermal";
 252                                 reg = <0x6f808c 0x4>,
 253                                       <0x6f8084 0x8>;
 254                         };
 255                 };
 256         };
 257 };