arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts

   1 /*
   2  * DTS File for HiSilicon Poplar Development Board
   3  *
   4  * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
   5  *
   6  * Released under the GPLv2 only.
   7  * SPDX-License-Identifier: GPL-2.0
   8  */
   9
  10 /dts-v1/;
  11
  12 #include <dt-bindings/gpio/gpio.h>
  13 #include "hi3798cv200.dtsi"
  14 #include "poplar-pinctrl.dtsi"
  15
  16 / {
  17         model = "HiSilicon Poplar Development Board";
  18         compatible = "hisilicon,hi3798cv200-poplar", "hisilicon,hi3798cv200";
  19
  20         aliases {
  21                 serial0 = &uart0;
  22                 serial2 = &uart2;
  23         };
  24
  25         chosen {
  26                 stdout-path = "serial0:115200n8";
  27         };
  28
  29         memory@0 {
  30                 device_type = "memory";
  31                 reg = <0x0 0x0 0x0 0x80000000>;
  32         };
  33
  34         leds {
  35                 compatible = "gpio-leds";
  36
  37                 user-led0 {
  38                         label = "USER-LED0";
  39                         gpios = <&gpio6 3 GPIO_ACTIVE_LOW>;
  40                         linux,default-trigger = "heartbeat";
  41                         default-state = "off";
  42                 };
  43
  44                 user-led1 {
  45                         label = "USER-LED1";
  46                         gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
  47                         linux,default-trigger = "mmc0";
  48                         default-state = "off";
  49                 };
  50
  51                 user-led2 {
  52                         label = "USER-LED2";
  53                         gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
  54                         linux,default-trigger = "none";
  55                         default-state = "off";
  56                 };
  57
  58                 user-led3 {
  59                         label = "USER-LED3";
  60                         gpios = <&gpio10 6 GPIO_ACTIVE_LOW>;
  61                         linux,default-trigger = "cpu0";
  62                         default-state = "off";
  63                 };
  64         };
  65
  66         reg_pcie: regulator-pcie {
  67                 compatible = "regulator-fixed";
  68                 regulator-name = "3V3_PCIE0";
  69                 regulator-min-microvolt = <3300000>;
  70                 regulator-max-microvolt = <3300000>;
  71                 gpio = <&gpio6 7 0>;
  72                 enable-active-high;
  73         };
  74 };
  75
  76 &ehci {
  77         status = "okay";
  78 };
  79
  80 &emmc {
  81         pinctrl-names = "default";
  82         pinctrl-0 = <&emmc_pins_1 &emmc_pins_2
  83                      &emmc_pins_3 &emmc_pins_4>;
  84         fifo-depth = <256>;
  85         clock-frequency = <200000000>;
  86         cap-mmc-highspeed;
  87         mmc-ddr-1_8v;
  88         mmc-hs200-1_8v;
  89         non-removable;
  90         bus-width = <8>;
  91         status = "okay";
  92 };
  93
  94 &gmac1 {
  95         status = "okay";
  96         #address-cells = <1>;
  97         #size-cells = <0>;
  98         phy-handle = <&eth_phy1>;
  99         phy-mode = "rgmii";
 100         hisilicon,phy-reset-delays-us = <10000 10000 30000>;
 101
 102         eth_phy1: phy@3 {
 103                 reg = <3>;
 104         };
 105 };
 106
 107 &gpio1 {
 108         status = "okay";
 109         gpio-line-names = "GPIO-E",     "",
 110                           "",           "",
 111                           "",           "GPIO-F",
 112                           "",           "GPIO-J";
 113 };
 114
 115 &gpio2 {
 116         status = "okay";
 117         gpio-line-names = "GPIO-H",     "GPIO-I",
 118                           "GPIO-L",     "GPIO-G",
 119                           "GPIO-K",     "",
 120                           "",           "";
 121 };
 122
 123 &gpio3 {
 124         status = "okay";
 125         gpio-line-names = "",           "",
 126                           "",           "",
 127                           "GPIO-C",     "",
 128                           "",           "GPIO-B";
 129 };
 130
 131 &gpio4 {
 132         status = "okay";
 133         gpio-line-names = "",           "",
 134                           "",           "",
 135                           "",           "GPIO-D",
 136                           "",           "";
 137 };
 138
 139 &gpio5 {
 140         status = "okay";
 141         gpio-line-names = "",           "USER-LED-1",
 142                           "USER-LED-2", "",
 143                           "",           "GPIO-A",
 144                           "",           "";
 145 };
 146
 147 &gpio6 {
 148         status = "okay";
 149         gpio-line-names = "",           "",
 150                           "",           "USER-LED-0",
 151                           "",           "",
 152                           "",           "";
 153 };
 154
 155 &gpio10 {
 156         status = "okay";
 157         gpio-line-names = "",           "",
 158                           "",           "",
 159                           "",           "",
 160                           "USER-LED-3", "";
 161 };
 162
 163 &i2c0 {
 164         status = "okay";
 165         label = "LS-I2C0";
 166 };
 167
 168 &i2c2 {
 169         status = "okay";
 170         label = "LS-I2C1";
 171 };
 172
 173 &ir {
 174         status = "okay";
 175 };
 176
 177 &ohci {
 178         status = "okay";
 179 };
 180
 181 &pcie {
 182         reset-gpios = <&gpio4 4 GPIO_ACTIVE_HIGH>;
 183         vpcie-supply = <&reg_pcie>;
 184         status = "okay";
 185 };
 186
 187 &sd0 {
 188         bus-width = <4>;
 189         cap-sd-highspeed;
 190         status = "okay";
 191 };
 192
 193 &spi0 {
 194         status = "okay";
 195         label = "LS-SPI0";
 196 };
 197
 198 &uart0 {
 199         status = "okay";
 200 };
 201
 202 &uart2 {
 203         status = "okay";
 204         label = "LS-UART0";
 205 };
 206 /* No optional LS-UART1 on Low Speed Expansion Connector. */