arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Device Tree file for NXP LS1028A RDB Board.
   4  *
   5  * Copyright 2018 NXP
   6  *
   7  * Harninder Rai <harninder.rai@nxp.com>
   8  *
   9  */
  10
  11 /dts-v1/;
  12 #include "fsl-ls1028a.dtsi"
  13
  14 / {
  15         model = "LS1028A RDB Board";
  16         compatible = "fsl,ls1028a-rdb", "fsl,ls1028a";
  17
  18         aliases {
  19                 crypto = &crypto;
  20                 serial0 = &duart0;
  21                 serial1 = &duart1;
  22         };
  23
  24         chosen {
  25                 stdout-path = "serial0:115200n8";
  26         };
  27
  28         memory@80000000 {
  29                 device_type = "memory";
  30                 reg = <0x0 0x80000000 0x1 0x0000000>;
  31         };
  32
  33         sys_mclk: clock-mclk {
  34                 compatible = "fixed-clock";
  35                 #clock-cells = <0>;
  36                 clock-frequency = <25000000>;
  37         };
  38
  39         reg_1p8v: regulator-1p8v {
  40                 compatible = "regulator-fixed";
  41                 regulator-name = "1P8V";
  42                 regulator-min-microvolt = <1800000>;
  43                 regulator-max-microvolt = <1800000>;
  44                 regulator-always-on;
  45         };
  46
  47         sb_3v3: regulator-sb3v3 {
  48                 compatible = "regulator-fixed";
  49                 regulator-name = "3v3_vbus";
  50                 regulator-min-microvolt = <3300000>;
  51                 regulator-max-microvolt = <3300000>;
  52                 regulator-boot-on;
  53                 regulator-always-on;
  54         };
  55
  56         sound {
  57                 compatible = "simple-audio-card";
  58                 simple-audio-card,format = "i2s";
  59                 simple-audio-card,widgets =
  60                         "Microphone", "Microphone Jack",
  61                         "Headphone", "Headphone Jack",
  62                         "Speaker", "Speaker Ext",
  63                         "Line", "Line In Jack";
  64                 simple-audio-card,routing =
  65                         "MIC_IN", "Microphone Jack",
  66                         "Microphone Jack", "Mic Bias",
  67                         "LINE_IN", "Line In Jack",
  68                         "Headphone Jack", "HP_OUT",
  69                         "Speaker Ext", "LINE_OUT";
  70
  71                 simple-audio-card,cpu {
  72                         sound-dai = <&sai4>;
  73                         frame-master;
  74                         bitclock-master;
  75                 };
  76
  77                 simple-audio-card,codec {
  78                         sound-dai = <&sgtl5000>;
  79                         frame-master;
  80                         bitclock-master;
  81                         system-clock-frequency = <25000000>;
  82                 };
  83         };
  84 };
  85
  86 &esdhc {
  87         sd-uhs-sdr104;
  88         sd-uhs-sdr50;
  89         sd-uhs-sdr25;
  90         sd-uhs-sdr12;
  91         status = "okay";
  92 };
  93
  94 &esdhc1 {
  95         mmc-hs200-1_8v;
  96         mmc-hs400-1_8v;
  97         bus-width = <8>;
  98         status = "okay";
  99 };
 100
 101 &fspi {
 102         status = "okay";
 103
 104         mt35xu02g0: flash@0 {
 105                 compatible = "jedec,spi-nor";
 106                 #address-cells = <1>;
 107                 #size-cells = <1>;
 108                 spi-max-frequency = <50000000>;
 109                 /* The following setting enables 1-1-8 (CMD-ADDR-DATA) mode */
 110                 spi-rx-bus-width = <8>; /* 8 SPI Rx lines */
 111                 spi-tx-bus-width = <1>; /* 1 SPI Tx line */
 112                 reg = <0>;
 113         };
 114 };
 115
 116 &i2c0 {
 117         status = "okay";
 118
 119         i2c-mux@77 {
 120                 compatible = "nxp,pca9847";
 121                 reg = <0x77>;
 122                 #address-cells = <1>;
 123                 #size-cells = <0>;
 124
 125                 i2c@1 {
 126                         #address-cells = <1>;
 127                         #size-cells = <0>;
 128                         reg = <0x1>;
 129
 130                         sgtl5000: audio-codec@a {
 131                                 #sound-dai-cells = <0>;
 132                                 compatible = "fsl,sgtl5000";
 133                                 reg = <0xa>;
 134                                 VDDA-supply = <&reg_1p8v>;
 135                                 VDDIO-supply = <&reg_1p8v>;
 136                                 clocks = <&sys_mclk>;
 137                                 sclk-strength = <3>;
 138                         };
 139                 };
 140
 141                 i2c@2 {
 142                         #address-cells = <1>;
 143                         #size-cells = <0>;
 144                         reg = <0x02>;
 145
 146                         current-monitor@40 {
 147                                 compatible = "ti,ina220";
 148                                 reg = <0x40>;
 149                                 shunt-resistor = <500>;
 150                         };
 151                 };
 152
 153                 i2c@3 {
 154                         #address-cells = <1>;
 155                         #size-cells = <0>;
 156                         reg = <0x3>;
 157
 158                         temperature-sensor@4c {
 159                                 compatible = "nxp,sa56004";
 160                                 reg = <0x4c>;
 161                                 vcc-supply = <&sb_3v3>;
 162                         };
 163
 164                         rtc@51 {
 165                                 compatible = "nxp,pcf2129";
 166                                 reg = <0x51>;
 167                         };
 168                 };
 169         };
 170 };
 171
 172 &duart0 {
 173         status = "okay";
 174 };
 175
 176 &duart1 {
 177         status = "okay";
 178 };
 179
 180 &enetc_port0 {
 181         phy-handle = <&sgmii_phy0>;
 182         phy-connection-type = "sgmii";
 183
 184         mdio {
 185                 #address-cells = <1>;
 186                 #size-cells = <0>;
 187                 sgmii_phy0: ethernet-phy@2 {
 188                         reg = <0x2>;
 189                 };
 190         };
 191 };
 192
 193 &enetc_port1 {
 194         status = "disabled";
 195 };
 196
 197 &sai4 {
 198         status = "okay";
 199 };
 200
 201 &sata {
 202         status = "okay";
 203 };
 204
 205 &usb1 {
 206         dr_mode = "otg";
 207 };