arch/arm64/boot/dts/exynos/exynos5433-tm2.dts

   1 /*
   2  * SAMSUNG Exynos5433 TM2 board device tree source
   3  *
   4  * Copyright (c) 2016 Samsung Electronics Co., Ltd.
   5  *
   6  * Device tree source file for Samsung's TM2 board which is based on
   7  * Samsung Exynos5433 SoC.
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  */
  13
  14 #include "exynos5433-tm2-common.dtsi"
  15
  16 / {
  17         model = "Samsung TM2 board";
  18         compatible = "samsung,tm2", "samsung,exynos5433";
  19 };
  20
  21 &cmu_disp {
  22         /*
  23          * TM2 and TM2e differ only by DISP_PLL rate, but define all assigned
  24          * clocks properties for DISP CMU for each board to keep them together
  25          * for easier review and maintenance.
  26          */
  27         assigned-clocks = <&cmu_disp CLK_FOUT_DISP_PLL>,
  28                           <&cmu_mif CLK_DIV_SCLK_DECON_TV_ECLK>,
  29                           <&cmu_disp CLK_MOUT_ACLK_DISP_333_USER>,
  30                           <&cmu_disp CLK_MOUT_SCLK_DSIM0_USER>,
  31                           <&cmu_disp CLK_MOUT_SCLK_DSIM0>,
  32                           <&cmu_disp CLK_MOUT_SCLK_DECON_ECLK_USER>,
  33                           <&cmu_disp CLK_MOUT_SCLK_DECON_ECLK>,
  34                           <&cmu_disp CLK_MOUT_PHYCLK_MIPIDPHY0_RXCLKESC0_USER>,
  35                           <&cmu_disp CLK_MOUT_PHYCLK_MIPIDPHY0_BITCLKDIV8_USER>,
  36                           <&cmu_disp CLK_MOUT_DISP_PLL>,
  37                           <&cmu_mif CLK_MOUT_SCLK_DECON_TV_ECLK_A>,
  38                           <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK_USER>,
  39                           <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK>;
  40         assigned-clock-parents = <0>, <0>,
  41                                  <&cmu_mif CLK_ACLK_DISP_333>,
  42                                  <&cmu_mif CLK_SCLK_DSIM0_DISP>,
  43                                  <&cmu_disp CLK_MOUT_SCLK_DSIM0_USER>,
  44                                  <&cmu_mif CLK_SCLK_DECON_ECLK_DISP>,
  45                                  <&cmu_disp CLK_MOUT_SCLK_DECON_ECLK_USER>,
  46                                  <&cmu_disp CLK_PHYCLK_MIPIDPHY0_RXCLKESC0_PHY>,
  47                                  <&cmu_disp CLK_PHYCLK_MIPIDPHY0_BITCLKDIV8_PHY>,
  48                                  <&cmu_disp CLK_FOUT_DISP_PLL>,
  49                                  <&cmu_mif CLK_MOUT_BUS_PLL_DIV2>,
  50                                  <&cmu_mif CLK_SCLK_DECON_TV_ECLK_DISP>,
  51                                  <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK_USER>;
  52         assigned-clock-rates = <250000000>, <400000000>;
  53 };
  54
  55 &dsi {
  56         panel@0 {
  57                 compatible = "samsung,s6e3ha2";
  58                 reg = <0>;
  59                 vdd3-supply = <&ldo27_reg>;
  60                 vci-supply = <&ldo28_reg>;
  61                 reset-gpios = <&gpg0 0 GPIO_ACTIVE_LOW>;
  62                 enable-gpios = <&gpf1 5 GPIO_ACTIVE_HIGH>;
  63         };
  64 };
  65
  66 &hsi2c_9 {
  67         status = "okay";
  68
  69         touchkey@20 {
  70                 compatible = "cypress,tm2-touchkey";
  71                 reg = <0x20>;
  72                 interrupt-parent = <&gpa3>;
  73                 interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
  74                 vcc-supply = <&ldo32_reg>;
  75                 vdd-supply = <&ldo33_reg>;
  76         };
  77 };
  78
  79 &ldo31_reg {
  80         regulator-name = "TSP_VDD_1.85V_AP";
  81         regulator-min-microvolt = <1850000>;
  82         regulator-max-microvolt = <1850000>;
  83 };
  84
  85 &ldo38_reg {
  86         regulator-name = "VCC_3.0V_MOTOR_AP";
  87         regulator-min-microvolt = <3000000>;
  88         regulator-max-microvolt = <3000000>;
  89 };
  90
  91 &stmfts {
  92         touchscreen-size-x = <1439>;
  93         touchscreen-size-y = <2559>;
  94 };