1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2017 Amlogic, Inc. All rights reserved.
8 #include "meson-axg.dtsi"
11 compatible = "amlogic,s400", "amlogic,a113d", "amlogic,meson-axg";
12 model = "Amlogic Meson AXG S400 Development Board";
19 vddio_boot: regulator-vddio_boot {
20 compatible = "regulator-fixed";
21 regulator-name = "VDDIO_BOOT";
22 regulator-min-microvolt = <1800000>;
23 regulator-max-microvolt = <1800000>;
26 vddao_3v3: regulator-vddao_3v3 {
27 compatible = "regulator-fixed";
28 regulator-name = "VDDAO_3V3";
29 regulator-min-microvolt = <3300000>;
30 regulator-max-microvolt = <3300000>;
33 vddio_ao18: regulator-vddio_ao18 {
34 compatible = "regulator-fixed";
35 regulator-name = "VDDIO_AO18";
36 regulator-min-microvolt = <1800000>;
37 regulator-max-microvolt = <1800000>;
40 vcc_3v3: regulator-vcc_3v3 {
41 compatible = "regulator-fixed";
42 regulator-name = "VCC_3V3";
43 regulator-min-microvolt = <3300000>;
44 regulator-max-microvolt = <3300000>;
47 emmc_pwrseq: emmc-pwrseq {
48 compatible = "mmc-pwrseq-emmc";
49 reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
52 sdio_pwrseq: sdio-pwrseq {
53 compatible = "mmc-pwrseq-simple";
54 reset-gpios = <&gpio GPIOX_7 GPIO_ACTIVE_LOW>;
56 clock-names = "ext_clock";
60 compatible = "pwm-clock";
62 clock-frequency = <32768>;
63 pwms = <&pwm_ab 0 30518 0>; /* PWM_A at 32.768KHz */
69 pinctrl-0 = <ð_rgmii_y_pins>;
70 pinctrl-names = "default";
71 phy-handle = <ð_phy0>;
75 compatible = "snps,dwmac-mdio";
79 eth_phy0: ethernet-phy@0 {
80 /* Realtek RTL8211F (0x001cc916) */
89 pinctrl-0 = <&uart_a_pins>;
90 pinctrl-names = "default";
95 pinctrl-0 = <&uart_ao_a_pins>;
96 pinctrl-names = "default";
101 pinctrl-0 = <&remote_input_ao_pins>;
102 pinctrl-names = "default";
107 pinctrl-0 = <&i2c1_z_pins>;
108 pinctrl-names = "default";
113 pinctrl-0 = <&i2c_ao_sck_10_pins>, <&i2c_ao_sda_11_pins>;
114 pinctrl-names = "default";
119 pinctrl-0 = <&pwm_a_x20_pins>;
120 pinctrl-names = "default";
126 pinctrl-0 = <&emmc_pins>;
127 pinctrl-1 = <&emmc_clk_gate_pins>;
128 pinctrl-names = "default", "clk-gate";
133 max-frequency = <180000000>;
139 vmmc-supply = <&vcc_3v3>;
140 vqmmc-supply = <&vddio_boot>;
146 #address-cells = <1>;
149 pinctrl-0 = <&sdio_pins>;
150 pinctrl-1 = <&sdio_clk_gate_pins>;
151 pinctrl-names = "default", "clk-gate";
155 max-frequency = <100000000>;
159 mmc-pwrseq = <&sdio_pwrseq>;
161 vmmc-supply = <&vddao_3v3>;
162 vqmmc-supply = <&vddio_boot>;
166 compatible = "brcm,bcm4329-fmac";