arch/arm/mach-rpc/dma.c

   1 /*
   2  *  linux/arch/arm/mach-rpc/dma.c
   3  *
   4  *  Copyright (C) 1998 Russell King
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  *
  10  *  DMA functions specific to RiscPC architecture
  11  */
  12 #include <linux/slab.h>
  13 #include <linux/mman.h>
  14 #include <linux/init.h>
  15 #include <linux/interrupt.h>
  16 #include <linux/dma-mapping.h>
  17 #include <linux/io.h>
  18
  19 #include <asm/page.h>
  20 #include <asm/dma.h>
  21 #include <asm/fiq.h>
  22 #include <asm/irq.h>
  23 #include <mach/hardware.h>
  24 #include <asm/uaccess.h>
  25
  26 #include <asm/mach/dma.h>
  27 #include <asm/hardware/iomd.h>
  28
  29 #if 0
  30 typedef enum {
  31         dma_size_8      = 1,
  32         dma_size_16     = 2,
  33         dma_size_32     = 4,
  34         dma_size_128    = 16
  35 } dma_size_t;
  36 #endif
  37
  38 #define TRANSFER_SIZE   2
  39
  40 #define CURA    (0)
  41 #define ENDA    (IOMD_IO0ENDA - IOMD_IO0CURA)
  42 #define CURB    (IOMD_IO0CURB - IOMD_IO0CURA)
  43 #define ENDB    (IOMD_IO0ENDB - IOMD_IO0CURA)
  44 #define CR      (IOMD_IO0CR - IOMD_IO0CURA)
  45 #define ST      (IOMD_IO0ST - IOMD_IO0CURA)
  46
  47 static void iomd_get_next_sg(struct scatterlist *sg, struct iomd_dma *idma)
  48 {
  49         unsigned long end, offset, flags = 0;
  50
  51         if (idma->dma.sg) {
  52                 sg->dma_address = idma->dma.sg->dma_address;
  53                 offset = sg->dma_address & ~PAGE_MASK;
  54
  55                 end = offset + idma->dma.sg->length;
  56
  57                 if (end > PAGE_SIZE)
  58                         end = PAGE_SIZE;
  59
  60                 if (offset + TRANSFER_SIZE >= end)
  61                         flags |= DMA_END_L;
  62
  63                 sg->length = end - TRANSFER_SIZE;
  64
  65                 idma->dma.sg->length -= end - offset;
  66                 idma->dma.sg->dma_address += end - offset;
  67
  68                 if (idma->dma.sg->length == 0) {
  69                         if (idma->dma.sgcount > 1) {
  70                                 idma->dma.sg = sg_next(idma->dma.sg);
  71                                 idma->dma.sgcount--;
  72                         } else {
  73                                 idma->dma.sg = NULL;
  74                                 flags |= DMA_END_S;
  75                         }
  76                 }
  77         } else {
  78                 flags = DMA_END_S | DMA_END_L;
  79                 sg->dma_address = 0;
  80                 sg->length = 0;
  81         }
  82
  83         sg->length |= flags;
  84 }
  85
  86 static irqreturn_t iomd_dma_handle(int irq, void *dev_id)
  87 {
  88         struct iomd_dma *idma = dev_id;
  89         unsigned long base = idma->base;
  90
  91         do {
  92                 unsigned int status;
  93
  94                 status = iomd_readb(base + ST);
  95                 if (!(status & DMA_ST_INT))
  96                         return IRQ_HANDLED;
  97
  98                 if ((idma->state ^ status) & DMA_ST_AB)
  99                         iomd_get_next_sg(&idma->cur_sg, idma);
 100
 101                 switch (status & (DMA_ST_OFL | DMA_ST_AB)) {
 102                 case DMA_ST_OFL:                        /* OIA */
 103                 case DMA_ST_AB:                         /* .IB */
 104                         iomd_writel(idma->cur_sg.dma_address, base + CURA);
 105                         iomd_writel(idma->cur_sg.length, base + ENDA);
 106                         idma->state = DMA_ST_AB;
 107                         break;
 108
 109                 case DMA_ST_OFL | DMA_ST_AB:            /* OIB */
 110                 case 0:                                 /* .IA */
 111                         iomd_writel(idma->cur_sg.dma_address, base + CURB);
 112                         iomd_writel(idma->cur_sg.length, base + ENDB);
 113                         idma->state = 0;
 114                         break;
 115                 }
 116
 117                 if (status & DMA_ST_OFL &&
 118                     idma->cur_sg.length == (DMA_END_S|DMA_END_L))
 119                         break;
 120         } while (1);
 121
 122         idma->state = ~DMA_ST_AB;
 123         disable_irq(irq);
 124
 125         return IRQ_HANDLED;
 126 }
 127
 128 static int iomd_request_dma(unsigned int chan, dma_t *dma)
 129 {
 130         struct iomd_dma *idma = container_of(dma, struct iomd_dma, dma);
 131
 132         return request_irq(idma->irq, iomd_dma_handle,
 133                            IRQF_DISABLED, idma->dma.device_id, idma);
 134 }
 135
 136 static void iomd_free_dma(unsigned int chan, dma_t *dma)
 137 {
 138         struct iomd_dma *idma = container_of(dma, struct iomd_dma, dma);
 139
 140         free_irq(idma->irq, idma);
 141 }
 142
 143 static void iomd_enable_dma(unsigned int chan, dma_t *dma)
 144 {
 145         struct iomd_dma *idma = container_of(dma, struct iomd_dma, dma);
 146         unsigned long dma_base = idma->base;
 147         unsigned int ctrl = TRANSFER_SIZE | DMA_CR_E;
 148
 149         if (idma->dma.invalid) {
 150                 idma->dma.invalid = 0;
 151
 152                 /*
 153                  * Cope with ISA-style drivers which expect cache
 154                  * coherence.
 155                  */
 156                 if (!idma->dma.sg) {
 157                         idma->dma.sg = &idma->dma.buf;
 158                         idma->dma.sgcount = 1;
 159                         idma->dma.buf.length = idma->dma.count;
 160                         idma->dma.buf.dma_address = dma_map_single(NULL,
 161                                 idma->dma.addr, idma->dma.count,
 162                                 idma->dma.dma_mode == DMA_MODE_READ ?
 163                                 DMA_FROM_DEVICE : DMA_TO_DEVICE);
 164                 }
 165
 166                 iomd_writeb(DMA_CR_C, dma_base + CR);
 167                 idma->state = DMA_ST_AB;
 168         }
 169
 170         if (idma->dma.dma_mode == DMA_MODE_READ)
 171                 ctrl |= DMA_CR_D;
 172
 173         iomd_writeb(ctrl, dma_base + CR);
 174         enable_irq(idma->irq);
 175 }
 176
 177 static void iomd_disable_dma(unsigned int chan, dma_t *dma)
 178 {
 179         struct iomd_dma *idma = container_of(dma, struct iomd_dma, dma);
 180         unsigned long dma_base = idma->base;
 181         unsigned long flags;
 182
 183         local_irq_save(flags);
 184         if (idma->state != ~DMA_ST_AB)
 185                 disable_irq(idma->irq);
 186         iomd_writeb(0, dma_base + CR);
 187         local_irq_restore(flags);
 188 }
 189
 190 static int iomd_set_dma_speed(unsigned int chan, dma_t *dma, int cycle)
 191 {
 192         int tcr, speed;
 193
 194         if (cycle < 188)
 195                 speed = 3;
 196         else if (cycle <= 250)
 197                 speed = 2;
 198         else if (cycle < 438)
 199                 speed = 1;
 200         else
 201                 speed = 0;
 202
 203         tcr = iomd_readb(IOMD_DMATCR);
 204         speed &= 3;
 205
 206         switch (chan) {
 207         case DMA_0:
 208                 tcr = (tcr & ~0x03) | speed;
 209                 break;
 210
 211         case DMA_1:
 212                 tcr = (tcr & ~0x0c) | (speed << 2);
 213                 break;
 214
 215         case DMA_2:
 216                 tcr = (tcr & ~0x30) | (speed << 4);
 217                 break;
 218
 219         case DMA_3:
 220                 tcr = (tcr & ~0xc0) | (speed << 6);
 221                 break;
 222
 223         default:
 224                 break;
 225         }
 226
 227         iomd_writeb(tcr, IOMD_DMATCR);
 228
 229         return speed;
 230 }
 231
 232 static struct dma_ops iomd_dma_ops = {
 233         .type           = "IOMD",
 234         .request        = iomd_request_dma,
 235         .free           = iomd_free_dma,
 236         .enable         = iomd_enable_dma,
 237         .disable        = iomd_disable_dma,
 238         .setspeed       = iomd_set_dma_speed,
 239 };
 240
 241 static struct fiq_handler fh = {
 242         .name   = "floppydma"
 243 };
 244
 245 static void floppy_enable_dma(unsigned int chan, dma_t *dma)
 246 {
 247         struct floppy_dma *fdma = container_of(dma, struct floppy_dma, dma);
 248         void *fiqhandler_start;
 249         unsigned int fiqhandler_length;
 250         struct pt_regs regs;
 251
 252         if (fdma->dma.sg)
 253                 BUG();
 254
 255         if (fdma->dma.dma_mode == DMA_MODE_READ) {
 256                 extern unsigned char floppy_fiqin_start, floppy_fiqin_end;
 257                 fiqhandler_start = &floppy_fiqin_start;
 258                 fiqhandler_length = &floppy_fiqin_end - &floppy_fiqin_start;
 259         } else {
 260                 extern unsigned char floppy_fiqout_start, floppy_fiqout_end;
 261                 fiqhandler_start = &floppy_fiqout_start;
 262                 fiqhandler_length = &floppy_fiqout_end - &floppy_fiqout_start;
 263         }
 264
 265         regs.ARM_r9  = fdma->dma.count;
 266         regs.ARM_r10 = (unsigned long)fdma->dma.addr;
 267         regs.ARM_fp  = (unsigned long)FLOPPYDMA_BASE;
 268
 269         if (claim_fiq(&fh)) {
 270                 printk("floppydma: couldn't claim FIQ.\n");
 271                 return;
 272         }
 273
 274         set_fiq_handler(fiqhandler_start, fiqhandler_length);
 275         set_fiq_regs(&regs);
 276         enable_fiq(fdma->fiq);
 277 }
 278
 279 static void floppy_disable_dma(unsigned int chan, dma_t *dma)
 280 {
 281         struct floppy_dma *fdma = container_of(dma, struct floppy_dma, dma);
 282         disable_fiq(fdma->fiq);
 283         release_fiq(&fh);
 284 }
 285
 286 static int floppy_get_residue(unsigned int chan, dma_t *dma)
 287 {
 288         struct pt_regs regs;
 289         get_fiq_regs(&regs);
 290         return regs.ARM_r9;
 291 }
 292
 293 static struct dma_ops floppy_dma_ops = {
 294         .type           = "FIQDMA",
 295         .enable         = floppy_enable_dma,
 296         .disable        = floppy_disable_dma,
 297         .residue        = floppy_get_residue,
 298 };
 299
 300 /*
 301  * This is virtual DMA - we don't need anything here.
 302  */
 303 static void sound_enable_disable_dma(unsigned int chan, dma_t *dma)
 304 {
 305 }
 306
 307 static struct dma_ops sound_dma_ops = {
 308         .type           = "VIRTUAL",
 309         .enable         = sound_enable_disable_dma,
 310         .disable        = sound_enable_disable_dma,
 311 };
 312
 313 static struct iomd_dma iomd_dma[6];
 314
 315 static struct floppy_dma floppy_dma = {
 316         .dma            = {
 317                 .d_ops  = &floppy_dma_ops,
 318         },
 319         .fiq            = FIQ_FLOPPYDATA,
 320 };
 321
 322 static dma_t sound_dma = {
 323         .d_ops          = &sound_dma_ops,
 324 };
 325
 326 static int __init rpc_dma_init(void)
 327 {
 328         unsigned int i;
 329         int ret;
 330
 331         iomd_writeb(0, IOMD_IO0CR);
 332         iomd_writeb(0, IOMD_IO1CR);
 333         iomd_writeb(0, IOMD_IO2CR);
 334         iomd_writeb(0, IOMD_IO3CR);
 335
 336         iomd_writeb(0xa0, IOMD_DMATCR);
 337
 338         /*
 339          * Setup DMA channels 2,3 to be for podules
 340          * and channels 0,1 for internal devices
 341          */
 342         iomd_writeb(DMA_EXT_IO3|DMA_EXT_IO2, IOMD_DMAEXT);
 343
 344         iomd_dma[DMA_0].base    = IOMD_IO0CURA;
 345         iomd_dma[DMA_0].irq     = IRQ_DMA0;
 346         iomd_dma[DMA_1].base    = IOMD_IO1CURA;
 347         iomd_dma[DMA_1].irq     = IRQ_DMA1;
 348         iomd_dma[DMA_2].base    = IOMD_IO2CURA;
 349         iomd_dma[DMA_2].irq     = IRQ_DMA2;
 350         iomd_dma[DMA_3].base    = IOMD_IO3CURA;
 351         iomd_dma[DMA_3].irq     = IRQ_DMA3;
 352         iomd_dma[DMA_S0].base   = IOMD_SD0CURA;
 353         iomd_dma[DMA_S0].irq    = IRQ_DMAS0;
 354         iomd_dma[DMA_S1].base   = IOMD_SD1CURA;
 355         iomd_dma[DMA_S1].irq    = IRQ_DMAS1;
 356
 357         for (i = DMA_0; i <= DMA_S1; i++) {
 358                 iomd_dma[i].dma.d_ops = &iomd_dma_ops;
 359
 360                 ret = isa_dma_add(i, &iomd_dma[i].dma);
 361                 if (ret)
 362                         printk("IOMDDMA%u: unable to register: %d\n", i, ret);
 363         }
 364
 365         ret = isa_dma_add(DMA_VIRTUAL_FLOPPY, &floppy_dma.dma);
 366         if (ret)
 367                 printk("IOMDFLOPPY: unable to register: %d\n", ret);
 368         ret = isa_dma_add(DMA_VIRTUAL_SOUND, &sound_dma);
 369         if (ret)
 370                 printk("IOMDSOUND: unable to register: %d\n", ret);
 371         return 0;
 372 }
 373 core_initcall(rpc_dma_init);