arch/arm/mach-pxa/zeus.c

   1 /*
   2  *  Support for the Arcom ZEUS.
   3  *
   4  *  Copyright (C) 2006 Arcom Control Systems Ltd.
   5  *
   6  *  Loosely based on Arcom's 2.6.16.28.
   7  *  Maintained by Marc Zyngier <maz@misterjones.org>
   8  *
   9  *  This program is free software; you can redistribute it and/or modify
  10  *  it under the terms of the GNU General Public License version 2 as
  11  *  published by the Free Software Foundation.
  12  */
  13
  14 #include <linux/cpufreq.h>
  15 #include <linux/interrupt.h>
  16 #include <linux/leds.h>
  17 #include <linux/irq.h>
  18 #include <linux/pm.h>
  19 #include <linux/gpio.h>
  20 #include <linux/gpio/machine.h>
  21 #include <linux/serial_8250.h>
  22 #include <linux/dm9000.h>
  23 #include <linux/mmc/host.h>
  24 #include <linux/spi/spi.h>
  25 #include <linux/spi/pxa2xx_spi.h>
  26 #include <linux/mtd/mtd.h>
  27 #include <linux/mtd/partitions.h>
  28 #include <linux/mtd/physmap.h>
  29 #include <linux/i2c.h>
  30 #include <linux/platform_data/i2c-pxa.h>
  31 #include <linux/platform_data/pca953x.h>
  32 #include <linux/apm-emulation.h>
  33 #include <linux/can/platform/mcp251x.h>
  34 #include <linux/regulator/fixed.h>
  35 #include <linux/regulator/machine.h>
  36
  37 #include <asm/mach-types.h>
  38 #include <asm/suspend.h>
  39 #include <asm/system_info.h>
  40 #include <asm/mach/arch.h>
  41 #include <asm/mach/map.h>
  42
  43 #include "pxa27x.h"
  44 #include "devices.h"
  45 #include <mach/regs-uart.h>
  46 #include <linux/platform_data/usb-ohci-pxa27x.h>
  47 #include <linux/platform_data/mmc-pxamci.h>
  48 #include "pxa27x-udc.h"
  49 #include "udc.h"
  50 #include <linux/platform_data/video-pxafb.h>
  51 #include "pm.h"
  52 #include <mach/audio.h>
  53 #include <linux/platform_data/pcmcia-pxa2xx_viper.h>
  54 #include "zeus.h"
  55 #include <mach/smemc.h>
  56
  57 #include "generic.h"
  58
  59 /*
  60  * Interrupt handling
  61  */
  62
  63 static unsigned long zeus_irq_enabled_mask;
  64 static const int zeus_isa_irqs[] = { 3, 4, 5, 6, 7, 10, 11, 12, };
  65 static const int zeus_isa_irq_map[] = {
  66         0,              /* ISA irq #0, invalid */
  67         0,              /* ISA irq #1, invalid */
  68         0,              /* ISA irq #2, invalid */
  69         1 << 0,         /* ISA irq #3 */
  70         1 << 1,         /* ISA irq #4 */
  71         1 << 2,         /* ISA irq #5 */
  72         1 << 3,         /* ISA irq #6 */
  73         1 << 4,         /* ISA irq #7 */
  74         0,              /* ISA irq #8, invalid */
  75         0,              /* ISA irq #9, invalid */
  76         1 << 5,         /* ISA irq #10 */
  77         1 << 6,         /* ISA irq #11 */
  78         1 << 7,         /* ISA irq #12 */
  79 };
  80
  81 static inline int zeus_irq_to_bitmask(unsigned int irq)
  82 {
  83         return zeus_isa_irq_map[irq - PXA_ISA_IRQ(0)];
  84 }
  85
  86 static inline int zeus_bit_to_irq(int bit)
  87 {
  88         return zeus_isa_irqs[bit] + PXA_ISA_IRQ(0);
  89 }
  90
  91 static void zeus_ack_irq(struct irq_data *d)
  92 {
  93         __raw_writew(zeus_irq_to_bitmask(d->irq), ZEUS_CPLD_ISA_IRQ);
  94 }
  95
  96 static void zeus_mask_irq(struct irq_data *d)
  97 {
  98         zeus_irq_enabled_mask &= ~(zeus_irq_to_bitmask(d->irq));
  99 }
 100
 101 static void zeus_unmask_irq(struct irq_data *d)
 102 {
 103         zeus_irq_enabled_mask |= zeus_irq_to_bitmask(d->irq);
 104 }
 105
 106 static inline unsigned long zeus_irq_pending(void)
 107 {
 108         return __raw_readw(ZEUS_CPLD_ISA_IRQ) & zeus_irq_enabled_mask;
 109 }
 110
 111 static void zeus_irq_handler(struct irq_desc *desc)
 112 {
 113         unsigned int irq;
 114         unsigned long pending;
 115
 116         pending = zeus_irq_pending();
 117         do {
 118                 /* we're in a chained irq handler,
 119                  * so ack the interrupt by hand */
 120                 desc->irq_data.chip->irq_ack(&desc->irq_data);
 121
 122                 if (likely(pending)) {
 123                         irq = zeus_bit_to_irq(__ffs(pending));
 124                         generic_handle_irq(irq);
 125                 }
 126                 pending = zeus_irq_pending();
 127         } while (pending);
 128 }
 129
 130 static struct irq_chip zeus_irq_chip = {
 131         .name           = "ISA",
 132         .irq_ack        = zeus_ack_irq,
 133         .irq_mask       = zeus_mask_irq,
 134         .irq_unmask     = zeus_unmask_irq,
 135 };
 136
 137 static void __init zeus_init_irq(void)
 138 {
 139         int level;
 140         int isa_irq;
 141
 142         pxa27x_init_irq();
 143
 144         /* Peripheral IRQs. It would be nice to move those inside driver
 145            configuration, but it is not supported at the moment. */
 146         irq_set_irq_type(gpio_to_irq(ZEUS_AC97_GPIO), IRQ_TYPE_EDGE_RISING);
 147         irq_set_irq_type(gpio_to_irq(ZEUS_WAKEUP_GPIO), IRQ_TYPE_EDGE_RISING);
 148         irq_set_irq_type(gpio_to_irq(ZEUS_PTT_GPIO), IRQ_TYPE_EDGE_RISING);
 149         irq_set_irq_type(gpio_to_irq(ZEUS_EXTGPIO_GPIO),
 150                          IRQ_TYPE_EDGE_FALLING);
 151         irq_set_irq_type(gpio_to_irq(ZEUS_CAN_GPIO), IRQ_TYPE_EDGE_FALLING);
 152
 153         /* Setup ISA IRQs */
 154         for (level = 0; level < ARRAY_SIZE(zeus_isa_irqs); level++) {
 155                 isa_irq = zeus_bit_to_irq(level);
 156                 irq_set_chip_and_handler(isa_irq, &zeus_irq_chip,
 157                                          handle_edge_irq);
 158                 irq_clear_status_flags(isa_irq, IRQ_NOREQUEST | IRQ_NOPROBE);
 159         }
 160
 161         irq_set_irq_type(gpio_to_irq(ZEUS_ISA_GPIO), IRQ_TYPE_EDGE_RISING);
 162         irq_set_chained_handler(gpio_to_irq(ZEUS_ISA_GPIO), zeus_irq_handler);
 163 }
 164
 165
 166 /*
 167  * Platform devices
 168  */
 169
 170 /* Flash */
 171 static struct resource zeus_mtd_resources[] = {
 172         [0] = { /* NOR Flash (up to 64MB) */
 173                 .start  = ZEUS_FLASH_PHYS,
 174                 .end    = ZEUS_FLASH_PHYS + SZ_64M - 1,
 175                 .flags  = IORESOURCE_MEM,
 176         },
 177         [1] = { /* SRAM */
 178                 .start  = ZEUS_SRAM_PHYS,
 179                 .end    = ZEUS_SRAM_PHYS + SZ_512K - 1,
 180                 .flags  = IORESOURCE_MEM,
 181         },
 182 };
 183
 184 static struct physmap_flash_data zeus_flash_data[] = {
 185         [0] = {
 186                 .width          = 2,
 187                 .parts          = NULL,
 188                 .nr_parts       = 0,
 189         },
 190 };
 191
 192 static struct platform_device zeus_mtd_devices[] = {
 193         [0] = {
 194                 .name           = "physmap-flash",
 195                 .id             = 0,
 196                 .dev            = {
 197                         .platform_data = &zeus_flash_data[0],
 198                 },
 199                 .resource       = &zeus_mtd_resources[0],
 200                 .num_resources  = 1,
 201         },
 202 };
 203
 204 /* Serial */
 205 static struct resource zeus_serial_resources[] = {
 206         {
 207                 .start  = 0x10000000,
 208                 .end    = 0x1000000f,
 209                 .flags  = IORESOURCE_MEM,
 210         },
 211         {
 212                 .start  = 0x10800000,
 213                 .end    = 0x1080000f,
 214                 .flags  = IORESOURCE_MEM,
 215         },
 216         {
 217                 .start  = 0x11000000,
 218                 .end    = 0x1100000f,
 219                 .flags  = IORESOURCE_MEM,
 220         },
 221         {
 222                 .start  = 0x40100000,
 223                 .end    = 0x4010001f,
 224                 .flags  = IORESOURCE_MEM,
 225         },
 226         {
 227                 .start  = 0x40200000,
 228                 .end    = 0x4020001f,
 229                 .flags  = IORESOURCE_MEM,
 230         },
 231         {
 232                 .start  = 0x40700000,
 233                 .end    = 0x4070001f,
 234                 .flags  = IORESOURCE_MEM,
 235         },
 236 };
 237
 238 static struct plat_serial8250_port serial_platform_data[] = {
 239         /* External UARTs */
 240         /* FIXME: Shared IRQs on COM1-COM4 will not work properly on v1i1 hardware. */
 241         { /* COM1 */
 242                 .mapbase        = 0x10000000,
 243                 .irq            = PXA_GPIO_TO_IRQ(ZEUS_UARTA_GPIO),
 244                 .irqflags       = IRQF_TRIGGER_RISING,
 245                 .uartclk        = 14745600,
 246                 .regshift       = 1,
 247                 .flags          = UPF_IOREMAP | UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
 248                 .iotype         = UPIO_MEM,
 249         },
 250         { /* COM2 */
 251                 .mapbase        = 0x10800000,
 252                 .irq            = PXA_GPIO_TO_IRQ(ZEUS_UARTB_GPIO),
 253                 .irqflags       = IRQF_TRIGGER_RISING,
 254                 .uartclk        = 14745600,
 255                 .regshift       = 1,
 256                 .flags          = UPF_IOREMAP | UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
 257                 .iotype         = UPIO_MEM,
 258         },
 259         { /* COM3 */
 260                 .mapbase        = 0x11000000,
 261                 .irq            = PXA_GPIO_TO_IRQ(ZEUS_UARTC_GPIO),
 262                 .irqflags       = IRQF_TRIGGER_RISING,
 263                 .uartclk        = 14745600,
 264                 .regshift       = 1,
 265                 .flags          = UPF_IOREMAP | UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
 266                 .iotype         = UPIO_MEM,
 267         },
 268         { /* COM4 */
 269                 .mapbase        = 0x11800000,
 270                 .irq            = PXA_GPIO_TO_IRQ(ZEUS_UARTD_GPIO),
 271                 .irqflags       = IRQF_TRIGGER_RISING,
 272                 .uartclk        = 14745600,
 273                 .regshift       = 1,
 274                 .flags          = UPF_IOREMAP | UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
 275                 .iotype         = UPIO_MEM,
 276         },
 277         /* Internal UARTs */
 278         { /* FFUART */
 279                 .membase        = (void *)&FFUART,
 280                 .mapbase        = __PREG(FFUART),
 281                 .irq            = IRQ_FFUART,
 282                 .uartclk        = 921600 * 16,
 283                 .regshift       = 2,
 284                 .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
 285                 .iotype         = UPIO_MEM,
 286         },
 287         { /* BTUART */
 288                 .membase        = (void *)&BTUART,
 289                 .mapbase        = __PREG(BTUART),
 290                 .irq            = IRQ_BTUART,
 291                 .uartclk        = 921600 * 16,
 292                 .regshift       = 2,
 293                 .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
 294                 .iotype         = UPIO_MEM,
 295         },
 296         { /* STUART */
 297                 .membase        = (void *)&STUART,
 298                 .mapbase        = __PREG(STUART),
 299                 .irq            = IRQ_STUART,
 300                 .uartclk        = 921600 * 16,
 301                 .regshift       = 2,
 302                 .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
 303                 .iotype         = UPIO_MEM,
 304         },
 305         { },
 306 };
 307
 308 static struct platform_device zeus_serial_device = {
 309         .name = "serial8250",
 310         .id   = PLAT8250_DEV_PLATFORM,
 311         .dev  = {
 312                 .platform_data = serial_platform_data,
 313         },
 314         .num_resources  = ARRAY_SIZE(zeus_serial_resources),
 315         .resource       = zeus_serial_resources,
 316 };
 317
 318 /* Ethernet */
 319 static struct resource zeus_dm9k0_resource[] = {
 320         [0] = {
 321                 .start = ZEUS_ETH0_PHYS,
 322                 .end   = ZEUS_ETH0_PHYS + 1,
 323                 .flags = IORESOURCE_MEM
 324         },
 325         [1] = {
 326                 .start = ZEUS_ETH0_PHYS + 2,
 327                 .end   = ZEUS_ETH0_PHYS + 3,
 328                 .flags = IORESOURCE_MEM
 329         },
 330         [2] = {
 331                 .start = PXA_GPIO_TO_IRQ(ZEUS_ETH0_GPIO),
 332                 .end   = PXA_GPIO_TO_IRQ(ZEUS_ETH0_GPIO),
 333                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
 334         },
 335 };
 336
 337 static struct resource zeus_dm9k1_resource[] = {
 338         [0] = {
 339                 .start = ZEUS_ETH1_PHYS,
 340                 .end   = ZEUS_ETH1_PHYS + 1,
 341                 .flags = IORESOURCE_MEM
 342         },
 343         [1] = {
 344                 .start = ZEUS_ETH1_PHYS + 2,
 345                 .end   = ZEUS_ETH1_PHYS + 3,
 346                 .flags = IORESOURCE_MEM,
 347         },
 348         [2] = {
 349                 .start = PXA_GPIO_TO_IRQ(ZEUS_ETH1_GPIO),
 350                 .end   = PXA_GPIO_TO_IRQ(ZEUS_ETH1_GPIO),
 351                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
 352         },
 353 };
 354
 355 static struct dm9000_plat_data zeus_dm9k_platdata = {
 356         .flags          = DM9000_PLATF_16BITONLY,
 357 };
 358
 359 static struct platform_device zeus_dm9k0_device = {
 360         .name           = "dm9000",
 361         .id             = 0,
 362         .num_resources  = ARRAY_SIZE(zeus_dm9k0_resource),
 363         .resource       = zeus_dm9k0_resource,
 364         .dev            = {
 365                 .platform_data = &zeus_dm9k_platdata,
 366         }
 367 };
 368
 369 static struct platform_device zeus_dm9k1_device = {
 370         .name           = "dm9000",
 371         .id             = 1,
 372         .num_resources  = ARRAY_SIZE(zeus_dm9k1_resource),
 373         .resource       = zeus_dm9k1_resource,
 374         .dev            = {
 375                 .platform_data = &zeus_dm9k_platdata,
 376         }
 377 };
 378
 379 /* External SRAM */
 380 static struct resource zeus_sram_resource = {
 381         .start          = ZEUS_SRAM_PHYS,
 382         .end            = ZEUS_SRAM_PHYS + ZEUS_SRAM_SIZE * 2 - 1,
 383         .flags          = IORESOURCE_MEM,
 384 };
 385
 386 static struct platform_device zeus_sram_device = {
 387         .name           = "pxa2xx-8bit-sram",
 388         .id             = 0,
 389         .num_resources  = 1,
 390         .resource       = &zeus_sram_resource,
 391 };
 392
 393 /* SPI interface on SSP3 */
 394 static struct pxa2xx_spi_master pxa2xx_spi_ssp3_master_info = {
 395         .num_chipselect = 1,
 396         .enable_dma     = 1,
 397 };
 398
 399 /* CAN bus on SPI */
 400 static struct regulator_consumer_supply can_regulator_consumer =
 401         REGULATOR_SUPPLY("vdd", "spi3.0");
 402
 403 static struct regulator_init_data can_regulator_init_data = {
 404         .constraints    = {
 405                 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
 406         },
 407         .consumer_supplies      = &can_regulator_consumer,
 408         .num_consumer_supplies  = 1,
 409 };
 410
 411 static struct fixed_voltage_config can_regulator_pdata = {
 412         .supply_name    = "CAN_SHDN",
 413         .microvolts     = 3300000,
 414         .init_data      = &can_regulator_init_data,
 415 };
 416
 417 static struct platform_device can_regulator_device = {
 418         .name   = "reg-fixed-voltage",
 419         .id     = 0,
 420         .dev    = {
 421                 .platform_data  = &can_regulator_pdata,
 422         },
 423 };
 424
 425 static struct gpiod_lookup_table can_regulator_gpiod_table = {
 426         .dev_id = "reg-fixed-voltage.0",
 427         .table = {
 428                 GPIO_LOOKUP("gpio-pxa", ZEUS_CAN_SHDN_GPIO,
 429                             NULL, GPIO_ACTIVE_HIGH),
 430                 { },
 431         },
 432 };
 433
 434 static struct mcp251x_platform_data zeus_mcp2515_pdata = {
 435         .oscillator_frequency   = 16*1000*1000,
 436 };
 437
 438 static struct spi_board_info zeus_spi_board_info[] = {
 439         [0] = {
 440                 .modalias       = "mcp2515",
 441                 .platform_data  = &zeus_mcp2515_pdata,
 442                 .irq            = PXA_GPIO_TO_IRQ(ZEUS_CAN_GPIO),
 443                 .max_speed_hz   = 1*1000*1000,
 444                 .bus_num        = 3,
 445                 .mode           = SPI_MODE_0,
 446                 .chip_select    = 0,
 447         },
 448 };
 449
 450 /* Leds */
 451 static struct gpio_led zeus_leds[] = {
 452         [0] = {
 453                 .name            = "zeus:yellow:1",
 454                 .default_trigger = "heartbeat",
 455                 .gpio            = ZEUS_EXT0_GPIO(3),
 456                 .active_low      = 1,
 457         },
 458         [1] = {
 459                 .name            = "zeus:yellow:2",
 460                 .default_trigger = "default-on",
 461                 .gpio            = ZEUS_EXT0_GPIO(4),
 462                 .active_low      = 1,
 463         },
 464         [2] = {
 465                 .name            = "zeus:yellow:3",
 466                 .default_trigger = "default-on",
 467                 .gpio            = ZEUS_EXT0_GPIO(5),
 468                 .active_low      = 1,
 469         },
 470 };
 471
 472 static struct gpio_led_platform_data zeus_leds_info = {
 473         .leds           = zeus_leds,
 474         .num_leds       = ARRAY_SIZE(zeus_leds),
 475 };
 476
 477 static struct platform_device zeus_leds_device = {
 478         .name           = "leds-gpio",
 479         .id             = -1,
 480         .dev            = {
 481                 .platform_data  = &zeus_leds_info,
 482         },
 483 };
 484
 485 static void zeus_cf_reset(int state)
 486 {
 487         u16 cpld_state = __raw_readw(ZEUS_CPLD_CONTROL);
 488
 489         if (state)
 490                 cpld_state |= ZEUS_CPLD_CONTROL_CF_RST;
 491         else
 492                 cpld_state &= ~ZEUS_CPLD_CONTROL_CF_RST;
 493
 494         __raw_writew(cpld_state, ZEUS_CPLD_CONTROL);
 495 }
 496
 497 static struct arcom_pcmcia_pdata zeus_pcmcia_info = {
 498         .cd_gpio        = ZEUS_CF_CD_GPIO,
 499         .rdy_gpio       = ZEUS_CF_RDY_GPIO,
 500         .pwr_gpio       = ZEUS_CF_PWEN_GPIO,
 501         .reset          = zeus_cf_reset,
 502 };
 503
 504 static struct platform_device zeus_pcmcia_device = {
 505         .name           = "zeus-pcmcia",
 506         .id             = -1,
 507         .dev            = {
 508                 .platform_data  = &zeus_pcmcia_info,
 509         },
 510 };
 511
 512 static struct resource zeus_max6369_resource = {
 513         .start          = ZEUS_CPLD_EXTWDOG_PHYS,
 514         .end            = ZEUS_CPLD_EXTWDOG_PHYS,
 515         .flags          = IORESOURCE_MEM,
 516 };
 517
 518 struct platform_device zeus_max6369_device = {
 519         .name           = "max6369_wdt",
 520         .id             = -1,
 521         .resource       = &zeus_max6369_resource,
 522         .num_resources  = 1,
 523 };
 524
 525 /* AC'97 */
 526 static pxa2xx_audio_ops_t zeus_ac97_info = {
 527         .reset_gpio = 95,
 528 };
 529
 530
 531 /*
 532  * USB host
 533  */
 534
 535 static struct regulator_consumer_supply zeus_ohci_regulator_supplies[] = {
 536         REGULATOR_SUPPLY("vbus2", "pxa27x-ohci"),
 537 };
 538
 539 static struct regulator_init_data zeus_ohci_regulator_data = {
 540         .constraints = {
 541                 .valid_ops_mask         = REGULATOR_CHANGE_STATUS,
 542         },
 543         .num_consumer_supplies  = ARRAY_SIZE(zeus_ohci_regulator_supplies),
 544         .consumer_supplies      = zeus_ohci_regulator_supplies,
 545 };
 546
 547 static struct fixed_voltage_config zeus_ohci_regulator_config = {
 548         .supply_name            = "vbus2",
 549         .microvolts             = 5000000, /* 5.0V */
 550         .enable_high            = 1,
 551         .startup_delay          = 0,
 552         .init_data              = &zeus_ohci_regulator_data,
 553 };
 554
 555 static struct platform_device zeus_ohci_regulator_device = {
 556         .name           = "reg-fixed-voltage",
 557         .id             = 1,
 558         .dev = {
 559                 .platform_data = &zeus_ohci_regulator_config,
 560         },
 561 };
 562
 563 static struct gpiod_lookup_table zeus_ohci_regulator_gpiod_table = {
 564         .dev_id = "reg-fixed-voltage.0",
 565         .table = {
 566                 GPIO_LOOKUP("gpio-pxa", ZEUS_USB2_PWREN_GPIO,
 567                             NULL, GPIO_ACTIVE_HIGH),
 568                 { },
 569         },
 570 };
 571
 572 static struct pxaohci_platform_data zeus_ohci_platform_data = {
 573         .port_mode      = PMM_NPS_MODE,
 574         /* Clear Power Control Polarity Low and set Power Sense
 575          * Polarity Low. Supply power to USB ports. */
 576         .flags          = ENABLE_PORT_ALL | POWER_SENSE_LOW,
 577 };
 578
 579 static void zeus_register_ohci(void)
 580 {
 581         /* Port 2 is shared between host and client interface. */
 582         UP2OCR = UP2OCR_HXOE | UP2OCR_HXS | UP2OCR_DMPDE | UP2OCR_DPPDE;
 583
 584         pxa_set_ohci_info(&zeus_ohci_platform_data);
 585 }
 586
 587 /*
 588  * Flat Panel
 589  */
 590
 591 static void zeus_lcd_power(int on, struct fb_var_screeninfo *si)
 592 {
 593         gpio_set_value(ZEUS_LCD_EN_GPIO, on);
 594 }
 595
 596 static void zeus_backlight_power(int on)
 597 {
 598         gpio_set_value(ZEUS_BKLEN_GPIO, on);
 599 }
 600
 601 static int zeus_setup_fb_gpios(void)
 602 {
 603         int err;
 604
 605         if ((err = gpio_request(ZEUS_LCD_EN_GPIO, "LCD_EN")))
 606                 goto out_err;
 607
 608         if ((err = gpio_direction_output(ZEUS_LCD_EN_GPIO, 0)))
 609                 goto out_err_lcd;
 610
 611         if ((err = gpio_request(ZEUS_BKLEN_GPIO, "BKLEN")))
 612                 goto out_err_lcd;
 613
 614         if ((err = gpio_direction_output(ZEUS_BKLEN_GPIO, 0)))
 615                 goto out_err_bkl;
 616
 617         return 0;
 618
 619 out_err_bkl:
 620         gpio_free(ZEUS_BKLEN_GPIO);
 621 out_err_lcd:
 622         gpio_free(ZEUS_LCD_EN_GPIO);
 623 out_err:
 624         return err;
 625 }
 626
 627 static struct pxafb_mode_info zeus_fb_mode_info[] = {
 628         {
 629                 .pixclock       = 39722,
 630
 631                 .xres           = 640,
 632                 .yres           = 480,
 633
 634                 .bpp            = 16,
 635
 636                 .hsync_len      = 63,
 637                 .left_margin    = 16,
 638                 .right_margin   = 81,
 639
 640                 .vsync_len      = 2,
 641                 .upper_margin   = 12,
 642                 .lower_margin   = 31,
 643
 644                 .sync           = 0,
 645         },
 646 };
 647
 648 static struct pxafb_mach_info zeus_fb_info = {
 649         .modes                  = zeus_fb_mode_info,
 650         .num_modes              = 1,
 651         .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
 652         .pxafb_lcd_power        = zeus_lcd_power,
 653         .pxafb_backlight_power  = zeus_backlight_power,
 654 };
 655
 656 /*
 657  * MMC/SD Device
 658  *
 659  * The card detect interrupt isn't debounced so we delay it by 250ms
 660  * to give the card a chance to fully insert/eject.
 661  */
 662
 663 static struct pxamci_platform_data zeus_mci_platform_data = {
 664         .ocr_mask               = MMC_VDD_32_33|MMC_VDD_33_34,
 665         .detect_delay_ms        = 250,
 666         .gpio_card_detect       = ZEUS_MMC_CD_GPIO,
 667         .gpio_card_ro           = ZEUS_MMC_WP_GPIO,
 668         .gpio_card_ro_invert    = 1,
 669         .gpio_power             = -1
 670 };
 671
 672 /*
 673  * USB Device Controller
 674  */
 675 static void zeus_udc_command(int cmd)
 676 {
 677         switch (cmd) {
 678         case PXA2XX_UDC_CMD_DISCONNECT:
 679                 pr_info("zeus: disconnecting USB client\n");
 680                 UP2OCR = UP2OCR_HXOE | UP2OCR_HXS | UP2OCR_DMPDE | UP2OCR_DPPDE;
 681                 break;
 682
 683         case PXA2XX_UDC_CMD_CONNECT:
 684                 pr_info("zeus: connecting USB client\n");
 685                 UP2OCR = UP2OCR_HXOE | UP2OCR_DPPUE;
 686                 break;
 687         }
 688 }
 689
 690 static struct pxa2xx_udc_mach_info zeus_udc_info = {
 691         .udc_command = zeus_udc_command,
 692 };
 693
 694 static struct platform_device *zeus_devices[] __initdata = {
 695         &zeus_serial_device,
 696         &zeus_mtd_devices[0],
 697         &zeus_dm9k0_device,
 698         &zeus_dm9k1_device,
 699         &zeus_sram_device,
 700         &zeus_leds_device,
 701         &zeus_pcmcia_device,
 702         &zeus_max6369_device,
 703         &can_regulator_device,
 704         &zeus_ohci_regulator_device,
 705 };
 706
 707 #ifdef CONFIG_PM
 708 static void zeus_power_off(void)
 709 {
 710         local_irq_disable();
 711         cpu_suspend(PWRMODE_DEEPSLEEP, pxa27x_finish_suspend);
 712 }
 713 #else
 714 #define zeus_power_off   NULL
 715 #endif
 716
 717 #ifdef CONFIG_APM_EMULATION
 718 static void zeus_get_power_status(struct apm_power_info *info)
 719 {
 720         /* Power supply is always present */
 721         info->ac_line_status    = APM_AC_ONLINE;
 722         info->battery_status    = APM_BATTERY_STATUS_NOT_PRESENT;
 723         info->battery_flag      = APM_BATTERY_FLAG_NOT_PRESENT;
 724 }
 725
 726 static inline void zeus_setup_apm(void)
 727 {
 728         apm_get_power_status = zeus_get_power_status;
 729 }
 730 #else
 731 static inline void zeus_setup_apm(void)
 732 {
 733 }
 734 #endif
 735
 736 static int zeus_get_pcb_info(struct i2c_client *client, unsigned gpio,
 737                              unsigned ngpio, void *context)
 738 {
 739         int i;
 740         u8 pcb_info = 0;
 741
 742         for (i = 0; i < 8; i++) {
 743                 int pcb_bit = gpio + i + 8;
 744
 745                 if (gpio_request(pcb_bit, "pcb info")) {
 746                         dev_err(&client->dev, "Can't request pcb info %d\n", i);
 747                         continue;
 748                 }
 749
 750                 if (gpio_direction_input(pcb_bit)) {
 751                         dev_err(&client->dev, "Can't read pcb info %d\n", i);
 752                         gpio_free(pcb_bit);
 753                         continue;
 754                 }
 755
 756                 pcb_info |= !!gpio_get_value(pcb_bit) << i;
 757
 758                 gpio_free(pcb_bit);
 759         }
 760
 761         dev_info(&client->dev, "Zeus PCB version %d issue %d\n",
 762                  pcb_info >> 4, pcb_info & 0xf);
 763
 764         return 0;
 765 }
 766
 767 static struct pca953x_platform_data zeus_pca953x_pdata[] = {
 768         [0] = { .gpio_base      = ZEUS_EXT0_GPIO_BASE, },
 769         [1] = {
 770                 .gpio_base      = ZEUS_EXT1_GPIO_BASE,
 771                 .setup          = zeus_get_pcb_info,
 772         },
 773         [2] = { .gpio_base = ZEUS_USER_GPIO_BASE, },
 774 };
 775
 776 static struct i2c_board_info __initdata zeus_i2c_devices[] = {
 777         {
 778                 I2C_BOARD_INFO("pca9535",       0x21),
 779                 .platform_data  = &zeus_pca953x_pdata[0],
 780         },
 781         {
 782                 I2C_BOARD_INFO("pca9535",       0x22),
 783                 .platform_data  = &zeus_pca953x_pdata[1],
 784         },
 785         {
 786                 I2C_BOARD_INFO("pca9535",       0x20),
 787                 .platform_data  = &zeus_pca953x_pdata[2],
 788                 .irq            = PXA_GPIO_TO_IRQ(ZEUS_EXTGPIO_GPIO),
 789         },
 790         { I2C_BOARD_INFO("lm75a",       0x48) },
 791         { I2C_BOARD_INFO("24c01",       0x50) },
 792         { I2C_BOARD_INFO("isl1208",     0x6f) },
 793 };
 794
 795 static mfp_cfg_t zeus_pin_config[] __initdata = {
 796         /* AC97 */
 797         GPIO28_AC97_BITCLK,
 798         GPIO29_AC97_SDATA_IN_0,
 799         GPIO30_AC97_SDATA_OUT,
 800         GPIO31_AC97_SYNC,
 801
 802         GPIO15_nCS_1,
 803         GPIO78_nCS_2,
 804         GPIO80_nCS_4,
 805         GPIO33_nCS_5,
 806
 807         GPIO22_GPIO,
 808         GPIO32_MMC_CLK,
 809         GPIO92_MMC_DAT_0,
 810         GPIO109_MMC_DAT_1,
 811         GPIO110_MMC_DAT_2,
 812         GPIO111_MMC_DAT_3,
 813         GPIO112_MMC_CMD,
 814
 815         GPIO88_USBH1_PWR,
 816         GPIO89_USBH1_PEN,
 817         GPIO119_USBH2_PWR,
 818         GPIO120_USBH2_PEN,
 819
 820         GPIO86_LCD_LDD_16,
 821         GPIO87_LCD_LDD_17,
 822
 823         GPIO102_GPIO,
 824         GPIO104_CIF_DD_2,
 825         GPIO105_CIF_DD_1,
 826
 827         GPIO81_SSP3_TXD,
 828         GPIO82_SSP3_RXD,
 829         GPIO83_SSP3_SFRM,
 830         GPIO84_SSP3_SCLK,
 831
 832         GPIO48_nPOE,
 833         GPIO49_nPWE,
 834         GPIO50_nPIOR,
 835         GPIO51_nPIOW,
 836         GPIO85_nPCE_1,
 837         GPIO54_nPCE_2,
 838         GPIO79_PSKTSEL,
 839         GPIO55_nPREG,
 840         GPIO56_nPWAIT,
 841         GPIO57_nIOIS16,
 842         GPIO36_GPIO,            /* CF CD */
 843         GPIO97_GPIO,            /* CF PWREN */
 844         GPIO99_GPIO,            /* CF RDY */
 845 };
 846
 847 /*
 848  * DM9k MSCx settings:  SRAM, 16 bits
 849  *                      17 cycles delay first access
 850  *                       5 cycles delay next access
 851  *                      13 cycles recovery time
 852  *                      faster device
 853  */
 854 #define DM9K_MSC_VALUE          0xe4c9
 855
 856 static void __init zeus_init(void)
 857 {
 858         u16 dm9000_msc = DM9K_MSC_VALUE;
 859         u32 msc0, msc1;
 860
 861         system_rev = __raw_readw(ZEUS_CPLD_VERSION);
 862         pr_info("Zeus CPLD V%dI%d\n", (system_rev & 0xf0) >> 4, (system_rev & 0x0f));
 863
 864         /* Fix timings for dm9000s (CS1/CS2)*/
 865         msc0 = (__raw_readl(MSC0) & 0x0000ffff) | (dm9000_msc << 16);
 866         msc1 = (__raw_readl(MSC1) & 0xffff0000) | dm9000_msc;
 867         __raw_writel(msc0, MSC0);
 868         __raw_writel(msc1, MSC1);
 869
 870         pm_power_off = zeus_power_off;
 871         zeus_setup_apm();
 872
 873         pxa2xx_mfp_config(ARRAY_AND_SIZE(zeus_pin_config));
 874
 875         gpiod_add_lookup_table(&can_regulator_gpiod_table);
 876         gpiod_add_lookup_table(&zeus_ohci_regulator_gpiod_table);
 877         platform_add_devices(zeus_devices, ARRAY_SIZE(zeus_devices));
 878
 879         zeus_register_ohci();
 880
 881         if (zeus_setup_fb_gpios())
 882                 pr_err("Failed to setup fb gpios\n");
 883         else
 884                 pxa_set_fb_info(NULL, &zeus_fb_info);
 885
 886         pxa_set_mci_info(&zeus_mci_platform_data);
 887         pxa_set_udc_info(&zeus_udc_info);
 888         pxa_set_ac97_info(&zeus_ac97_info);
 889         pxa_set_i2c_info(NULL);
 890         i2c_register_board_info(0, ARRAY_AND_SIZE(zeus_i2c_devices));
 891         pxa2xx_set_spi_info(3, &pxa2xx_spi_ssp3_master_info);
 892         spi_register_board_info(zeus_spi_board_info, ARRAY_SIZE(zeus_spi_board_info));
 893
 894         regulator_has_full_constraints();
 895 }
 896
 897 static struct map_desc zeus_io_desc[] __initdata = {
 898         {
 899                 .virtual = (unsigned long)ZEUS_CPLD_VERSION,
 900                 .pfn     = __phys_to_pfn(ZEUS_CPLD_VERSION_PHYS),
 901                 .length  = 0x1000,
 902                 .type    = MT_DEVICE,
 903         },
 904         {
 905                 .virtual = (unsigned long)ZEUS_CPLD_ISA_IRQ,
 906                 .pfn     = __phys_to_pfn(ZEUS_CPLD_ISA_IRQ_PHYS),
 907                 .length  = 0x1000,
 908                 .type    = MT_DEVICE,
 909         },
 910         {
 911                 .virtual = (unsigned long)ZEUS_CPLD_CONTROL,
 912                 .pfn     = __phys_to_pfn(ZEUS_CPLD_CONTROL_PHYS),
 913                 .length  = 0x1000,
 914                 .type    = MT_DEVICE,
 915         },
 916         {
 917                 .virtual = (unsigned long)ZEUS_PC104IO,
 918                 .pfn     = __phys_to_pfn(ZEUS_PC104IO_PHYS),
 919                 .length  = 0x00800000,
 920                 .type    = MT_DEVICE,
 921         },
 922 };
 923
 924 static void __init zeus_map_io(void)
 925 {
 926         pxa27x_map_io();
 927
 928         iotable_init(zeus_io_desc, ARRAY_SIZE(zeus_io_desc));
 929
 930         /* Clear PSPR to ensure a full restart on wake-up. */
 931         PMCR = PSPR = 0;
 932
 933         /* enable internal 32.768Khz oscillator (ignore OSCC_OOK) */
 934         writel(readl(OSCC) | OSCC_OON, OSCC);
 935
 936         /* Some clock cycles later (from OSCC_ON), programme PCFR (OPDE...).
 937          * float chip selects and PCMCIA */
 938         PCFR = PCFR_OPDE | PCFR_DC_EN | PCFR_FS | PCFR_FP;
 939 }
 940
 941 MACHINE_START(ARCOM_ZEUS, "Arcom/Eurotech ZEUS")
 942         /* Maintainer: Marc Zyngier <maz@misterjones.org> */
 943         .atag_offset    = 0x100,
 944         .map_io         = zeus_map_io,
 945         .nr_irqs        = ZEUS_NR_IRQS,
 946         .init_irq       = zeus_init_irq,
 947         .handle_irq     = pxa27x_handle_irq,
 948         .init_time      = pxa_timer_init,
 949         .init_machine   = zeus_init,
 950         .restart        = pxa_restart,
 951 MACHINE_END
 952