arch/arm/mach-orion5x/common.c

   1 /*
   2  * arch/arm/mach-orion5x/common.c
   3  *
   4  * Core functions for Marvell Orion 5x SoCs
   5  *
   6  * Maintainer: Tzachi Perelstein <tzachi@marvell.com>
   7  *
   8  * This file is licensed under the terms of the GNU General Public
   9  * License version 2.  This program is licensed "as is" without any
  10  * warranty of any kind, whether express or implied.
  11  */
  12
  13 #include <linux/kernel.h>
  14 #include <linux/init.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/serial_8250.h>
  17 #include <linux/mbus.h>
  18 #include <linux/mv643xx_eth.h>
  19 #include <linux/mv643xx_i2c.h>
  20 #include <linux/ata_platform.h>
  21 #include <asm/page.h>
  22 #include <asm/setup.h>
  23 #include <asm/timex.h>
  24 #include <asm/mach/arch.h>
  25 #include <asm/mach/map.h>
  26 #include <asm/mach/time.h>
  27 #include <asm/arch/hardware.h>
  28 #include <asm/arch/orion5x.h>
  29 #include <asm/plat-orion/ehci-orion.h>
  30 #include <asm/plat-orion/orion_nand.h>
  31 #include <asm/plat-orion/time.h>
  32 #include "common.h"
  33
  34 /*****************************************************************************
  35  * I/O Address Mapping
  36  ****************************************************************************/
  37 static struct map_desc orion5x_io_desc[] __initdata = {
  38         {
  39                 .virtual        = ORION5X_REGS_VIRT_BASE,
  40                 .pfn            = __phys_to_pfn(ORION5X_REGS_PHYS_BASE),
  41                 .length         = ORION5X_REGS_SIZE,
  42                 .type           = MT_DEVICE,
  43         }, {
  44                 .virtual        = ORION5X_PCIE_IO_VIRT_BASE,
  45                 .pfn            = __phys_to_pfn(ORION5X_PCIE_IO_PHYS_BASE),
  46                 .length         = ORION5X_PCIE_IO_SIZE,
  47                 .type           = MT_DEVICE,
  48         }, {
  49                 .virtual        = ORION5X_PCI_IO_VIRT_BASE,
  50                 .pfn            = __phys_to_pfn(ORION5X_PCI_IO_PHYS_BASE),
  51                 .length         = ORION5X_PCI_IO_SIZE,
  52                 .type           = MT_DEVICE,
  53         }, {
  54                 .virtual        = ORION5X_PCIE_WA_VIRT_BASE,
  55                 .pfn            = __phys_to_pfn(ORION5X_PCIE_WA_PHYS_BASE),
  56                 .length         = ORION5X_PCIE_WA_SIZE,
  57                 .type           = MT_DEVICE,
  58         },
  59 };
  60
  61 void __init orion5x_map_io(void)
  62 {
  63         iotable_init(orion5x_io_desc, ARRAY_SIZE(orion5x_io_desc));
  64 }
  65
  66 /*****************************************************************************
  67  * UART
  68  ****************************************************************************/
  69
  70 static struct resource orion5x_uart_resources[] = {
  71         {
  72                 .start          = UART0_PHYS_BASE,
  73                 .end            = UART0_PHYS_BASE + 0xff,
  74                 .flags          = IORESOURCE_MEM,
  75         }, {
  76                 .start          = IRQ_ORION5X_UART0,
  77                 .end            = IRQ_ORION5X_UART0,
  78                 .flags          = IORESOURCE_IRQ,
  79         }, {
  80                 .start          = UART1_PHYS_BASE,
  81                 .end            = UART1_PHYS_BASE + 0xff,
  82                 .flags          = IORESOURCE_MEM,
  83         }, {
  84                 .start          = IRQ_ORION5X_UART1,
  85                 .end            = IRQ_ORION5X_UART1,
  86                 .flags          = IORESOURCE_IRQ,
  87         },
  88 };
  89
  90 static struct plat_serial8250_port orion5x_uart_data[] = {
  91         {
  92                 .mapbase        = UART0_PHYS_BASE,
  93                 .membase        = (char *)UART0_VIRT_BASE,
  94                 .irq            = IRQ_ORION5X_UART0,
  95                 .flags          = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
  96                 .iotype         = UPIO_MEM,
  97                 .regshift       = 2,
  98                 .uartclk        = ORION5X_TCLK,
  99         }, {
 100                 .mapbase        = UART1_PHYS_BASE,
 101                 .membase        = (char *)UART1_VIRT_BASE,
 102                 .irq            = IRQ_ORION5X_UART1,
 103                 .flags          = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
 104                 .iotype         = UPIO_MEM,
 105                 .regshift       = 2,
 106                 .uartclk        = ORION5X_TCLK,
 107         }, {
 108         },
 109 };
 110
 111 static struct platform_device orion5x_uart = {
 112         .name                   = "serial8250",
 113         .id                     = PLAT8250_DEV_PLATFORM,
 114         .dev                    = {
 115                 .platform_data  = orion5x_uart_data,
 116         },
 117         .resource               = orion5x_uart_resources,
 118         .num_resources          = ARRAY_SIZE(orion5x_uart_resources),
 119 };
 120
 121 /*******************************************************************************
 122  * USB Controller - 2 interfaces
 123  ******************************************************************************/
 124
 125 static struct resource orion5x_ehci0_resources[] = {
 126         {
 127                 .start  = ORION5X_USB0_PHYS_BASE,
 128                 .end    = ORION5X_USB0_PHYS_BASE + SZ_4K - 1,
 129                 .flags  = IORESOURCE_MEM,
 130         }, {
 131                 .start  = IRQ_ORION5X_USB0_CTRL,
 132                 .end    = IRQ_ORION5X_USB0_CTRL,
 133                 .flags  = IORESOURCE_IRQ,
 134         },
 135 };
 136
 137 static struct resource orion5x_ehci1_resources[] = {
 138         {
 139                 .start  = ORION5X_USB1_PHYS_BASE,
 140                 .end    = ORION5X_USB1_PHYS_BASE + SZ_4K - 1,
 141                 .flags  = IORESOURCE_MEM,
 142         }, {
 143                 .start  = IRQ_ORION5X_USB1_CTRL,
 144                 .end    = IRQ_ORION5X_USB1_CTRL,
 145                 .flags  = IORESOURCE_IRQ,
 146         },
 147 };
 148
 149 static struct orion_ehci_data orion5x_ehci_data = {
 150         .dram           = &orion5x_mbus_dram_info,
 151 };
 152
 153 static u64 ehci_dmamask = 0xffffffffUL;
 154
 155 static struct platform_device orion5x_ehci0 = {
 156         .name           = "orion-ehci",
 157         .id             = 0,
 158         .dev            = {
 159                 .dma_mask               = &ehci_dmamask,
 160                 .coherent_dma_mask      = 0xffffffff,
 161                 .platform_data          = &orion5x_ehci_data,
 162         },
 163         .resource       = orion5x_ehci0_resources,
 164         .num_resources  = ARRAY_SIZE(orion5x_ehci0_resources),
 165 };
 166
 167 static struct platform_device orion5x_ehci1 = {
 168         .name           = "orion-ehci",
 169         .id             = 1,
 170         .dev            = {
 171                 .dma_mask               = &ehci_dmamask,
 172                 .coherent_dma_mask      = 0xffffffff,
 173                 .platform_data          = &orion5x_ehci_data,
 174         },
 175         .resource       = orion5x_ehci1_resources,
 176         .num_resources  = ARRAY_SIZE(orion5x_ehci1_resources),
 177 };
 178
 179 /*****************************************************************************
 180  * Gigabit Ethernet port
 181  * (The Orion and Discovery (MV643xx) families use the same Ethernet driver)
 182  ****************************************************************************/
 183
 184 struct mv643xx_eth_shared_platform_data orion5x_eth_shared_data = {
 185         .dram           = &orion5x_mbus_dram_info,
 186         .t_clk          = ORION5X_TCLK,
 187 };
 188
 189 static struct resource orion5x_eth_shared_resources[] = {
 190         {
 191                 .start  = ORION5X_ETH_PHYS_BASE + 0x2000,
 192                 .end    = ORION5X_ETH_PHYS_BASE + 0x3fff,
 193                 .flags  = IORESOURCE_MEM,
 194         },
 195 };
 196
 197 static struct platform_device orion5x_eth_shared = {
 198         .name           = MV643XX_ETH_SHARED_NAME,
 199         .id             = 0,
 200         .dev            = {
 201                 .platform_data  = &orion5x_eth_shared_data,
 202         },
 203         .num_resources  = 1,
 204         .resource       = orion5x_eth_shared_resources,
 205 };
 206
 207 static struct resource orion5x_eth_resources[] = {
 208         {
 209                 .name   = "eth irq",
 210                 .start  = IRQ_ORION5X_ETH_SUM,
 211                 .end    = IRQ_ORION5X_ETH_SUM,
 212                 .flags  = IORESOURCE_IRQ,
 213         },
 214 };
 215
 216 static struct platform_device orion5x_eth = {
 217         .name           = MV643XX_ETH_NAME,
 218         .id             = 0,
 219         .num_resources  = 1,
 220         .resource       = orion5x_eth_resources,
 221 };
 222
 223 void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data)
 224 {
 225         eth_data->shared = &orion5x_eth_shared;
 226         orion5x_eth.dev.platform_data = eth_data;
 227
 228         platform_device_register(&orion5x_eth_shared);
 229         platform_device_register(&orion5x_eth);
 230 }
 231
 232 /*****************************************************************************
 233  * I2C controller
 234  * (The Orion and Discovery (MV643xx) families share the same I2C controller)
 235  ****************************************************************************/
 236
 237 static struct mv64xxx_i2c_pdata orion5x_i2c_pdata = {
 238         .freq_m         = 8, /* assumes 166 MHz TCLK */
 239         .freq_n         = 3,
 240         .timeout        = 1000, /* Default timeout of 1 second */
 241 };
 242
 243 static struct resource orion5x_i2c_resources[] = {
 244         {
 245                 .name   = "i2c base",
 246                 .start  = I2C_PHYS_BASE,
 247                 .end    = I2C_PHYS_BASE + 0x20 -1,
 248                 .flags  = IORESOURCE_MEM,
 249         }, {
 250                 .name   = "i2c irq",
 251                 .start  = IRQ_ORION5X_I2C,
 252                 .end    = IRQ_ORION5X_I2C,
 253                 .flags  = IORESOURCE_IRQ,
 254         },
 255 };
 256
 257 static struct platform_device orion5x_i2c = {
 258         .name           = MV64XXX_I2C_CTLR_NAME,
 259         .id             = 0,
 260         .num_resources  = ARRAY_SIZE(orion5x_i2c_resources),
 261         .resource       = orion5x_i2c_resources,
 262         .dev            = {
 263                 .platform_data  = &orion5x_i2c_pdata,
 264         },
 265 };
 266
 267 /*****************************************************************************
 268  * Sata port
 269  ****************************************************************************/
 270 static struct resource orion5x_sata_resources[] = {
 271         {
 272                 .name   = "sata base",
 273                 .start  = ORION5X_SATA_PHYS_BASE,
 274                 .end    = ORION5X_SATA_PHYS_BASE + 0x5000 - 1,
 275                 .flags  = IORESOURCE_MEM,
 276         }, {
 277                 .name   = "sata irq",
 278                 .start  = IRQ_ORION5X_SATA,
 279                 .end    = IRQ_ORION5X_SATA,
 280                 .flags  = IORESOURCE_IRQ,
 281         },
 282 };
 283
 284 static struct platform_device orion5x_sata = {
 285         .name           = "sata_mv",
 286         .id             = 0,
 287         .dev            = {
 288                 .coherent_dma_mask      = 0xffffffff,
 289         },
 290         .num_resources  = ARRAY_SIZE(orion5x_sata_resources),
 291         .resource       = orion5x_sata_resources,
 292 };
 293
 294 void __init orion5x_sata_init(struct mv_sata_platform_data *sata_data)
 295 {
 296         sata_data->dram = &orion5x_mbus_dram_info;
 297         orion5x_sata.dev.platform_data = sata_data;
 298         platform_device_register(&orion5x_sata);
 299 }
 300
 301 /*****************************************************************************
 302  * Time handling
 303  ****************************************************************************/
 304
 305 static void orion5x_timer_init(void)
 306 {
 307         orion_time_init(IRQ_ORION5X_BRIDGE, ORION5X_TCLK);
 308 }
 309
 310 struct sys_timer orion5x_timer = {
 311         .init = orion5x_timer_init,
 312 };
 313
 314 /*****************************************************************************
 315  * General
 316  ****************************************************************************/
 317
 318 /*
 319  * Identify device ID and rev from PCIe configuration header space '0'.
 320  */
 321 static void __init orion5x_id(u32 *dev, u32 *rev, char **dev_name)
 322 {
 323         orion5x_pcie_id(dev, rev);
 324
 325         if (*dev == MV88F5281_DEV_ID) {
 326                 if (*rev == MV88F5281_REV_D2) {
 327                         *dev_name = "MV88F5281-D2";
 328                 } else if (*rev == MV88F5281_REV_D1) {
 329                         *dev_name = "MV88F5281-D1";
 330                 } else {
 331                         *dev_name = "MV88F5281-Rev-Unsupported";
 332                 }
 333         } else if (*dev == MV88F5182_DEV_ID) {
 334                 if (*rev == MV88F5182_REV_A2) {
 335                         *dev_name = "MV88F5182-A2";
 336                 } else {
 337                         *dev_name = "MV88F5182-Rev-Unsupported";
 338                 }
 339         } else if (*dev == MV88F5181_DEV_ID) {
 340                 if (*rev == MV88F5181_REV_B1) {
 341                         *dev_name = "MV88F5181-Rev-B1";
 342                 } else {
 343                         *dev_name = "MV88F5181-Rev-Unsupported";
 344                 }
 345         } else {
 346                 *dev_name = "Device-Unknown";
 347         }
 348 }
 349
 350 void __init orion5x_init(void)
 351 {
 352         char *dev_name;
 353         u32 dev, rev;
 354
 355         orion5x_id(&dev, &rev, &dev_name);
 356         printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, ORION5X_TCLK);
 357
 358         /*
 359          * Setup Orion address map
 360          */
 361         orion5x_setup_cpu_mbus_bridge();
 362
 363         /*
 364          * Register devices.
 365          */
 366         platform_device_register(&orion5x_uart);
 367         platform_device_register(&orion5x_ehci0);
 368         if (dev == MV88F5182_DEV_ID)
 369                 platform_device_register(&orion5x_ehci1);
 370         platform_device_register(&orion5x_i2c);
 371 }
 372
 373 /*
 374  * Many orion-based systems have buggy bootloader implementations.
 375  * This is a common fixup for bogus memory tags.
 376  */
 377 void __init tag_fixup_mem32(struct machine_desc *mdesc, struct tag *t,
 378                             char **from, struct meminfo *meminfo)
 379 {
 380         for (; t->hdr.size; t = tag_next(t))
 381                 if (t->hdr.tag == ATAG_MEM &&
 382                     (!t->u.mem.size || t->u.mem.size & ~PAGE_MASK ||
 383                      t->u.mem.start & ~PAGE_MASK)) {
 384                         printk(KERN_WARNING
 385                                "Clearing invalid memory bank %dKB@0x%08x\n",
 386                                t->u.mem.size / 1024, t->u.mem.start);
 387                         t->hdr.tag = 0;
 388                 }
 389 }