2 * omap_hwmod implementation for OMAP2/3/4
4 * Copyright (C) 2009-2011 Nokia Corporation
5 * Copyright (C) 2011-2012 Texas Instruments, Inc.
7 * Paul Walmsley, BenoƮt Cousson, Kevin Hilman
9 * Created in collaboration with (alphabetical order): Thara Gopinath,
10 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
11 * Sawant, Santosh Shilimkar, Richard Woodruff
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
19 * One way to view an OMAP SoC is as a collection of largely unrelated
20 * IP blocks connected by interconnects. The IP blocks include
21 * devices such as ARM processors, audio serial interfaces, UARTs,
22 * etc. Some of these devices, like the DSP, are created by TI;
23 * others, like the SGX, largely originate from external vendors. In
24 * TI's documentation, on-chip devices are referred to as "OMAP
25 * modules." Some of these IP blocks are identical across several
26 * OMAP versions. Others are revised frequently.
28 * These OMAP modules are tied together by various interconnects.
29 * Most of the address and data flow between modules is via OCP-based
30 * interconnects such as the L3 and L4 buses; but there are other
31 * interconnects that distribute the hardware clock tree, handle idle
32 * and reset signaling, supply power, and connect the modules to
33 * various pads or balls on the OMAP package.
35 * OMAP hwmod provides a consistent way to describe the on-chip
36 * hardware blocks and their integration into the rest of the chip.
37 * This description can be automatically generated from the TI
38 * hardware database. OMAP hwmod provides a standard, consistent API
39 * to reset, enable, idle, and disable these hardware blocks. And
40 * hwmod provides a way for other core code, such as the Linux device
41 * code or the OMAP power management and address space mapping code,
42 * to query the hardware database.
46 * Drivers won't call hwmod functions directly. That is done by the
47 * omap_device code, and in rare occasions, by custom integration code
48 * in arch/arm/ *omap*. The omap_device code includes functions to
49 * build a struct platform_device using omap_hwmod data, and that is
50 * currently how hwmod data is communicated to drivers and to the
51 * Linux driver model. Most drivers will call omap_hwmod functions only
52 * indirectly, via pm_runtime*() functions.
54 * From a layering perspective, here is where the OMAP hwmod code
55 * fits into the kernel software stack:
57 * +-------------------------------+
58 * | Device driver code |
59 * | (e.g., drivers/) |
60 * +-------------------------------+
61 * | Linux driver model |
62 * | (platform_device / |
63 * | platform_driver data/code) |
64 * +-------------------------------+
65 * | OMAP core-driver integration |
66 * |(arch/arm/mach-omap2/devices.c)|
67 * +-------------------------------+
68 * | omap_device code |
69 * | (../plat-omap/omap_device.c) |
70 * +-------------------------------+
71 * ----> | omap_hwmod code/data | <-----
72 * | (../mach-omap2/omap_hwmod*) |
73 * +-------------------------------+
74 * | OMAP clock/PRCM/register fns |
75 * | ({read,write}l_relaxed, clk*) |
76 * +-------------------------------+
78 * Device drivers should not contain any OMAP-specific code or data in
79 * them. They should only contain code to operate the IP block that
80 * the driver is responsible for. This is because these IP blocks can
81 * also appear in other SoCs, either from TI (such as DaVinci) or from
82 * other manufacturers; and drivers should be reusable across other
85 * The OMAP hwmod code also will attempt to reset and idle all on-chip
86 * devices upon boot. The goal here is for the kernel to be
87 * completely self-reliant and independent from bootloaders. This is
88 * to ensure a repeatable configuration, both to ensure consistent
89 * runtime behavior, and to make it easier for others to reproduce
92 * OMAP module activity states
93 * ---------------------------
94 * The hwmod code considers modules to be in one of several activity
95 * states. IP blocks start out in an UNKNOWN state, then once they
96 * are registered via the hwmod code, proceed to the REGISTERED state.
97 * Once their clock names are resolved to clock pointers, the module
98 * enters the CLKS_INITED state; and finally, once the module has been
99 * reset and the integration registers programmed, the INITIALIZED state
100 * is entered. The hwmod code will then place the module into either
101 * the IDLE state to save power, or in the case of a critical system
102 * module, the ENABLED state.
104 * OMAP core integration code can then call omap_hwmod*() functions
105 * directly to move the module between the IDLE, ENABLED, and DISABLED
106 * states, as needed. This is done during both the PM idle loop, and
107 * in the OMAP core integration code's implementation of the PM runtime
112 * This is a partial list.
113 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
114 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
115 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
116 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
117 * - Open Core Protocol Specification 2.2
120 * - handle IO mapping
121 * - bus throughput & module latency measurement code
123 * XXX add tests at the beginning of each function to ensure the hwmod is
124 * in the appropriate state
125 * XXX error return values should be checked to ensure that they are
130 #include <linux/kernel.h>
131 #include <linux/errno.h>
132 #include <linux/io.h>
133 #include <linux/clk.h>
134 #include <linux/clk-provider.h>
135 #include <linux/delay.h>
136 #include <linux/err.h>
137 #include <linux/list.h>
138 #include <linux/mutex.h>
139 #include <linux/spinlock.h>
140 #include <linux/slab.h>
141 #include <linux/cpu.h>
142 #include <linux/of.h>
143 #include <linux/of_address.h>
144 #include <linux/memblock.h>
146 #include <linux/platform_data/ti-sysc.h>
148 #include <dt-bindings/bus/ti-sysc.h>
150 #include <asm/system_misc.h>
153 #include "omap_hwmod.h"
157 #include "clockdomain.h"
158 #include "powerdomain.h"
166 #include "prminst44xx.h"
169 /* Name of the OMAP hwmod for the MPU */
170 #define MPU_INITIATOR_NAME "mpu"
173 * Number of struct omap_hwmod_link records per struct
174 * omap_hwmod_ocp_if record (master->slave and slave->master)
176 #define LINKS_PER_OCP_IF 2
179 * Address offset (in bytes) between the reset control and the reset
180 * status registers: 4 bytes on OMAP4
182 #define OMAP4_RST_CTRL_ST_OFFSET 4
185 * Maximum length for module clock handle names
187 #define MOD_CLK_MAX_NAME_LEN 32
190 * struct clkctrl_provider - clkctrl provider mapping data
191 * @num_addrs: number of base address ranges for the provider
192 * @addr: base address(es) for the provider
193 * @size: size(s) of the provider address space(s)
194 * @node: device node associated with the provider
197 struct clkctrl_provider {
201 struct device_node *node;
202 struct list_head link;
205 static LIST_HEAD(clkctrl_providers);
208 * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
209 * @enable_module: function to enable a module (via MODULEMODE)
210 * @disable_module: function to disable a module (via MODULEMODE)
212 * XXX Eventually this functionality will be hidden inside the PRM/CM
213 * device drivers. Until then, this should avoid huge blocks of cpu_is_*()
214 * conditionals in this code.
216 struct omap_hwmod_soc_ops {
217 void (*enable_module)(struct omap_hwmod *oh);
218 int (*disable_module)(struct omap_hwmod *oh);
219 int (*wait_target_ready)(struct omap_hwmod *oh);
220 int (*assert_hardreset)(struct omap_hwmod *oh,
221 struct omap_hwmod_rst_info *ohri);
222 int (*deassert_hardreset)(struct omap_hwmod *oh,
223 struct omap_hwmod_rst_info *ohri);
224 int (*is_hardreset_asserted)(struct omap_hwmod *oh,
225 struct omap_hwmod_rst_info *ohri);
226 int (*init_clkdm)(struct omap_hwmod *oh);
227 void (*update_context_lost)(struct omap_hwmod *oh);
228 int (*get_context_lost)(struct omap_hwmod *oh);
229 int (*disable_direct_prcm)(struct omap_hwmod *oh);
230 u32 (*xlate_clkctrl)(struct omap_hwmod *oh);
233 /* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
234 static struct omap_hwmod_soc_ops soc_ops;
236 /* omap_hwmod_list contains all registered struct omap_hwmods */
237 static LIST_HEAD(omap_hwmod_list);
239 /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
240 static struct omap_hwmod *mpu_oh;
242 /* inited: set to true once the hwmod code is initialized */
245 /* Private functions */
248 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
249 * @oh: struct omap_hwmod *
251 * Load the current value of the hwmod OCP_SYSCONFIG register into the
252 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
253 * OCP_SYSCONFIG register or 0 upon success.
255 static int _update_sysc_cache(struct omap_hwmod *oh)
257 if (!oh->class->sysc) {
258 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
262 /* XXX ensure module interface clock is up */
264 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
266 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
267 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
273 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
274 * @v: OCP_SYSCONFIG value to write
275 * @oh: struct omap_hwmod *
277 * Write @v into the module class' OCP_SYSCONFIG register, if it has
278 * one. No return value.
280 static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
282 if (!oh->class->sysc) {
283 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
287 /* XXX ensure module interface clock is up */
289 /* Module might have lost context, always update cache and register */
293 * Some IP blocks (such as RTC) require unlocking of IP before
294 * accessing its registers. If a function pointer is present
295 * to unlock, then call it before accessing sysconfig and
296 * call lock after writing sysconfig.
298 if (oh->class->unlock)
299 oh->class->unlock(oh);
301 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
308 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
309 * @oh: struct omap_hwmod *
310 * @standbymode: MIDLEMODE field bits
311 * @v: pointer to register contents to modify
313 * Update the master standby mode bits in @v to be @standbymode for
314 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
315 * upon error or 0 upon success.
317 static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
323 if (!oh->class->sysc ||
324 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
327 if (!oh->class->sysc->sysc_fields) {
328 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
332 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
333 mstandby_mask = (0x3 << mstandby_shift);
335 *v &= ~mstandby_mask;
336 *v |= __ffs(standbymode) << mstandby_shift;
342 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
343 * @oh: struct omap_hwmod *
344 * @idlemode: SIDLEMODE field bits
345 * @v: pointer to register contents to modify
347 * Update the slave idle mode bits in @v to be @idlemode for the @oh
348 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
351 static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
356 if (!oh->class->sysc ||
357 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
360 if (!oh->class->sysc->sysc_fields) {
361 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
365 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
366 sidle_mask = (0x3 << sidle_shift);
369 *v |= __ffs(idlemode) << sidle_shift;
375 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
376 * @oh: struct omap_hwmod *
377 * @clockact: CLOCKACTIVITY field bits
378 * @v: pointer to register contents to modify
380 * Update the clockactivity mode bits in @v to be @clockact for the
381 * @oh hwmod. Used for additional powersaving on some modules. Does
382 * not write to the hardware. Returns -EINVAL upon error or 0 upon
385 static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
390 if (!oh->class->sysc ||
391 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
394 if (!oh->class->sysc->sysc_fields) {
395 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
399 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
400 clkact_mask = (0x3 << clkact_shift);
403 *v |= clockact << clkact_shift;
409 * _set_softreset: set OCP_SYSCONFIG.SOFTRESET bit in @v
410 * @oh: struct omap_hwmod *
411 * @v: pointer to register contents to modify
413 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
414 * error or 0 upon success.
416 static int _set_softreset(struct omap_hwmod *oh, u32 *v)
420 if (!oh->class->sysc ||
421 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
424 if (!oh->class->sysc->sysc_fields) {
425 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
429 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
437 * _clear_softreset: clear OCP_SYSCONFIG.SOFTRESET bit in @v
438 * @oh: struct omap_hwmod *
439 * @v: pointer to register contents to modify
441 * Clear the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
442 * error or 0 upon success.
444 static int _clear_softreset(struct omap_hwmod *oh, u32 *v)
448 if (!oh->class->sysc ||
449 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
452 if (!oh->class->sysc->sysc_fields) {
454 "omap_hwmod: %s: sysc_fields absent for sysconfig class\n",
459 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
467 * _wait_softreset_complete - wait for an OCP softreset to complete
468 * @oh: struct omap_hwmod * to wait on
470 * Wait until the IP block represented by @oh reports that its OCP
471 * softreset is complete. This can be triggered by software (see
472 * _ocp_softreset()) or by hardware upon returning from off-mode (one
473 * example is HSMMC). Waits for up to MAX_MODULE_SOFTRESET_WAIT
474 * microseconds. Returns the number of microseconds waited.
476 static int _wait_softreset_complete(struct omap_hwmod *oh)
478 struct omap_hwmod_class_sysconfig *sysc;
482 sysc = oh->class->sysc;
484 if (sysc->sysc_flags & SYSS_HAS_RESET_STATUS && sysc->syss_offs > 0)
485 omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs)
486 & SYSS_RESETDONE_MASK),
487 MAX_MODULE_SOFTRESET_WAIT, c);
488 else if (sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
489 softrst_mask = (0x1 << sysc->sysc_fields->srst_shift);
490 omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs)
492 MAX_MODULE_SOFTRESET_WAIT, c);
499 * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
500 * @oh: struct omap_hwmod *
502 * The DMADISABLE bit is a semi-automatic bit present in sysconfig register
503 * of some modules. When the DMA must perform read/write accesses, the
504 * DMADISABLE bit is cleared by the hardware. But when the DMA must stop
505 * for power management, software must set the DMADISABLE bit back to 1.
507 * Set the DMADISABLE bit in @v for hwmod @oh. Returns -EINVAL upon
508 * error or 0 upon success.
510 static int _set_dmadisable(struct omap_hwmod *oh)
515 if (!oh->class->sysc ||
516 !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE))
519 if (!oh->class->sysc->sysc_fields) {
520 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
524 /* clocks must be on for this operation */
525 if (oh->_state != _HWMOD_STATE_ENABLED) {
526 pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name);
530 pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name);
534 (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift);
535 v |= dmadisable_mask;
536 _write_sysconfig(v, oh);
542 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
543 * @oh: struct omap_hwmod *
544 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
545 * @v: pointer to register contents to modify
547 * Update the module autoidle bit in @v to be @autoidle for the @oh
548 * hwmod. The autoidle bit controls whether the module can gate
549 * internal clocks automatically when it isn't doing anything; the
550 * exact function of this bit varies on a per-module basis. This
551 * function does not write to the hardware. Returns -EINVAL upon
552 * error or 0 upon success.
554 static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
560 if (!oh->class->sysc ||
561 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
564 if (!oh->class->sysc->sysc_fields) {
565 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
569 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
570 autoidle_mask = (0x1 << autoidle_shift);
572 *v &= ~autoidle_mask;
573 *v |= autoidle << autoidle_shift;
579 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
580 * @oh: struct omap_hwmod *
582 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
583 * upon error or 0 upon success.
585 static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
587 if (!oh->class->sysc ||
588 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
589 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
590 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
593 if (!oh->class->sysc->sysc_fields) {
594 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
598 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
599 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
601 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
602 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
603 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
604 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
606 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
612 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
613 * @oh: struct omap_hwmod *
615 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
616 * upon error or 0 upon success.
618 static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
620 if (!oh->class->sysc ||
621 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
622 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
623 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
626 if (!oh->class->sysc->sysc_fields) {
627 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
631 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
632 *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
634 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
635 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
636 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
637 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v);
639 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
644 static struct clockdomain *_get_clkdm(struct omap_hwmod *oh)
646 struct clk_hw_omap *clk;
650 } else if (oh->_clk) {
651 if (__clk_get_flags(oh->_clk) & CLK_IS_BASIC)
653 clk = to_clk_hw_omap(__clk_get_hw(oh->_clk));
660 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
661 * @oh: struct omap_hwmod *
663 * Prevent the hardware module @oh from entering idle while the
664 * hardare module initiator @init_oh is active. Useful when a module
665 * will be accessed by a particular initiator (e.g., if a module will
666 * be accessed by the IVA, there should be a sleepdep between the IVA
667 * initiator and the module). Only applies to modules in smart-idle
668 * mode. If the clockdomain is marked as not needing autodeps, return
669 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
670 * passes along clkdm_add_sleepdep() value upon success.
672 static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
674 struct clockdomain *clkdm, *init_clkdm;
676 clkdm = _get_clkdm(oh);
677 init_clkdm = _get_clkdm(init_oh);
679 if (!clkdm || !init_clkdm)
682 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
685 return clkdm_add_sleepdep(clkdm, init_clkdm);
689 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
690 * @oh: struct omap_hwmod *
692 * Allow the hardware module @oh to enter idle while the hardare
693 * module initiator @init_oh is active. Useful when a module will not
694 * be accessed by a particular initiator (e.g., if a module will not
695 * be accessed by the IVA, there should be no sleepdep between the IVA
696 * initiator and the module). Only applies to modules in smart-idle
697 * mode. If the clockdomain is marked as not needing autodeps, return
698 * 0 without doing anything. Returns -EINVAL upon error or passes
699 * along clkdm_del_sleepdep() value upon success.
701 static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
703 struct clockdomain *clkdm, *init_clkdm;
705 clkdm = _get_clkdm(oh);
706 init_clkdm = _get_clkdm(init_oh);
708 if (!clkdm || !init_clkdm)
711 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
714 return clkdm_del_sleepdep(clkdm, init_clkdm);
717 static const struct of_device_id ti_clkctrl_match_table[] __initconst = {
718 { .compatible = "ti,clkctrl" },
722 static int __init _setup_clkctrl_provider(struct device_node *np)
725 struct clkctrl_provider *provider;
729 provider = memblock_alloc(sizeof(*provider), SMP_CACHE_BYTES);
735 provider->num_addrs =
736 of_property_count_elems_of_size(np, "reg", sizeof(u32)) / 2;
739 memblock_alloc(sizeof(void *) * provider->num_addrs,
745 memblock_alloc(sizeof(u32) * provider->num_addrs,
750 for (i = 0; i < provider->num_addrs; i++) {
751 addrp = of_get_address(np, i, &size, NULL);
752 provider->addr[i] = (u32)of_translate_address(np, addrp);
753 provider->size[i] = size;
754 pr_debug("%s: %pOF: %x...%x\n", __func__, np, provider->addr[i],
755 provider->addr[i] + provider->size[i]);
758 list_add(&provider->link, &clkctrl_providers);
763 static int __init _init_clkctrl_providers(void)
765 struct device_node *np;
768 for_each_matching_node(np, ti_clkctrl_match_table) {
769 ret = _setup_clkctrl_provider(np);
777 static u32 _omap4_xlate_clkctrl(struct omap_hwmod *oh)
779 if (!oh->prcm.omap4.modulemode)
782 return omap_cm_xlate_clkctrl(oh->clkdm->prcm_partition,
784 oh->prcm.omap4.clkctrl_offs);
787 static struct clk *_lookup_clkctrl_clk(struct omap_hwmod *oh)
789 struct clkctrl_provider *provider;
793 if (!soc_ops.xlate_clkctrl)
796 addr = soc_ops.xlate_clkctrl(oh);
800 pr_debug("%s: %s: addr=%x\n", __func__, oh->name, addr);
802 list_for_each_entry(provider, &clkctrl_providers, link) {
805 for (i = 0; i < provider->num_addrs; i++) {
806 if (provider->addr[i] <= addr &&
807 provider->addr[i] + provider->size[i] > addr) {
808 struct of_phandle_args clkspec;
810 clkspec.np = provider->node;
811 clkspec.args_count = 2;
812 clkspec.args[0] = addr - provider->addr[0];
815 clk = of_clk_get_from_provider(&clkspec);
817 pr_debug("%s: %s got %p (offset=%x, provider=%pOF)\n",
818 __func__, oh->name, clk,
819 clkspec.args[0], provider->node);
830 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
831 * @oh: struct omap_hwmod *
833 * Called from _init_clocks(). Populates the @oh _clk (main
834 * functional clock pointer) if a clock matching the hwmod name is found,
835 * or a main_clk is present. Returns 0 on success or -EINVAL on error.
837 static int _init_main_clk(struct omap_hwmod *oh)
840 struct clk *clk = NULL;
842 clk = _lookup_clkctrl_clk(oh);
844 if (!IS_ERR_OR_NULL(clk)) {
845 pr_debug("%s: mapped main_clk %s for %s\n", __func__,
846 __clk_get_name(clk), oh->name);
847 oh->main_clk = __clk_get_name(clk);
849 soc_ops.disable_direct_prcm(oh);
854 oh->_clk = clk_get(NULL, oh->main_clk);
857 if (IS_ERR(oh->_clk)) {
858 pr_warn("omap_hwmod: %s: cannot clk_get main_clk %s\n",
859 oh->name, oh->main_clk);
863 * HACK: This needs a re-visit once clk_prepare() is implemented
864 * to do something meaningful. Today its just a no-op.
865 * If clk_prepare() is used at some point to do things like
866 * voltage scaling etc, then this would have to be moved to
867 * some point where subsystems like i2c and pmic become
870 clk_prepare(oh->_clk);
873 pr_debug("omap_hwmod: %s: missing clockdomain for %s.\n",
874 oh->name, oh->main_clk);
880 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
881 * @oh: struct omap_hwmod *
883 * Called from _init_clocks(). Populates the @oh OCP slave interface
884 * clock pointers. Returns 0 on success or -EINVAL on error.
886 static int _init_interface_clks(struct omap_hwmod *oh)
888 struct omap_hwmod_ocp_if *os;
892 list_for_each_entry(os, &oh->slave_ports, node) {
896 c = clk_get(NULL, os->clk);
898 pr_warn("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
905 * HACK: This needs a re-visit once clk_prepare() is implemented
906 * to do something meaningful. Today its just a no-op.
907 * If clk_prepare() is used at some point to do things like
908 * voltage scaling etc, then this would have to be moved to
909 * some point where subsystems like i2c and pmic become
912 clk_prepare(os->_clk);
919 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
920 * @oh: struct omap_hwmod *
922 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
923 * clock pointers. Returns 0 on success or -EINVAL on error.
925 static int _init_opt_clks(struct omap_hwmod *oh)
927 struct omap_hwmod_opt_clk *oc;
932 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
933 c = clk_get(NULL, oc->clk);
935 pr_warn("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
942 * HACK: This needs a re-visit once clk_prepare() is implemented
943 * to do something meaningful. Today its just a no-op.
944 * If clk_prepare() is used at some point to do things like
945 * voltage scaling etc, then this would have to be moved to
946 * some point where subsystems like i2c and pmic become
949 clk_prepare(oc->_clk);
955 static void _enable_optional_clocks(struct omap_hwmod *oh)
957 struct omap_hwmod_opt_clk *oc;
960 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
962 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
964 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
965 __clk_get_name(oc->_clk));
966 clk_enable(oc->_clk);
970 static void _disable_optional_clocks(struct omap_hwmod *oh)
972 struct omap_hwmod_opt_clk *oc;
975 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
977 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
979 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
980 __clk_get_name(oc->_clk));
981 clk_disable(oc->_clk);
986 * _enable_clocks - enable hwmod main clock and interface clocks
987 * @oh: struct omap_hwmod *
989 * Enables all clocks necessary for register reads and writes to succeed
990 * on the hwmod @oh. Returns 0.
992 static int _enable_clocks(struct omap_hwmod *oh)
994 struct omap_hwmod_ocp_if *os;
996 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
998 if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
999 _enable_optional_clocks(oh);
1002 clk_enable(oh->_clk);
1004 list_for_each_entry(os, &oh->slave_ports, node) {
1005 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
1006 clk_enable(os->_clk);
1009 /* The opt clocks are controlled by the device driver. */
1015 * _omap4_clkctrl_managed_by_clkfwk - true if clkctrl managed by clock framework
1016 * @oh: struct omap_hwmod *
1018 static bool _omap4_clkctrl_managed_by_clkfwk(struct omap_hwmod *oh)
1020 if (oh->prcm.omap4.flags & HWMOD_OMAP4_CLKFWK_CLKCTR_CLOCK)
1027 * _omap4_has_clkctrl_clock - returns true if a module has clkctrl clock
1028 * @oh: struct omap_hwmod *
1030 static bool _omap4_has_clkctrl_clock(struct omap_hwmod *oh)
1032 if (oh->prcm.omap4.clkctrl_offs)
1035 if (!oh->prcm.omap4.clkctrl_offs &&
1036 oh->prcm.omap4.flags & HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET)
1043 * _disable_clocks - disable hwmod main clock and interface clocks
1044 * @oh: struct omap_hwmod *
1046 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
1048 static int _disable_clocks(struct omap_hwmod *oh)
1050 struct omap_hwmod_ocp_if *os;
1052 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
1055 clk_disable(oh->_clk);
1057 list_for_each_entry(os, &oh->slave_ports, node) {
1058 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
1059 clk_disable(os->_clk);
1062 if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
1063 _disable_optional_clocks(oh);
1065 /* The opt clocks are controlled by the device driver. */
1071 * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
1072 * @oh: struct omap_hwmod *
1074 * Enables the PRCM module mode related to the hwmod @oh.
1077 static void _omap4_enable_module(struct omap_hwmod *oh)
1079 if (!oh->clkdm || !oh->prcm.omap4.modulemode ||
1080 _omap4_clkctrl_managed_by_clkfwk(oh))
1083 pr_debug("omap_hwmod: %s: %s: %d\n",
1084 oh->name, __func__, oh->prcm.omap4.modulemode);
1086 omap_cm_module_enable(oh->prcm.omap4.modulemode,
1087 oh->clkdm->prcm_partition,
1088 oh->clkdm->cm_inst, oh->prcm.omap4.clkctrl_offs);
1092 * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
1093 * @oh: struct omap_hwmod *
1095 * Wait for a module @oh to enter slave idle. Returns 0 if the module
1096 * does not have an IDLEST bit or if the module successfully enters
1097 * slave idle; otherwise, pass along the return value of the
1098 * appropriate *_cm*_wait_module_idle() function.
1100 static int _omap4_wait_target_disable(struct omap_hwmod *oh)
1105 if (oh->_int_flags & _HWMOD_NO_MPU_PORT || !oh->clkdm)
1108 if (oh->flags & HWMOD_NO_IDLEST)
1111 if (_omap4_clkctrl_managed_by_clkfwk(oh))
1114 if (!_omap4_has_clkctrl_clock(oh))
1117 return omap_cm_wait_module_idle(oh->clkdm->prcm_partition,
1119 oh->prcm.omap4.clkctrl_offs, 0);
1123 * _save_mpu_port_index - find and save the index to @oh's MPU port
1124 * @oh: struct omap_hwmod *
1126 * Determines the array index of the OCP slave port that the MPU uses
1127 * to address the device, and saves it into the struct omap_hwmod.
1128 * Intended to be called during hwmod registration only. No return
1131 static void __init _save_mpu_port_index(struct omap_hwmod *oh)
1133 struct omap_hwmod_ocp_if *os = NULL;
1138 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
1140 list_for_each_entry(os, &oh->slave_ports, node) {
1141 if (os->user & OCP_USER_MPU) {
1143 oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
1152 * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
1153 * @oh: struct omap_hwmod *
1155 * Given a pointer to a struct omap_hwmod record @oh, return a pointer
1156 * to the struct omap_hwmod_ocp_if record that is used by the MPU to
1157 * communicate with the IP block. This interface need not be directly
1158 * connected to the MPU (and almost certainly is not), but is directly
1159 * connected to the IP block represented by @oh. Returns a pointer
1160 * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
1161 * error or if there does not appear to be a path from the MPU to this
1164 static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
1166 if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
1169 return oh->_mpu_port;
1173 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
1174 * @oh: struct omap_hwmod *
1176 * Ensure that the OCP_SYSCONFIG register for the IP block represented
1177 * by @oh is set to indicate to the PRCM that the IP block is active.
1178 * Usually this means placing the module into smart-idle mode and
1179 * smart-standby, but if there is a bug in the automatic idle handling
1180 * for the IP block, it may need to be placed into the force-idle or
1181 * no-idle variants of these modes. No return value.
1183 static void _enable_sysc(struct omap_hwmod *oh)
1188 struct clockdomain *clkdm;
1190 if (!oh->class->sysc)
1194 * Wait until reset has completed, this is needed as the IP
1195 * block is reset automatically by hardware in some cases
1196 * (off-mode for example), and the drivers require the
1197 * IP to be ready when they access it
1199 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1200 _enable_optional_clocks(oh);
1201 _wait_softreset_complete(oh);
1202 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1203 _disable_optional_clocks(oh);
1205 v = oh->_sysc_cache;
1206 sf = oh->class->sysc->sysc_flags;
1208 clkdm = _get_clkdm(oh);
1209 if (sf & SYSC_HAS_SIDLEMODE) {
1210 if (oh->flags & HWMOD_SWSUP_SIDLE ||
1211 oh->flags & HWMOD_SWSUP_SIDLE_ACT) {
1212 idlemode = HWMOD_IDLEMODE_NO;
1214 if (sf & SYSC_HAS_ENAWAKEUP)
1215 _enable_wakeup(oh, &v);
1216 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
1217 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1219 idlemode = HWMOD_IDLEMODE_SMART;
1223 * This is special handling for some IPs like
1224 * 32k sync timer. Force them to idle!
1226 clkdm_act = (clkdm && clkdm->flags & CLKDM_ACTIVE_WITH_MPU);
1227 if (clkdm_act && !(oh->class->sysc->idlemodes &
1228 (SIDLE_SMART | SIDLE_SMART_WKUP)))
1229 idlemode = HWMOD_IDLEMODE_FORCE;
1231 _set_slave_idlemode(oh, idlemode, &v);
1234 if (sf & SYSC_HAS_MIDLEMODE) {
1235 if (oh->flags & HWMOD_FORCE_MSTANDBY) {
1236 idlemode = HWMOD_IDLEMODE_FORCE;
1237 } else if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1238 idlemode = HWMOD_IDLEMODE_NO;
1240 if (sf & SYSC_HAS_ENAWAKEUP)
1241 _enable_wakeup(oh, &v);
1242 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1243 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1245 idlemode = HWMOD_IDLEMODE_SMART;
1247 _set_master_standbymode(oh, idlemode, &v);
1251 * XXX The clock framework should handle this, by
1252 * calling into this code. But this must wait until the
1253 * clock structures are tagged with omap_hwmod entries
1255 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
1256 (sf & SYSC_HAS_CLOCKACTIVITY))
1257 _set_clockactivity(oh, CLOCKACT_TEST_ICLK, &v);
1259 _write_sysconfig(v, oh);
1262 * Set the autoidle bit only after setting the smartidle bit
1263 * Setting this will not have any impact on the other modules.
1265 if (sf & SYSC_HAS_AUTOIDLE) {
1266 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
1268 _set_module_autoidle(oh, idlemode, &v);
1269 _write_sysconfig(v, oh);
1274 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
1275 * @oh: struct omap_hwmod *
1277 * If module is marked as SWSUP_SIDLE, force the module into slave
1278 * idle; otherwise, configure it for smart-idle. If module is marked
1279 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
1280 * configure it for smart-standby. No return value.
1282 static void _idle_sysc(struct omap_hwmod *oh)
1287 if (!oh->class->sysc)
1290 v = oh->_sysc_cache;
1291 sf = oh->class->sysc->sysc_flags;
1293 if (sf & SYSC_HAS_SIDLEMODE) {
1294 if (oh->flags & HWMOD_SWSUP_SIDLE) {
1295 idlemode = HWMOD_IDLEMODE_FORCE;
1297 if (sf & SYSC_HAS_ENAWAKEUP)
1298 _enable_wakeup(oh, &v);
1299 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
1300 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1302 idlemode = HWMOD_IDLEMODE_SMART;
1304 _set_slave_idlemode(oh, idlemode, &v);
1307 if (sf & SYSC_HAS_MIDLEMODE) {
1308 if ((oh->flags & HWMOD_SWSUP_MSTANDBY) ||
1309 (oh->flags & HWMOD_FORCE_MSTANDBY)) {
1310 idlemode = HWMOD_IDLEMODE_FORCE;
1312 if (sf & SYSC_HAS_ENAWAKEUP)
1313 _enable_wakeup(oh, &v);
1314 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1315 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1317 idlemode = HWMOD_IDLEMODE_SMART;
1319 _set_master_standbymode(oh, idlemode, &v);
1322 /* If the cached value is the same as the new value, skip the write */
1323 if (oh->_sysc_cache != v)
1324 _write_sysconfig(v, oh);
1328 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
1329 * @oh: struct omap_hwmod *
1331 * Force the module into slave idle and master suspend. No return
1334 static void _shutdown_sysc(struct omap_hwmod *oh)
1339 if (!oh->class->sysc)
1342 v = oh->_sysc_cache;
1343 sf = oh->class->sysc->sysc_flags;
1345 if (sf & SYSC_HAS_SIDLEMODE)
1346 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
1348 if (sf & SYSC_HAS_MIDLEMODE)
1349 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
1351 if (sf & SYSC_HAS_AUTOIDLE)
1352 _set_module_autoidle(oh, 1, &v);
1354 _write_sysconfig(v, oh);
1358 * _lookup - find an omap_hwmod by name
1359 * @name: find an omap_hwmod by name
1361 * Return a pointer to an omap_hwmod by name, or NULL if not found.
1363 static struct omap_hwmod *_lookup(const char *name)
1365 struct omap_hwmod *oh, *temp_oh;
1369 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1370 if (!strcmp(name, temp_oh->name)) {
1380 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
1381 * @oh: struct omap_hwmod *
1383 * Convert a clockdomain name stored in a struct omap_hwmod into a
1384 * clockdomain pointer, and save it into the struct omap_hwmod.
1385 * Return -EINVAL if the clkdm_name lookup failed.
1387 static int _init_clkdm(struct omap_hwmod *oh)
1389 if (!oh->clkdm_name) {
1390 pr_debug("omap_hwmod: %s: missing clockdomain\n", oh->name);
1394 oh->clkdm = clkdm_lookup(oh->clkdm_name);
1396 pr_warn("omap_hwmod: %s: could not associate to clkdm %s\n",
1397 oh->name, oh->clkdm_name);
1401 pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
1402 oh->name, oh->clkdm_name);
1408 * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
1409 * well the clockdomain.
1410 * @oh: struct omap_hwmod *
1411 * @np: device_node mapped to this hwmod
1413 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
1414 * Resolves all clock names embedded in the hwmod. Returns 0 on
1415 * success, or a negative error code on failure.
1417 static int _init_clocks(struct omap_hwmod *oh, struct device_node *np)
1421 if (oh->_state != _HWMOD_STATE_REGISTERED)
1424 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
1426 if (soc_ops.init_clkdm)
1427 ret |= soc_ops.init_clkdm(oh);
1429 ret |= _init_main_clk(oh);
1430 ret |= _init_interface_clks(oh);
1431 ret |= _init_opt_clks(oh);
1434 oh->_state = _HWMOD_STATE_CLKS_INITED;
1436 pr_warn("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
1442 * _lookup_hardreset - fill register bit info for this hwmod/reset line
1443 * @oh: struct omap_hwmod *
1444 * @name: name of the reset line in the context of this hwmod
1445 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
1447 * Return the bit position of the reset line that match the
1448 * input name. Return -ENOENT if not found.
1450 static int _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1451 struct omap_hwmod_rst_info *ohri)
1455 for (i = 0; i < oh->rst_lines_cnt; i++) {
1456 const char *rst_line = oh->rst_lines[i].name;
1457 if (!strcmp(rst_line, name)) {
1458 ohri->rst_shift = oh->rst_lines[i].rst_shift;
1459 ohri->st_shift = oh->rst_lines[i].st_shift;
1460 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1461 oh->name, __func__, rst_line, ohri->rst_shift,
1472 * _assert_hardreset - assert the HW reset line of submodules
1473 * contained in the hwmod module.
1474 * @oh: struct omap_hwmod *
1475 * @name: name of the reset line to lookup and assert
1477 * Some IP like dsp, ipu or iva contain processor that require an HW
1478 * reset line to be assert / deassert in order to enable fully the IP.
1479 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1480 * asserting the hardreset line on the currently-booted SoC, or passes
1481 * along the return value from _lookup_hardreset() or the SoC's
1482 * assert_hardreset code.
1484 static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1486 struct omap_hwmod_rst_info ohri;
1492 if (!soc_ops.assert_hardreset)
1495 ret = _lookup_hardreset(oh, name, &ohri);
1499 ret = soc_ops.assert_hardreset(oh, &ohri);
1505 * _deassert_hardreset - deassert the HW reset line of submodules contained
1506 * in the hwmod module.
1507 * @oh: struct omap_hwmod *
1508 * @name: name of the reset line to look up and deassert
1510 * Some IP like dsp, ipu or iva contain processor that require an HW
1511 * reset line to be assert / deassert in order to enable fully the IP.
1512 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1513 * deasserting the hardreset line on the currently-booted SoC, or passes
1514 * along the return value from _lookup_hardreset() or the SoC's
1515 * deassert_hardreset code.
1517 static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1519 struct omap_hwmod_rst_info ohri;
1525 if (!soc_ops.deassert_hardreset)
1528 ret = _lookup_hardreset(oh, name, &ohri);
1534 * A clockdomain must be in SW_SUP otherwise reset
1535 * might not be completed. The clockdomain can be set
1536 * in HW_AUTO only when the module become ready.
1538 clkdm_deny_idle(oh->clkdm);
1539 ret = clkdm_hwmod_enable(oh->clkdm, oh);
1541 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1542 oh->name, oh->clkdm->name, ret);
1548 if (soc_ops.enable_module)
1549 soc_ops.enable_module(oh);
1551 ret = soc_ops.deassert_hardreset(oh, &ohri);
1553 if (soc_ops.disable_module)
1554 soc_ops.disable_module(oh);
1555 _disable_clocks(oh);
1558 pr_warn("omap_hwmod: %s: failed to hardreset\n", oh->name);
1562 * Set the clockdomain to HW_AUTO, assuming that the
1563 * previous state was HW_AUTO.
1565 clkdm_allow_idle(oh->clkdm);
1567 clkdm_hwmod_disable(oh->clkdm, oh);
1574 * _read_hardreset - read the HW reset line state of submodules
1575 * contained in the hwmod module
1576 * @oh: struct omap_hwmod *
1577 * @name: name of the reset line to look up and read
1579 * Return the state of the reset line. Returns -EINVAL if @oh is
1580 * null, -ENOSYS if we have no way of reading the hardreset line
1581 * status on the currently-booted SoC, or passes along the return
1582 * value from _lookup_hardreset() or the SoC's is_hardreset_asserted
1585 static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1587 struct omap_hwmod_rst_info ohri;
1593 if (!soc_ops.is_hardreset_asserted)
1596 ret = _lookup_hardreset(oh, name, &ohri);
1600 return soc_ops.is_hardreset_asserted(oh, &ohri);
1604 * _are_all_hardreset_lines_asserted - return true if the @oh is hard-reset
1605 * @oh: struct omap_hwmod *
1607 * If all hardreset lines associated with @oh are asserted, then return true.
1608 * Otherwise, if part of @oh is out hardreset or if no hardreset lines
1609 * associated with @oh are asserted, then return false.
1610 * This function is used to avoid executing some parts of the IP block
1611 * enable/disable sequence if its hardreset line is set.
1613 static bool _are_all_hardreset_lines_asserted(struct omap_hwmod *oh)
1617 if (oh->rst_lines_cnt == 0)
1620 for (i = 0; i < oh->rst_lines_cnt; i++)
1621 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1624 if (oh->rst_lines_cnt == rst_cnt)
1631 * _are_any_hardreset_lines_asserted - return true if any part of @oh is
1633 * @oh: struct omap_hwmod *
1635 * If any hardreset lines associated with @oh are asserted, then
1636 * return true. Otherwise, if no hardreset lines associated with @oh
1637 * are asserted, or if @oh has no hardreset lines, then return false.
1638 * This function is used to avoid executing some parts of the IP block
1639 * enable/disable sequence if any hardreset line is set.
1641 static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
1646 for (i = 0; i < oh->rst_lines_cnt && rst_cnt == 0; i++)
1647 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1650 return (rst_cnt) ? true : false;
1654 * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
1655 * @oh: struct omap_hwmod *
1657 * Disable the PRCM module mode related to the hwmod @oh.
1658 * Return EINVAL if the modulemode is not supported and 0 in case of success.
1660 static int _omap4_disable_module(struct omap_hwmod *oh)
1664 if (!oh->clkdm || !oh->prcm.omap4.modulemode ||
1665 _omap4_clkctrl_managed_by_clkfwk(oh))
1669 * Since integration code might still be doing something, only
1670 * disable if all lines are under hardreset.
1672 if (_are_any_hardreset_lines_asserted(oh))
1675 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1677 omap_cm_module_disable(oh->clkdm->prcm_partition, oh->clkdm->cm_inst,
1678 oh->prcm.omap4.clkctrl_offs);
1680 v = _omap4_wait_target_disable(oh);
1682 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1689 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
1690 * @oh: struct omap_hwmod *
1692 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
1693 * enabled for this to work. Returns -ENOENT if the hwmod cannot be
1694 * reset this way, -EINVAL if the hwmod is in the wrong state,
1695 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1697 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
1698 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
1699 * use the SYSCONFIG softreset bit to provide the status.
1701 * Note that some IP like McBSP do have reset control but don't have
1704 static int _ocp_softreset(struct omap_hwmod *oh)
1710 if (!oh->class->sysc ||
1711 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
1714 /* clocks must be on for this operation */
1715 if (oh->_state != _HWMOD_STATE_ENABLED) {
1716 pr_warn("omap_hwmod: %s: reset can only be entered from enabled state\n",
1721 /* For some modules, all optionnal clocks need to be enabled as well */
1722 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1723 _enable_optional_clocks(oh);
1725 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
1727 v = oh->_sysc_cache;
1728 ret = _set_softreset(oh, &v);
1732 _write_sysconfig(v, oh);
1734 if (oh->class->sysc->srst_udelay)
1735 udelay(oh->class->sysc->srst_udelay);
1737 c = _wait_softreset_complete(oh);
1738 if (c == MAX_MODULE_SOFTRESET_WAIT) {
1739 pr_warn("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1740 oh->name, MAX_MODULE_SOFTRESET_WAIT);
1744 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
1747 ret = _clear_softreset(oh, &v);
1751 _write_sysconfig(v, oh);
1754 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1755 * _wait_target_ready() or _reset()
1759 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1760 _disable_optional_clocks(oh);
1766 * _reset - reset an omap_hwmod
1767 * @oh: struct omap_hwmod *
1769 * Resets an omap_hwmod @oh. If the module has a custom reset
1770 * function pointer defined, then call it to reset the IP block, and
1771 * pass along its return value to the caller. Otherwise, if the IP
1772 * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
1773 * associated with it, call a function to reset the IP block via that
1774 * method, and pass along the return value to the caller. Finally, if
1775 * the IP block has some hardreset lines associated with it, assert
1776 * all of those, but do _not_ deassert them. (This is because driver
1777 * authors have expressed an apparent requirement to control the
1778 * deassertion of the hardreset lines themselves.)
1780 * The default software reset mechanism for most OMAP IP blocks is
1781 * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
1782 * hwmods cannot be reset via this method. Some are not targets and
1783 * therefore have no OCP header registers to access. Others (like the
1784 * IVA) have idiosyncratic reset sequences. So for these relatively
1785 * rare cases, custom reset code can be supplied in the struct
1786 * omap_hwmod_class .reset function pointer.
1788 * _set_dmadisable() is called to set the DMADISABLE bit so that it
1789 * does not prevent idling of the system. This is necessary for cases
1790 * where ROMCODE/BOOTLOADER uses dma and transfers control to the
1791 * kernel without disabling dma.
1793 * Passes along the return value from either _ocp_softreset() or the
1794 * custom reset function - these must return -EINVAL if the hwmod
1795 * cannot be reset this way or if the hwmod is in the wrong state,
1796 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1798 static int _reset(struct omap_hwmod *oh)
1802 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1804 if (oh->class->reset) {
1805 r = oh->class->reset(oh);
1807 if (oh->rst_lines_cnt > 0) {
1808 for (i = 0; i < oh->rst_lines_cnt; i++)
1809 _assert_hardreset(oh, oh->rst_lines[i].name);
1812 r = _ocp_softreset(oh);
1818 _set_dmadisable(oh);
1821 * OCP_SYSCONFIG bits need to be reprogrammed after a
1822 * softreset. The _enable() function should be split to avoid
1823 * the rewrite of the OCP_SYSCONFIG register.
1825 if (oh->class->sysc) {
1826 _update_sysc_cache(oh);
1834 * _omap4_update_context_lost - increment hwmod context loss counter if
1835 * hwmod context was lost, and clear hardware context loss reg
1836 * @oh: hwmod to check for context loss
1838 * If the PRCM indicates that the hwmod @oh lost context, increment
1839 * our in-memory context loss counter, and clear the RM_*_CONTEXT
1840 * bits. No return value.
1842 static void _omap4_update_context_lost(struct omap_hwmod *oh)
1844 if (oh->prcm.omap4.flags & HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT)
1847 if (!prm_was_any_context_lost_old(oh->clkdm->pwrdm.ptr->prcm_partition,
1848 oh->clkdm->pwrdm.ptr->prcm_offs,
1849 oh->prcm.omap4.context_offs))
1852 oh->prcm.omap4.context_lost_counter++;
1853 prm_clear_context_loss_flags_old(oh->clkdm->pwrdm.ptr->prcm_partition,
1854 oh->clkdm->pwrdm.ptr->prcm_offs,
1855 oh->prcm.omap4.context_offs);
1859 * _omap4_get_context_lost - get context loss counter for a hwmod
1860 * @oh: hwmod to get context loss counter for
1862 * Returns the in-memory context loss counter for a hwmod.
1864 static int _omap4_get_context_lost(struct omap_hwmod *oh)
1866 return oh->prcm.omap4.context_lost_counter;
1870 * _enable_preprogram - Pre-program an IP block during the _enable() process
1871 * @oh: struct omap_hwmod *
1873 * Some IP blocks (such as AESS) require some additional programming
1874 * after enable before they can enter idle. If a function pointer to
1875 * do so is present in the hwmod data, then call it and pass along the
1876 * return value; otherwise, return 0.
1878 static int _enable_preprogram(struct omap_hwmod *oh)
1880 if (!oh->class->enable_preprogram)
1883 return oh->class->enable_preprogram(oh);
1887 * _enable - enable an omap_hwmod
1888 * @oh: struct omap_hwmod *
1890 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
1891 * register target. Returns -EINVAL if the hwmod is in the wrong
1892 * state or passes along the return value of _wait_target_ready().
1894 static int _enable(struct omap_hwmod *oh)
1898 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
1901 * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
1904 if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
1905 oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
1909 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1910 oh->_state != _HWMOD_STATE_IDLE &&
1911 oh->_state != _HWMOD_STATE_DISABLED) {
1912 WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
1918 * If an IP block contains HW reset lines and all of them are
1919 * asserted, we let integration code associated with that
1920 * block handle the enable. We've received very little
1921 * information on what those driver authors need, and until
1922 * detailed information is provided and the driver code is
1923 * posted to the public lists, this is probably the best we
1926 if (_are_all_hardreset_lines_asserted(oh))
1929 _add_initiator_dep(oh, mpu_oh);
1933 * A clockdomain must be in SW_SUP before enabling
1934 * completely the module. The clockdomain can be set
1935 * in HW_AUTO only when the module become ready.
1937 clkdm_deny_idle(oh->clkdm);
1938 r = clkdm_hwmod_enable(oh->clkdm, oh);
1940 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1941 oh->name, oh->clkdm->name, r);
1947 if (soc_ops.enable_module)
1948 soc_ops.enable_module(oh);
1949 if (oh->flags & HWMOD_BLOCK_WFI)
1950 cpu_idle_poll_ctrl(true);
1952 if (soc_ops.update_context_lost)
1953 soc_ops.update_context_lost(oh);
1955 r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) :
1957 if (oh->clkdm && !(oh->flags & HWMOD_CLKDM_NOAUTO))
1958 clkdm_allow_idle(oh->clkdm);
1961 oh->_state = _HWMOD_STATE_ENABLED;
1963 /* Access the sysconfig only if the target is ready */
1964 if (oh->class->sysc) {
1965 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
1966 _update_sysc_cache(oh);
1969 r = _enable_preprogram(oh);
1971 if (soc_ops.disable_module)
1972 soc_ops.disable_module(oh);
1973 _disable_clocks(oh);
1974 pr_err("omap_hwmod: %s: _wait_target_ready failed: %d\n",
1978 clkdm_hwmod_disable(oh->clkdm, oh);
1985 * _idle - idle an omap_hwmod
1986 * @oh: struct omap_hwmod *
1988 * Idles an omap_hwmod @oh. This should be called once the hwmod has
1989 * no further work. Returns -EINVAL if the hwmod is in the wrong
1990 * state or returns 0.
1992 static int _idle(struct omap_hwmod *oh)
1994 if (oh->flags & HWMOD_NO_IDLE) {
1995 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
1999 pr_debug("omap_hwmod: %s: idling\n", oh->name);
2001 if (_are_all_hardreset_lines_asserted(oh))
2004 if (oh->_state != _HWMOD_STATE_ENABLED) {
2005 WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
2010 if (oh->class->sysc)
2012 _del_initiator_dep(oh, mpu_oh);
2015 * If HWMOD_CLKDM_NOAUTO is set then we don't
2016 * deny idle the clkdm again since idle was already denied
2019 if (oh->clkdm && !(oh->flags & HWMOD_CLKDM_NOAUTO))
2020 clkdm_deny_idle(oh->clkdm);
2022 if (oh->flags & HWMOD_BLOCK_WFI)
2023 cpu_idle_poll_ctrl(false);
2024 if (soc_ops.disable_module)
2025 soc_ops.disable_module(oh);
2028 * The module must be in idle mode before disabling any parents
2029 * clocks. Otherwise, the parent clock might be disabled before
2030 * the module transition is done, and thus will prevent the
2031 * transition to complete properly.
2033 _disable_clocks(oh);
2035 clkdm_allow_idle(oh->clkdm);
2036 clkdm_hwmod_disable(oh->clkdm, oh);
2039 oh->_state = _HWMOD_STATE_IDLE;
2045 * _shutdown - shutdown an omap_hwmod
2046 * @oh: struct omap_hwmod *
2048 * Shut down an omap_hwmod @oh. This should be called when the driver
2049 * used for the hwmod is removed or unloaded or if the driver is not
2050 * used by the system. Returns -EINVAL if the hwmod is in the wrong
2051 * state or returns 0.
2053 static int _shutdown(struct omap_hwmod *oh)
2058 if (_are_all_hardreset_lines_asserted(oh))
2061 if (oh->_state != _HWMOD_STATE_IDLE &&
2062 oh->_state != _HWMOD_STATE_ENABLED) {
2063 WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
2068 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
2070 if (oh->class->pre_shutdown) {
2071 prev_state = oh->_state;
2072 if (oh->_state == _HWMOD_STATE_IDLE)
2074 ret = oh->class->pre_shutdown(oh);
2076 if (prev_state == _HWMOD_STATE_IDLE)
2082 if (oh->class->sysc) {
2083 if (oh->_state == _HWMOD_STATE_IDLE)
2088 /* clocks and deps are already disabled in idle */
2089 if (oh->_state == _HWMOD_STATE_ENABLED) {
2090 _del_initiator_dep(oh, mpu_oh);
2091 /* XXX what about the other system initiators here? dma, dsp */
2092 if (oh->flags & HWMOD_BLOCK_WFI)
2093 cpu_idle_poll_ctrl(false);
2094 if (soc_ops.disable_module)
2095 soc_ops.disable_module(oh);
2096 _disable_clocks(oh);
2098 clkdm_hwmod_disable(oh->clkdm, oh);
2100 /* XXX Should this code also force-disable the optional clocks? */
2102 for (i = 0; i < oh->rst_lines_cnt; i++)
2103 _assert_hardreset(oh, oh->rst_lines[i].name);
2105 oh->_state = _HWMOD_STATE_DISABLED;
2110 static int of_dev_find_hwmod(struct device_node *np,
2111 struct omap_hwmod *oh)
2116 count = of_property_count_strings(np, "ti,hwmods");
2120 for (i = 0; i < count; i++) {
2121 res = of_property_read_string_index(np, "ti,hwmods",
2125 if (!strcmp(p, oh->name)) {
2126 pr_debug("omap_hwmod: dt %pOFn[%i] uses hwmod %s\n",
2136 * of_dev_hwmod_lookup - look up needed hwmod from dt blob
2137 * @np: struct device_node *
2138 * @oh: struct omap_hwmod *
2139 * @index: index of the entry found
2140 * @found: struct device_node * found or NULL
2142 * Parse the dt blob and find out needed hwmod. Recursive function is
2143 * implemented to take care hierarchical dt blob parsing.
2144 * Return: Returns 0 on success, -ENODEV when not found.
2146 static int of_dev_hwmod_lookup(struct device_node *np,
2147 struct omap_hwmod *oh,
2149 struct device_node **found)
2151 struct device_node *np0 = NULL;
2154 res = of_dev_find_hwmod(np, oh);
2161 for_each_child_of_node(np, np0) {
2162 struct device_node *fc;
2165 res = of_dev_hwmod_lookup(np0, oh, &i, &fc);
2180 * omap_hwmod_fix_mpu_rt_idx - fix up mpu_rt_idx register offsets
2182 * @oh: struct omap_hwmod *
2183 * @np: struct device_node *
2185 * Fix up module register offsets for modules with mpu_rt_idx.
2186 * Only needed for cpsw with interconnect target module defined
2187 * in device tree while still using legacy hwmod platform data
2188 * for rev, sysc and syss registers.
2190 * Can be removed when all cpsw hwmod platform data has been
2193 static void omap_hwmod_fix_mpu_rt_idx(struct omap_hwmod *oh,
2194 struct device_node *np,
2195 struct resource *res)
2197 struct device_node *child = NULL;
2200 child = of_get_next_child(np, child);
2204 error = of_address_to_resource(child, oh->mpu_rt_idx, res);
2206 pr_err("%s: error mapping mpu_rt_idx: %i\n",
2211 * omap_hwmod_parse_module_range - map module IO range from device tree
2212 * @oh: struct omap_hwmod *
2213 * @np: struct device_node *
2215 * Parse the device tree range an interconnect target module provides
2216 * for it's child device IP blocks. This way we can support the old
2217 * "ti,hwmods" property with just dts data without a need for platform
2218 * data for IO resources. And we don't need all the child IP device
2219 * nodes available in the dts.
2221 int omap_hwmod_parse_module_range(struct omap_hwmod *oh,
2222 struct device_node *np,
2223 struct resource *res)
2225 struct property *prop;
2226 const __be32 *ranges;
2228 u32 nr_addr, nr_size;
2235 ranges = of_get_property(np, "ranges", &len);
2239 len /= sizeof(*ranges);
2244 of_property_for_each_string(np, "compatible", prop, name)
2245 if (!strncmp("ti,sysc-", name, 8))
2251 error = of_property_read_u32(np, "#address-cells", &nr_addr);
2255 error = of_property_read_u32(np, "#size-cells", &nr_size);
2259 if (nr_addr != 1 || nr_size != 1) {
2260 pr_err("%s: invalid range for %s->%pOFn\n", __func__,
2266 base = of_translate_address(np, ranges++);
2267 size = be32_to_cpup(ranges);
2269 pr_debug("omap_hwmod: %s %pOFn at 0x%llx size 0x%llx\n",
2270 oh->name, np, base, size);
2272 if (oh && oh->mpu_rt_idx) {
2273 omap_hwmod_fix_mpu_rt_idx(oh, np, res);
2279 res->end = base + size - 1;
2280 res->flags = IORESOURCE_MEM;
2286 * _init_mpu_rt_base - populate the virtual address for a hwmod
2287 * @oh: struct omap_hwmod * to locate the virtual address
2288 * @data: (unused, caller should pass NULL)
2289 * @index: index of the reg entry iospace in device tree
2290 * @np: struct device_node * of the IP block's device node in the DT data
2292 * Cache the virtual address used by the MPU to access this IP block's
2293 * registers. This address is needed early so the OCP registers that
2294 * are part of the device's address space can be ioremapped properly.
2296 * If SYSC access is not needed, the registers will not be remapped
2297 * and non-availability of MPU access is not treated as an error.
2299 * Returns 0 on success, -EINVAL if an invalid hwmod is passed, and
2300 * -ENXIO on absent or invalid register target address space.
2302 static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data,
2303 int index, struct device_node *np)
2305 void __iomem *va_start = NULL;
2306 struct resource res;
2312 _save_mpu_port_index(oh);
2314 /* if we don't need sysc access we don't need to ioremap */
2315 if (!oh->class->sysc)
2318 /* we can't continue without MPU PORT if we need sysc access */
2319 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2323 pr_err("omap_hwmod: %s: no dt node\n", oh->name);
2327 /* Do we have a dts range for the interconnect target module? */
2328 error = omap_hwmod_parse_module_range(oh, np, &res);
2330 va_start = ioremap(res.start, resource_size(&res));
2332 /* No ranges, rely on device reg entry */
2334 va_start = of_iomap(np, index + oh->mpu_rt_idx);
2336 pr_err("omap_hwmod: %s: Missing dt reg%i for %pOF\n",
2337 oh->name, index, np);
2341 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
2342 oh->name, va_start);
2344 oh->_mpu_rt_va = va_start;
2348 static void __init parse_module_flags(struct omap_hwmod *oh,
2349 struct device_node *np)
2351 if (of_find_property(np, "ti,no-reset-on-init", NULL))
2352 oh->flags |= HWMOD_INIT_NO_RESET;
2353 if (of_find_property(np, "ti,no-idle-on-init", NULL))
2354 oh->flags |= HWMOD_INIT_NO_IDLE;
2355 if (of_find_property(np, "ti,no-idle", NULL))
2356 oh->flags |= HWMOD_NO_IDLE;
2360 * _init - initialize internal data for the hwmod @oh
2361 * @oh: struct omap_hwmod *
2364 * Look up the clocks and the address space used by the MPU to access
2365 * registers belonging to the hwmod @oh. @oh must already be
2366 * registered at this point. This is the first of two phases for
2367 * hwmod initialization. Code called here does not touch any hardware
2368 * registers, it simply prepares internal data structures. Returns 0
2369 * upon success or if the hwmod isn't registered or if the hwmod's
2370 * address space is not defined, or -EINVAL upon failure.
2372 static int __init _init(struct omap_hwmod *oh, void *data)
2375 struct device_node *np = NULL;
2376 struct device_node *bus;
2378 if (oh->_state != _HWMOD_STATE_REGISTERED)
2381 bus = of_find_node_by_name(NULL, "ocp");
2385 r = of_dev_hwmod_lookup(bus, oh, &index, &np);
2387 pr_debug("omap_hwmod: %s missing dt data\n", oh->name);
2388 else if (np && index)
2389 pr_warn("omap_hwmod: %s using broken dt data from %pOFn\n",
2392 r = _init_mpu_rt_base(oh, NULL, index, np);
2394 WARN(1, "omap_hwmod: %s: doesn't have mpu register target base\n",
2399 r = _init_clocks(oh, np);
2401 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
2406 struct device_node *child;
2408 parse_module_flags(oh, np);
2409 child = of_get_next_child(np, NULL);
2411 parse_module_flags(oh, child);
2414 oh->_state = _HWMOD_STATE_INITIALIZED;
2420 * _setup_iclk_autoidle - configure an IP block's interface clocks
2421 * @oh: struct omap_hwmod *
2423 * Set up the module's interface clocks. XXX This function is still mostly
2424 * a stub; implementing this properly requires iclk autoidle usecounting in
2425 * the clock code. No return value.
2427 static void _setup_iclk_autoidle(struct omap_hwmod *oh)
2429 struct omap_hwmod_ocp_if *os;
2431 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2434 list_for_each_entry(os, &oh->slave_ports, node) {
2438 if (os->flags & OCPIF_SWSUP_IDLE) {
2439 /* XXX omap_iclk_deny_idle(c); */
2441 /* XXX omap_iclk_allow_idle(c); */
2442 clk_enable(os->_clk);
2450 * _setup_reset - reset an IP block during the setup process
2451 * @oh: struct omap_hwmod *
2453 * Reset the IP block corresponding to the hwmod @oh during the setup
2454 * process. The IP block is first enabled so it can be successfully
2455 * reset. Returns 0 upon success or a negative error code upon
2458 static int _setup_reset(struct omap_hwmod *oh)
2462 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2465 if (oh->flags & HWMOD_EXT_OPT_MAIN_CLK)
2468 if (oh->rst_lines_cnt == 0) {
2471 pr_warn("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
2472 oh->name, oh->_state);
2477 if (!(oh->flags & HWMOD_INIT_NO_RESET))
2484 * _setup_postsetup - transition to the appropriate state after _setup
2485 * @oh: struct omap_hwmod *
2487 * Place an IP block represented by @oh into a "post-setup" state --
2488 * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
2489 * this function is called at the end of _setup().) The postsetup
2490 * state for an IP block can be changed by calling
2491 * omap_hwmod_enter_postsetup_state() early in the boot process,
2492 * before one of the omap_hwmod_setup*() functions are called for the
2495 * The IP block stays in this state until a PM runtime-based driver is
2496 * loaded for that IP block. A post-setup state of IDLE is
2497 * appropriate for almost all IP blocks with runtime PM-enabled
2498 * drivers, since those drivers are able to enable the IP block. A
2499 * post-setup state of ENABLED is appropriate for kernels with PM
2500 * runtime disabled. The DISABLED state is appropriate for unusual IP
2501 * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
2502 * included, since the WDTIMER starts running on reset and will reset
2503 * the MPU if left active.
2505 * This post-setup mechanism is deprecated. Once all of the OMAP
2506 * drivers have been converted to use PM runtime, and all of the IP
2507 * block data and interconnect data is available to the hwmod code, it
2508 * should be possible to replace this mechanism with a "lazy reset"
2509 * arrangement. In a "lazy reset" setup, each IP block is enabled
2510 * when the driver first probes, then all remaining IP blocks without
2511 * drivers are either shut down or enabled after the drivers have
2512 * loaded. However, this cannot take place until the above
2513 * preconditions have been met, since otherwise the late reset code
2514 * has no way of knowing which IP blocks are in use by drivers, and
2515 * which ones are unused.
2519 static void _setup_postsetup(struct omap_hwmod *oh)
2523 if (oh->rst_lines_cnt > 0)
2526 postsetup_state = oh->_postsetup_state;
2527 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
2528 postsetup_state = _HWMOD_STATE_ENABLED;
2531 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
2532 * it should be set by the core code as a runtime flag during startup
2534 if ((oh->flags & (HWMOD_INIT_NO_IDLE | HWMOD_NO_IDLE)) &&
2535 (postsetup_state == _HWMOD_STATE_IDLE)) {
2536 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
2537 postsetup_state = _HWMOD_STATE_ENABLED;
2540 if (postsetup_state == _HWMOD_STATE_IDLE)
2542 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2544 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2545 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2546 oh->name, postsetup_state);
2552 * _setup - prepare IP block hardware for use
2553 * @oh: struct omap_hwmod *
2554 * @n: (unused, pass NULL)
2556 * Configure the IP block represented by @oh. This may include
2557 * enabling the IP block, resetting it, and placing it into a
2558 * post-setup state, depending on the type of IP block and applicable
2559 * flags. IP blocks are reset to prevent any previous configuration
2560 * by the bootloader or previous operating system from interfering
2561 * with power management or other parts of the system. The reset can
2562 * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
2563 * two phases for hwmod initialization. Code called here generally
2564 * affects the IP block hardware, or system integration hardware
2565 * associated with the IP block. Returns 0.
2567 static int _setup(struct omap_hwmod *oh, void *data)
2569 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2572 if (oh->parent_hwmod) {
2575 r = _enable(oh->parent_hwmod);
2576 WARN(r, "hwmod: %s: setup: failed to enable parent hwmod %s\n",
2577 oh->name, oh->parent_hwmod->name);
2580 _setup_iclk_autoidle(oh);
2582 if (!_setup_reset(oh))
2583 _setup_postsetup(oh);
2585 if (oh->parent_hwmod) {
2588 postsetup_state = oh->parent_hwmod->_postsetup_state;
2590 if (postsetup_state == _HWMOD_STATE_IDLE)
2591 _idle(oh->parent_hwmod);
2592 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2593 _shutdown(oh->parent_hwmod);
2594 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2595 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2596 oh->parent_hwmod->name, postsetup_state);
2603 * _register - register a struct omap_hwmod
2604 * @oh: struct omap_hwmod *
2606 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
2607 * already has been registered by the same name; -EINVAL if the
2608 * omap_hwmod is in the wrong state, if @oh is NULL, if the
2609 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
2610 * name, or if the omap_hwmod's class is missing a name; or 0 upon
2613 * XXX The data should be copied into bootmem, so the original data
2614 * should be marked __initdata and freed after init. This would allow
2615 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
2616 * that the copy process would be relatively complex due to the large number
2619 static int __init _register(struct omap_hwmod *oh)
2621 if (!oh || !oh->name || !oh->class || !oh->class->name ||
2622 (oh->_state != _HWMOD_STATE_UNKNOWN))
2625 pr_debug("omap_hwmod: %s: registering\n", oh->name);
2627 if (_lookup(oh->name))
2630 list_add_tail(&oh->node, &omap_hwmod_list);
2632 INIT_LIST_HEAD(&oh->slave_ports);
2633 spin_lock_init(&oh->_lock);
2634 lockdep_set_class(&oh->_lock, &oh->hwmod_key);
2636 oh->_state = _HWMOD_STATE_REGISTERED;
2639 * XXX Rather than doing a strcmp(), this should test a flag
2640 * set in the hwmod data, inserted by the autogenerator code.
2642 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
2649 * _add_link - add an interconnect between two IP blocks
2650 * @oi: pointer to a struct omap_hwmod_ocp_if record
2652 * Add struct omap_hwmod_link records connecting the slave IP block
2653 * specified in @oi->slave to @oi. This code is assumed to run before
2654 * preemption or SMP has been enabled, thus avoiding the need for
2655 * locking in this code. Changes to this assumption will require
2656 * additional locking. Returns 0.
2658 static int __init _add_link(struct omap_hwmod_ocp_if *oi)
2660 pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name,
2663 list_add(&oi->node, &oi->slave->slave_ports);
2664 oi->slave->slaves_cnt++;
2670 * _register_link - register a struct omap_hwmod_ocp_if
2671 * @oi: struct omap_hwmod_ocp_if *
2673 * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it
2674 * has already been registered; -EINVAL if @oi is NULL or if the
2675 * record pointed to by @oi is missing required fields; or 0 upon
2678 * XXX The data should be copied into bootmem, so the original data
2679 * should be marked __initdata and freed after init. This would allow
2680 * unneeded omap_hwmods to be freed on multi-OMAP configurations.
2682 static int __init _register_link(struct omap_hwmod_ocp_if *oi)
2684 if (!oi || !oi->master || !oi->slave || !oi->user)
2687 if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED)
2690 pr_debug("omap_hwmod: registering link from %s to %s\n",
2691 oi->master->name, oi->slave->name);
2694 * Register the connected hwmods, if they haven't been
2695 * registered already
2697 if (oi->master->_state != _HWMOD_STATE_REGISTERED)
2698 _register(oi->master);
2700 if (oi->slave->_state != _HWMOD_STATE_REGISTERED)
2701 _register(oi->slave);
2705 oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED;
2710 /* Static functions intended only for use in soc_ops field function pointers */
2713 * _omap2xxx_3xxx_wait_target_ready - wait for a module to leave slave idle
2714 * @oh: struct omap_hwmod *
2716 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2717 * does not have an IDLEST bit or if the module successfully leaves
2718 * slave idle; otherwise, pass along the return value of the
2719 * appropriate *_cm*_wait_module_ready() function.
2721 static int _omap2xxx_3xxx_wait_target_ready(struct omap_hwmod *oh)
2726 if (oh->flags & HWMOD_NO_IDLEST)
2729 if (!_find_mpu_rt_port(oh))
2732 /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
2734 return omap_cm_wait_module_ready(0, oh->prcm.omap2.module_offs,
2735 oh->prcm.omap2.idlest_reg_id,
2736 oh->prcm.omap2.idlest_idle_bit);
2740 * _omap4_wait_target_ready - wait for a module to leave slave idle
2741 * @oh: struct omap_hwmod *
2743 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2744 * does not have an IDLEST bit or if the module successfully leaves
2745 * slave idle; otherwise, pass along the return value of the
2746 * appropriate *_cm*_wait_module_ready() function.
2748 static int _omap4_wait_target_ready(struct omap_hwmod *oh)
2753 if (oh->flags & HWMOD_NO_IDLEST || !oh->clkdm)
2756 if (!_find_mpu_rt_port(oh))
2759 if (_omap4_clkctrl_managed_by_clkfwk(oh))
2762 if (!_omap4_has_clkctrl_clock(oh))
2765 /* XXX check module SIDLEMODE, hardreset status */
2767 return omap_cm_wait_module_ready(oh->clkdm->prcm_partition,
2769 oh->prcm.omap4.clkctrl_offs, 0);
2773 * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2774 * @oh: struct omap_hwmod * to assert hardreset
2775 * @ohri: hardreset line data
2777 * Call omap2_prm_assert_hardreset() with parameters extracted from
2778 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2779 * use as an soc_ops function pointer. Passes along the return value
2780 * from omap2_prm_assert_hardreset(). XXX This function is scheduled
2781 * for removal when the PRM code is moved into drivers/.
2783 static int _omap2_assert_hardreset(struct omap_hwmod *oh,
2784 struct omap_hwmod_rst_info *ohri)
2786 return omap_prm_assert_hardreset(ohri->rst_shift, 0,
2787 oh->prcm.omap2.module_offs, 0);
2791 * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2792 * @oh: struct omap_hwmod * to deassert hardreset
2793 * @ohri: hardreset line data
2795 * Call omap2_prm_deassert_hardreset() with parameters extracted from
2796 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2797 * use as an soc_ops function pointer. Passes along the return value
2798 * from omap2_prm_deassert_hardreset(). XXX This function is
2799 * scheduled for removal when the PRM code is moved into drivers/.
2801 static int _omap2_deassert_hardreset(struct omap_hwmod *oh,
2802 struct omap_hwmod_rst_info *ohri)
2804 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift, 0,
2805 oh->prcm.omap2.module_offs, 0, 0);
2809 * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args
2810 * @oh: struct omap_hwmod * to test hardreset
2811 * @ohri: hardreset line data
2813 * Call omap2_prm_is_hardreset_asserted() with parameters extracted
2814 * from the hwmod @oh and the hardreset line data @ohri. Only
2815 * intended for use as an soc_ops function pointer. Passes along the
2816 * return value from omap2_prm_is_hardreset_asserted(). XXX This
2817 * function is scheduled for removal when the PRM code is moved into
2820 static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh,
2821 struct omap_hwmod_rst_info *ohri)
2823 return omap_prm_is_hardreset_asserted(ohri->st_shift, 0,
2824 oh->prcm.omap2.module_offs, 0);
2828 * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2829 * @oh: struct omap_hwmod * to assert hardreset
2830 * @ohri: hardreset line data
2832 * Call omap4_prminst_assert_hardreset() with parameters extracted
2833 * from the hwmod @oh and the hardreset line data @ohri. Only
2834 * intended for use as an soc_ops function pointer. Passes along the
2835 * return value from omap4_prminst_assert_hardreset(). XXX This
2836 * function is scheduled for removal when the PRM code is moved into
2839 static int _omap4_assert_hardreset(struct omap_hwmod *oh,
2840 struct omap_hwmod_rst_info *ohri)
2845 return omap_prm_assert_hardreset(ohri->rst_shift,
2846 oh->clkdm->pwrdm.ptr->prcm_partition,
2847 oh->clkdm->pwrdm.ptr->prcm_offs,
2848 oh->prcm.omap4.rstctrl_offs);
2852 * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2853 * @oh: struct omap_hwmod * to deassert hardreset
2854 * @ohri: hardreset line data
2856 * Call omap4_prminst_deassert_hardreset() with parameters extracted
2857 * from the hwmod @oh and the hardreset line data @ohri. Only
2858 * intended for use as an soc_ops function pointer. Passes along the
2859 * return value from omap4_prminst_deassert_hardreset(). XXX This
2860 * function is scheduled for removal when the PRM code is moved into
2863 static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
2864 struct omap_hwmod_rst_info *ohri)
2870 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
2871 oh->name, ohri->name);
2872 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->rst_shift,
2873 oh->clkdm->pwrdm.ptr->prcm_partition,
2874 oh->clkdm->pwrdm.ptr->prcm_offs,
2875 oh->prcm.omap4.rstctrl_offs,
2876 oh->prcm.omap4.rstctrl_offs +
2877 OMAP4_RST_CTRL_ST_OFFSET);
2881 * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args
2882 * @oh: struct omap_hwmod * to test hardreset
2883 * @ohri: hardreset line data
2885 * Call omap4_prminst_is_hardreset_asserted() with parameters
2886 * extracted from the hwmod @oh and the hardreset line data @ohri.
2887 * Only intended for use as an soc_ops function pointer. Passes along
2888 * the return value from omap4_prminst_is_hardreset_asserted(). XXX
2889 * This function is scheduled for removal when the PRM code is moved
2892 static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
2893 struct omap_hwmod_rst_info *ohri)
2898 return omap_prm_is_hardreset_asserted(ohri->rst_shift,
2899 oh->clkdm->pwrdm.ptr->
2901 oh->clkdm->pwrdm.ptr->prcm_offs,
2902 oh->prcm.omap4.rstctrl_offs);
2906 * _omap4_disable_direct_prcm - disable direct PRCM control for hwmod
2907 * @oh: struct omap_hwmod * to disable control for
2909 * Disables direct PRCM clkctrl done by hwmod core. Instead, the hwmod
2910 * will be using its main_clk to enable/disable the module. Returns
2913 static int _omap4_disable_direct_prcm(struct omap_hwmod *oh)
2918 oh->prcm.omap4.flags |= HWMOD_OMAP4_CLKFWK_CLKCTR_CLOCK;
2924 * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args
2925 * @oh: struct omap_hwmod * to deassert hardreset
2926 * @ohri: hardreset line data
2928 * Call am33xx_prminst_deassert_hardreset() with parameters extracted
2929 * from the hwmod @oh and the hardreset line data @ohri. Only
2930 * intended for use as an soc_ops function pointer. Passes along the
2931 * return value from am33xx_prminst_deassert_hardreset(). XXX This
2932 * function is scheduled for removal when the PRM code is moved into
2935 static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
2936 struct omap_hwmod_rst_info *ohri)
2938 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift,
2939 oh->clkdm->pwrdm.ptr->prcm_partition,
2940 oh->clkdm->pwrdm.ptr->prcm_offs,
2941 oh->prcm.omap4.rstctrl_offs,
2942 oh->prcm.omap4.rstst_offs);
2945 /* Public functions */
2947 u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
2949 if (oh->flags & HWMOD_16BIT_REG)
2950 return readw_relaxed(oh->_mpu_rt_va + reg_offs);
2952 return readl_relaxed(oh->_mpu_rt_va + reg_offs);
2955 void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
2957 if (oh->flags & HWMOD_16BIT_REG)
2958 writew_relaxed(v, oh->_mpu_rt_va + reg_offs);
2960 writel_relaxed(v, oh->_mpu_rt_va + reg_offs);
2964 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
2965 * @oh: struct omap_hwmod *
2967 * This is a public function exposed to drivers. Some drivers may need to do
2968 * some settings before and after resetting the device. Those drivers after
2969 * doing the necessary settings could use this function to start a reset by
2970 * setting the SYSCONFIG.SOFTRESET bit.
2972 int omap_hwmod_softreset(struct omap_hwmod *oh)
2977 if (!oh || !(oh->_sysc_cache))
2980 v = oh->_sysc_cache;
2981 ret = _set_softreset(oh, &v);
2984 _write_sysconfig(v, oh);
2986 ret = _clear_softreset(oh, &v);
2989 _write_sysconfig(v, oh);
2996 * omap_hwmod_lookup - look up a registered omap_hwmod by name
2997 * @name: name of the omap_hwmod to look up
2999 * Given a @name of an omap_hwmod, return a pointer to the registered
3000 * struct omap_hwmod *, or NULL upon error.
3002 struct omap_hwmod *omap_hwmod_lookup(const char *name)
3004 struct omap_hwmod *oh;
3015 * omap_hwmod_for_each - call function for each registered omap_hwmod
3016 * @fn: pointer to a callback function
3017 * @data: void * data to pass to callback function
3019 * Call @fn for each registered omap_hwmod, passing @data to each
3020 * function. @fn must return 0 for success or any other value for
3021 * failure. If @fn returns non-zero, the iteration across omap_hwmods
3022 * will stop and the non-zero return value will be passed to the
3023 * caller of omap_hwmod_for_each(). @fn is called with
3024 * omap_hwmod_for_each() held.
3026 int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
3029 struct omap_hwmod *temp_oh;
3035 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3036 ret = (*fn)(temp_oh, data);
3045 * omap_hwmod_register_links - register an array of hwmod links
3046 * @ois: pointer to an array of omap_hwmod_ocp_if to register
3048 * Intended to be called early in boot before the clock framework is
3049 * initialized. If @ois is not null, will register all omap_hwmods
3050 * listed in @ois that are valid for this chip. Returns -EINVAL if
3051 * omap_hwmod_init() hasn't been called before calling this function,
3052 * -ENOMEM if the link memory area can't be allocated, or 0 upon
3055 int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
3065 if (ois[0] == NULL) /* Empty list */
3070 r = _register_link(ois[i]);
3071 WARN(r && r != -EEXIST,
3072 "omap_hwmod: _register_link(%s -> %s) returned %d\n",
3073 ois[i]->master->name, ois[i]->slave->name, r);
3080 * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
3081 * @oh: pointer to the hwmod currently being set up (usually not the MPU)
3083 * If the hwmod data corresponding to the MPU subsystem IP block
3084 * hasn't been initialized and set up yet, do so now. This must be
3085 * done first since sleep dependencies may be added from other hwmods
3086 * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
3089 static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
3091 if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
3092 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
3093 __func__, MPU_INITIATOR_NAME);
3094 else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
3095 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
3099 * omap_hwmod_setup_one - set up a single hwmod
3100 * @oh_name: const char * name of the already-registered hwmod to set up
3102 * Initialize and set up a single hwmod. Intended to be used for a
3103 * small number of early devices, such as the timer IP blocks used for
3104 * the scheduler clock. Must be called after omap2_clk_init().
3105 * Resolves the struct clk names to struct clk pointers for each
3106 * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
3107 * -EINVAL upon error or 0 upon success.
3109 int __init omap_hwmod_setup_one(const char *oh_name)
3111 struct omap_hwmod *oh;
3113 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
3115 oh = _lookup(oh_name);
3117 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
3121 _ensure_mpu_hwmod_is_setup(oh);
3129 static void omap_hwmod_check_one(struct device *dev,
3130 const char *name, s8 v1, u8 v2)
3136 dev_warn(dev, "%s %d != %d\n", name, v1, v2);
3140 * omap_hwmod_check_sysc - check sysc against platform sysc
3141 * @dev: struct device
3142 * @data: module data
3143 * @sysc_fields: new sysc configuration
3145 static int omap_hwmod_check_sysc(struct device *dev,
3146 const struct ti_sysc_module_data *data,
3147 struct sysc_regbits *sysc_fields)
3149 const struct sysc_regbits *regbits = data->cap->regbits;
3151 omap_hwmod_check_one(dev, "dmadisable_shift",
3152 regbits->dmadisable_shift,
3153 sysc_fields->dmadisable_shift);
3154 omap_hwmod_check_one(dev, "midle_shift",
3155 regbits->midle_shift,
3156 sysc_fields->midle_shift);
3157 omap_hwmod_check_one(dev, "sidle_shift",
3158 regbits->sidle_shift,
3159 sysc_fields->sidle_shift);
3160 omap_hwmod_check_one(dev, "clkact_shift",
3161 regbits->clkact_shift,
3162 sysc_fields->clkact_shift);
3163 omap_hwmod_check_one(dev, "enwkup_shift",
3164 regbits->enwkup_shift,
3165 sysc_fields->enwkup_shift);
3166 omap_hwmod_check_one(dev, "srst_shift",
3167 regbits->srst_shift,
3168 sysc_fields->srst_shift);
3169 omap_hwmod_check_one(dev, "autoidle_shift",
3170 regbits->autoidle_shift,
3171 sysc_fields->autoidle_shift);
3177 * omap_hwmod_init_regbits - init sysconfig specific register bits
3178 * @dev: struct device
3179 * @data: module data
3180 * @sysc_fields: new sysc configuration
3182 static int omap_hwmod_init_regbits(struct device *dev,
3183 const struct ti_sysc_module_data *data,
3184 struct sysc_regbits **sysc_fields)
3186 *sysc_fields = NULL;
3188 switch (data->cap->type) {
3190 case TI_SYSC_OMAP2_TIMER:
3191 *sysc_fields = &omap_hwmod_sysc_type1;
3193 case TI_SYSC_OMAP3_SHAM:
3194 *sysc_fields = &omap3_sham_sysc_fields;
3196 case TI_SYSC_OMAP3_AES:
3197 *sysc_fields = &omap3xxx_aes_sysc_fields;
3200 case TI_SYSC_OMAP4_TIMER:
3201 *sysc_fields = &omap_hwmod_sysc_type2;
3203 case TI_SYSC_OMAP4_SIMPLE:
3204 *sysc_fields = &omap_hwmod_sysc_type3;
3206 case TI_SYSC_OMAP34XX_SR:
3207 *sysc_fields = &omap34xx_sr_sysc_fields;
3209 case TI_SYSC_OMAP36XX_SR:
3210 *sysc_fields = &omap36xx_sr_sysc_fields;
3212 case TI_SYSC_OMAP4_SR:
3213 *sysc_fields = &omap36xx_sr_sysc_fields;
3215 case TI_SYSC_OMAP4_MCASP:
3216 *sysc_fields = &omap_hwmod_sysc_type_mcasp;
3218 case TI_SYSC_OMAP4_USB_HOST_FS:
3219 *sysc_fields = &omap_hwmod_sysc_type_usb_host_fs;
3225 return omap_hwmod_check_sysc(dev, data, *sysc_fields);
3229 * omap_hwmod_init_reg_offs - initialize sysconfig register offsets
3230 * @dev: struct device
3231 * @data: module data
3232 * @rev_offs: revision register offset
3233 * @sysc_offs: sysc register offset
3234 * @syss_offs: syss register offset
3236 int omap_hwmod_init_reg_offs(struct device *dev,
3237 const struct ti_sysc_module_data *data,
3238 s32 *rev_offs, s32 *sysc_offs, s32 *syss_offs)
3240 *rev_offs = -ENODEV;
3244 if (data->offsets[SYSC_REVISION] >= 0)
3245 *rev_offs = data->offsets[SYSC_REVISION];
3247 if (data->offsets[SYSC_SYSCONFIG] >= 0)
3248 *sysc_offs = data->offsets[SYSC_SYSCONFIG];
3250 if (data->offsets[SYSC_SYSSTATUS] >= 0)
3251 *syss_offs = data->offsets[SYSC_SYSSTATUS];
3257 * omap_hwmod_init_sysc_flags - initialize sysconfig features
3258 * @dev: struct device
3259 * @data: module data
3260 * @sysc_flags: module configuration
3262 int omap_hwmod_init_sysc_flags(struct device *dev,
3263 const struct ti_sysc_module_data *data,
3268 switch (data->cap->type) {
3270 case TI_SYSC_OMAP2_TIMER:
3271 /* See SYSC_OMAP2_* in include/dt-bindings/bus/ti-sysc.h */
3272 if (data->cfg->sysc_val & SYSC_OMAP2_CLOCKACTIVITY)
3273 *sysc_flags |= SYSC_HAS_CLOCKACTIVITY;
3274 if (data->cfg->sysc_val & SYSC_OMAP2_EMUFREE)
3275 *sysc_flags |= SYSC_HAS_EMUFREE;
3276 if (data->cfg->sysc_val & SYSC_OMAP2_ENAWAKEUP)
3277 *sysc_flags |= SYSC_HAS_ENAWAKEUP;
3278 if (data->cfg->sysc_val & SYSC_OMAP2_SOFTRESET)
3279 *sysc_flags |= SYSC_HAS_SOFTRESET;
3280 if (data->cfg->sysc_val & SYSC_OMAP2_AUTOIDLE)
3281 *sysc_flags |= SYSC_HAS_AUTOIDLE;
3284 case TI_SYSC_OMAP4_TIMER:
3285 /* See SYSC_OMAP4_* in include/dt-bindings/bus/ti-sysc.h */
3286 if (data->cfg->sysc_val & SYSC_OMAP4_DMADISABLE)
3287 *sysc_flags |= SYSC_HAS_DMADISABLE;
3288 if (data->cfg->sysc_val & SYSC_OMAP4_FREEEMU)
3289 *sysc_flags |= SYSC_HAS_EMUFREE;
3290 if (data->cfg->sysc_val & SYSC_OMAP4_SOFTRESET)
3291 *sysc_flags |= SYSC_HAS_SOFTRESET;
3293 case TI_SYSC_OMAP34XX_SR:
3294 case TI_SYSC_OMAP36XX_SR:
3295 /* See SYSC_OMAP3_SR_* in include/dt-bindings/bus/ti-sysc.h */
3296 if (data->cfg->sysc_val & SYSC_OMAP3_SR_ENAWAKEUP)
3297 *sysc_flags |= SYSC_HAS_ENAWAKEUP;
3300 if (data->cap->regbits->emufree_shift >= 0)
3301 *sysc_flags |= SYSC_HAS_EMUFREE;
3302 if (data->cap->regbits->enwkup_shift >= 0)
3303 *sysc_flags |= SYSC_HAS_ENAWAKEUP;
3304 if (data->cap->regbits->srst_shift >= 0)
3305 *sysc_flags |= SYSC_HAS_SOFTRESET;
3306 if (data->cap->regbits->autoidle_shift >= 0)
3307 *sysc_flags |= SYSC_HAS_AUTOIDLE;
3311 if (data->cap->regbits->midle_shift >= 0 &&
3312 data->cfg->midlemodes)
3313 *sysc_flags |= SYSC_HAS_MIDLEMODE;
3315 if (data->cap->regbits->sidle_shift >= 0 &&
3316 data->cfg->sidlemodes)
3317 *sysc_flags |= SYSC_HAS_SIDLEMODE;
3319 if (data->cfg->quirks & SYSC_QUIRK_UNCACHED)
3320 *sysc_flags |= SYSC_NO_CACHE;
3321 if (data->cfg->quirks & SYSC_QUIRK_RESET_STATUS)
3322 *sysc_flags |= SYSC_HAS_RESET_STATUS;
3324 if (data->cfg->syss_mask & 1)
3325 *sysc_flags |= SYSS_HAS_RESET_STATUS;
3331 * omap_hwmod_init_idlemodes - initialize module idle modes
3332 * @dev: struct device
3333 * @data: module data
3334 * @idlemodes: module supported idle modes
3336 int omap_hwmod_init_idlemodes(struct device *dev,
3337 const struct ti_sysc_module_data *data,
3342 if (data->cfg->midlemodes & BIT(SYSC_IDLE_FORCE))
3343 *idlemodes |= MSTANDBY_FORCE;
3344 if (data->cfg->midlemodes & BIT(SYSC_IDLE_NO))
3345 *idlemodes |= MSTANDBY_NO;
3346 if (data->cfg->midlemodes & BIT(SYSC_IDLE_SMART))
3347 *idlemodes |= MSTANDBY_SMART;
3348 if (data->cfg->midlemodes & BIT(SYSC_IDLE_SMART_WKUP))
3349 *idlemodes |= MSTANDBY_SMART_WKUP;
3351 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_FORCE))
3352 *idlemodes |= SIDLE_FORCE;
3353 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_NO))
3354 *idlemodes |= SIDLE_NO;
3355 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_SMART))
3356 *idlemodes |= SIDLE_SMART;
3357 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_SMART_WKUP))
3358 *idlemodes |= SIDLE_SMART_WKUP;
3364 * omap_hwmod_check_module - check new module against platform data
3365 * @dev: struct device
3367 * @data: new module data
3368 * @sysc_fields: sysc register bits
3369 * @rev_offs: revision register offset
3370 * @sysc_offs: sysconfig register offset
3371 * @syss_offs: sysstatus register offset
3372 * @sysc_flags: sysc specific flags
3373 * @idlemodes: sysc supported idlemodes
3375 static int omap_hwmod_check_module(struct device *dev,
3376 struct omap_hwmod *oh,
3377 const struct ti_sysc_module_data *data,
3378 struct sysc_regbits *sysc_fields,
3379 s32 rev_offs, s32 sysc_offs,
3380 s32 syss_offs, u32 sysc_flags,
3383 if (!oh->class->sysc)
3386 if (sysc_fields != oh->class->sysc->sysc_fields)
3387 dev_warn(dev, "sysc_fields %p != %p\n", sysc_fields,
3388 oh->class->sysc->sysc_fields);
3390 if (rev_offs != oh->class->sysc->rev_offs)
3391 dev_warn(dev, "rev_offs %08x != %08x\n", rev_offs,
3392 oh->class->sysc->rev_offs);
3393 if (sysc_offs != oh->class->sysc->sysc_offs)
3394 dev_warn(dev, "sysc_offs %08x != %08x\n", sysc_offs,
3395 oh->class->sysc->sysc_offs);
3396 if (syss_offs != oh->class->sysc->syss_offs)
3397 dev_warn(dev, "syss_offs %08x != %08x\n", syss_offs,
3398 oh->class->sysc->syss_offs);
3400 if (sysc_flags != oh->class->sysc->sysc_flags)
3401 dev_warn(dev, "sysc_flags %08x != %08x\n", sysc_flags,
3402 oh->class->sysc->sysc_flags);
3404 if (idlemodes != oh->class->sysc->idlemodes)
3405 dev_warn(dev, "idlemodes %08x != %08x\n", idlemodes,
3406 oh->class->sysc->idlemodes);
3408 if (data->cfg->srst_udelay != oh->class->sysc->srst_udelay)
3409 dev_warn(dev, "srst_udelay %i != %i\n",
3410 data->cfg->srst_udelay,
3411 oh->class->sysc->srst_udelay);
3417 * omap_hwmod_allocate_module - allocate new module
3418 * @dev: struct device
3420 * @sysc_fields: sysc register bits
3421 * @rev_offs: revision register offset
3422 * @sysc_offs: sysconfig register offset
3423 * @syss_offs: sysstatus register offset
3424 * @sysc_flags: sysc specific flags
3425 * @idlemodes: sysc supported idlemodes
3427 * Note that the allocations here cannot use devm as ti-sysc can rebind.
3429 int omap_hwmod_allocate_module(struct device *dev, struct omap_hwmod *oh,
3430 const struct ti_sysc_module_data *data,
3431 struct sysc_regbits *sysc_fields,
3432 s32 rev_offs, s32 sysc_offs, s32 syss_offs,
3433 u32 sysc_flags, u32 idlemodes)
3435 struct omap_hwmod_class_sysconfig *sysc;
3436 struct omap_hwmod_class *class;
3437 void __iomem *regs = NULL;
3438 unsigned long flags;
3440 sysc = kzalloc(sizeof(*sysc), GFP_KERNEL);
3444 sysc->sysc_fields = sysc_fields;
3445 sysc->rev_offs = rev_offs;
3446 sysc->sysc_offs = sysc_offs;
3447 sysc->syss_offs = syss_offs;
3448 sysc->sysc_flags = sysc_flags;
3449 sysc->idlemodes = idlemodes;
3450 sysc->srst_udelay = data->cfg->srst_udelay;
3452 if (!oh->_mpu_rt_va) {
3453 regs = ioremap(data->module_pa,
3460 * We need new oh->class as the other devices in the same class
3461 * may not yet have ioremapped their registers.
3463 class = kmemdup(oh->class, sizeof(*oh->class), GFP_KERNEL);
3469 spin_lock_irqsave(&oh->_lock, flags);
3471 oh->_mpu_rt_va = regs;
3473 oh->_state = _HWMOD_STATE_INITIALIZED;
3475 spin_unlock_irqrestore(&oh->_lock, flags);
3481 * omap_hwmod_init_module - initialize new module
3482 * @dev: struct device
3483 * @data: module data
3484 * @cookie: cookie for the caller to use for later calls
3486 int omap_hwmod_init_module(struct device *dev,
3487 const struct ti_sysc_module_data *data,
3488 struct ti_sysc_cookie *cookie)
3490 struct omap_hwmod *oh;
3491 struct sysc_regbits *sysc_fields;
3492 s32 rev_offs, sysc_offs, syss_offs;
3493 u32 sysc_flags, idlemodes;
3499 oh = _lookup(data->name);
3505 error = omap_hwmod_init_regbits(dev, data, &sysc_fields);
3509 error = omap_hwmod_init_reg_offs(dev, data, &rev_offs,
3510 &sysc_offs, &syss_offs);
3514 error = omap_hwmod_init_sysc_flags(dev, data, &sysc_flags);
3518 error = omap_hwmod_init_idlemodes(dev, data, &idlemodes);
3522 if (data->cfg->quirks & SYSC_QUIRK_NO_IDLE_ON_INIT)
3523 oh->flags |= HWMOD_INIT_NO_IDLE;
3524 if (data->cfg->quirks & SYSC_QUIRK_NO_RESET_ON_INIT)
3525 oh->flags |= HWMOD_INIT_NO_RESET;
3527 error = omap_hwmod_check_module(dev, oh, data, sysc_fields,
3528 rev_offs, sysc_offs, syss_offs,
3529 sysc_flags, idlemodes);
3533 return omap_hwmod_allocate_module(dev, oh, data, sysc_fields,
3534 rev_offs, sysc_offs, syss_offs,
3535 sysc_flags, idlemodes);
3539 * omap_hwmod_setup_earlycon_flags - set up flags for early console
3541 * Enable DEBUG_OMAPUART_FLAGS for uart hwmod that is being used as
3542 * early concole so that hwmod core doesn't reset and keep it in idle
3543 * that specific uart.
3545 #ifdef CONFIG_SERIAL_EARLYCON
3546 static void __init omap_hwmod_setup_earlycon_flags(void)
3548 struct device_node *np;
3549 struct omap_hwmod *oh;
3552 np = of_find_node_by_path("/chosen");
3554 uart = of_get_property(np, "stdout-path", NULL);
3556 np = of_find_node_by_path(uart);
3558 uart = of_get_property(np, "ti,hwmods", NULL);
3559 oh = omap_hwmod_lookup(uart);
3561 uart = of_get_property(np->parent,
3564 oh = omap_hwmod_lookup(uart);
3567 oh->flags |= DEBUG_OMAPUART_FLAGS;
3575 * omap_hwmod_setup_all - set up all registered IP blocks
3577 * Initialize and set up all IP blocks registered with the hwmod code.
3578 * Must be called after omap2_clk_init(). Resolves the struct clk
3579 * names to struct clk pointers for each registered omap_hwmod. Also
3580 * calls _setup() on each hwmod. Returns 0 upon success.
3582 static int __init omap_hwmod_setup_all(void)
3584 _ensure_mpu_hwmod_is_setup(NULL);
3586 omap_hwmod_for_each(_init, NULL);
3587 #ifdef CONFIG_SERIAL_EARLYCON
3588 omap_hwmod_setup_earlycon_flags();
3590 omap_hwmod_for_each(_setup, NULL);
3594 omap_postcore_initcall(omap_hwmod_setup_all);
3597 * omap_hwmod_enable - enable an omap_hwmod
3598 * @oh: struct omap_hwmod *
3600 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
3601 * Returns -EINVAL on error or passes along the return value from _enable().
3603 int omap_hwmod_enable(struct omap_hwmod *oh)
3606 unsigned long flags;
3611 spin_lock_irqsave(&oh->_lock, flags);
3613 spin_unlock_irqrestore(&oh->_lock, flags);
3619 * omap_hwmod_idle - idle an omap_hwmod
3620 * @oh: struct omap_hwmod *
3622 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
3623 * Returns -EINVAL on error or passes along the return value from _idle().
3625 int omap_hwmod_idle(struct omap_hwmod *oh)
3628 unsigned long flags;
3633 spin_lock_irqsave(&oh->_lock, flags);
3635 spin_unlock_irqrestore(&oh->_lock, flags);
3641 * omap_hwmod_shutdown - shutdown an omap_hwmod
3642 * @oh: struct omap_hwmod *
3644 * Shutdown an omap_hwmod @oh. Intended to be called by
3645 * omap_device_shutdown(). Returns -EINVAL on error or passes along
3646 * the return value from _shutdown().
3648 int omap_hwmod_shutdown(struct omap_hwmod *oh)
3651 unsigned long flags;
3656 spin_lock_irqsave(&oh->_lock, flags);
3658 spin_unlock_irqrestore(&oh->_lock, flags);
3664 * IP block data retrieval functions
3668 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
3669 * @oh: struct omap_hwmod *
3671 * Return the powerdomain pointer associated with the OMAP module
3672 * @oh's main clock. If @oh does not have a main clk, return the
3673 * powerdomain associated with the interface clock associated with the
3674 * module's MPU port. (XXX Perhaps this should use the SDMA port
3675 * instead?) Returns NULL on error, or a struct powerdomain * on
3678 struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
3681 struct omap_hwmod_ocp_if *oi;
3682 struct clockdomain *clkdm;
3683 struct clk_hw_omap *clk;
3689 return oh->clkdm->pwrdm.ptr;
3694 oi = _find_mpu_rt_port(oh);
3700 clk = to_clk_hw_omap(__clk_get_hw(c));
3705 return clkdm->pwrdm.ptr;
3709 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
3710 * @oh: struct omap_hwmod *
3712 * Returns the virtual address corresponding to the beginning of the
3713 * module's register target, in the address range that is intended to
3714 * be used by the MPU. Returns the virtual address upon success or NULL
3717 void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
3722 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
3725 if (oh->_state == _HWMOD_STATE_UNKNOWN)
3728 return oh->_mpu_rt_va;
3732 * XXX what about functions for drivers to save/restore ocp_sysconfig
3733 * for context save/restore operations?
3737 * omap_hwmod_enable_wakeup - allow device to wake up the system
3738 * @oh: struct omap_hwmod *
3740 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
3741 * send wakeups to the PRCM, and enable I/O ring wakeup events for
3742 * this IP block if it has dynamic mux entries. Eventually this
3743 * should set PRCM wakeup registers to cause the PRCM to receive
3744 * wakeup events from the module. Does not set any wakeup routing
3745 * registers beyond this point - if the module is to wake up any other
3746 * module or subsystem, that must be set separately. Called by
3747 * omap_device code. Returns -EINVAL on error or 0 upon success.
3749 int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
3751 unsigned long flags;
3754 spin_lock_irqsave(&oh->_lock, flags);
3756 if (oh->class->sysc &&
3757 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3758 v = oh->_sysc_cache;
3759 _enable_wakeup(oh, &v);
3760 _write_sysconfig(v, oh);
3763 spin_unlock_irqrestore(&oh->_lock, flags);
3769 * omap_hwmod_disable_wakeup - prevent device from waking the system
3770 * @oh: struct omap_hwmod *
3772 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
3773 * from sending wakeups to the PRCM, and disable I/O ring wakeup
3774 * events for this IP block if it has dynamic mux entries. Eventually
3775 * this should clear PRCM wakeup registers to cause the PRCM to ignore
3776 * wakeup events from the module. Does not set any wakeup routing
3777 * registers beyond this point - if the module is to wake up any other
3778 * module or subsystem, that must be set separately. Called by
3779 * omap_device code. Returns -EINVAL on error or 0 upon success.
3781 int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
3783 unsigned long flags;
3786 spin_lock_irqsave(&oh->_lock, flags);
3788 if (oh->class->sysc &&
3789 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3790 v = oh->_sysc_cache;
3791 _disable_wakeup(oh, &v);
3792 _write_sysconfig(v, oh);
3795 spin_unlock_irqrestore(&oh->_lock, flags);
3801 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
3802 * contained in the hwmod module.
3803 * @oh: struct omap_hwmod *
3804 * @name: name of the reset line to lookup and assert
3806 * Some IP like dsp, ipu or iva contain processor that require
3807 * an HW reset line to be assert / deassert in order to enable fully
3808 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3809 * yet supported on this OMAP; otherwise, passes along the return value
3810 * from _assert_hardreset().
3812 int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
3815 unsigned long flags;
3820 spin_lock_irqsave(&oh->_lock, flags);
3821 ret = _assert_hardreset(oh, name);
3822 spin_unlock_irqrestore(&oh->_lock, flags);
3828 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
3829 * contained in the hwmod module.
3830 * @oh: struct omap_hwmod *
3831 * @name: name of the reset line to look up and deassert
3833 * Some IP like dsp, ipu or iva contain processor that require
3834 * an HW reset line to be assert / deassert in order to enable fully
3835 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3836 * yet supported on this OMAP; otherwise, passes along the return value
3837 * from _deassert_hardreset().
3839 int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
3842 unsigned long flags;
3847 spin_lock_irqsave(&oh->_lock, flags);
3848 ret = _deassert_hardreset(oh, name);
3849 spin_unlock_irqrestore(&oh->_lock, flags);
3855 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
3856 * @classname: struct omap_hwmod_class name to search for
3857 * @fn: callback function pointer to call for each hwmod in class @classname
3858 * @user: arbitrary context data to pass to the callback function
3860 * For each omap_hwmod of class @classname, call @fn.
3861 * If the callback function returns something other than
3862 * zero, the iterator is terminated, and the callback function's return
3863 * value is passed back to the caller. Returns 0 upon success, -EINVAL
3864 * if @classname or @fn are NULL, or passes back the error code from @fn.
3866 int omap_hwmod_for_each_by_class(const char *classname,
3867 int (*fn)(struct omap_hwmod *oh,
3871 struct omap_hwmod *temp_oh;
3874 if (!classname || !fn)
3877 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
3878 __func__, classname);
3880 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3881 if (!strcmp(temp_oh->class->name, classname)) {
3882 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
3883 __func__, temp_oh->name);
3884 ret = (*fn)(temp_oh, user);
3891 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
3898 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
3899 * @oh: struct omap_hwmod *
3900 * @state: state that _setup() should leave the hwmod in
3902 * Sets the hwmod state that @oh will enter at the end of _setup()
3903 * (called by omap_hwmod_setup_*()). See also the documentation
3904 * for _setup_postsetup(), above. Returns 0 upon success or
3905 * -EINVAL if there is a problem with the arguments or if the hwmod is
3906 * in the wrong state.
3908 int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
3911 unsigned long flags;
3916 if (state != _HWMOD_STATE_DISABLED &&
3917 state != _HWMOD_STATE_ENABLED &&
3918 state != _HWMOD_STATE_IDLE)
3921 spin_lock_irqsave(&oh->_lock, flags);
3923 if (oh->_state != _HWMOD_STATE_REGISTERED) {
3928 oh->_postsetup_state = state;
3932 spin_unlock_irqrestore(&oh->_lock, flags);
3938 * omap_hwmod_get_context_loss_count - get lost context count
3939 * @oh: struct omap_hwmod *
3941 * Returns the context loss count of associated @oh
3942 * upon success, or zero if no context loss data is available.
3944 * On OMAP4, this queries the per-hwmod context loss register,
3945 * assuming one exists. If not, or on OMAP2/3, this queries the
3946 * enclosing powerdomain context loss count.
3948 int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
3950 struct powerdomain *pwrdm;
3953 if (soc_ops.get_context_lost)
3954 return soc_ops.get_context_lost(oh);
3956 pwrdm = omap_hwmod_get_pwrdm(oh);
3958 ret = pwrdm_get_context_loss_count(pwrdm);
3964 * omap_hwmod_init - initialize the hwmod code
3966 * Sets up some function pointers needed by the hwmod code to operate on the
3967 * currently-booted SoC. Intended to be called once during kernel init
3968 * before any hwmods are registered. No return value.
3970 void __init omap_hwmod_init(void)
3972 if (cpu_is_omap24xx()) {
3973 soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready;
3974 soc_ops.assert_hardreset = _omap2_assert_hardreset;
3975 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
3976 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
3977 } else if (cpu_is_omap34xx()) {
3978 soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready;
3979 soc_ops.assert_hardreset = _omap2_assert_hardreset;
3980 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
3981 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
3982 soc_ops.init_clkdm = _init_clkdm;
3983 } else if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx()) {
3984 soc_ops.enable_module = _omap4_enable_module;
3985 soc_ops.disable_module = _omap4_disable_module;
3986 soc_ops.wait_target_ready = _omap4_wait_target_ready;
3987 soc_ops.assert_hardreset = _omap4_assert_hardreset;
3988 soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
3989 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
3990 soc_ops.init_clkdm = _init_clkdm;
3991 soc_ops.update_context_lost = _omap4_update_context_lost;
3992 soc_ops.get_context_lost = _omap4_get_context_lost;
3993 soc_ops.disable_direct_prcm = _omap4_disable_direct_prcm;
3994 soc_ops.xlate_clkctrl = _omap4_xlate_clkctrl;
3995 } else if (cpu_is_ti814x() || cpu_is_ti816x() || soc_is_am33xx() ||
3997 soc_ops.enable_module = _omap4_enable_module;
3998 soc_ops.disable_module = _omap4_disable_module;
3999 soc_ops.wait_target_ready = _omap4_wait_target_ready;
4000 soc_ops.assert_hardreset = _omap4_assert_hardreset;
4001 soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
4002 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
4003 soc_ops.init_clkdm = _init_clkdm;
4004 soc_ops.disable_direct_prcm = _omap4_disable_direct_prcm;
4005 soc_ops.xlate_clkctrl = _omap4_xlate_clkctrl;
4007 WARN(1, "omap_hwmod: unknown SoC type\n");
4010 _init_clkctrl_providers();
4016 * omap_hwmod_get_main_clk - get pointer to main clock name
4017 * @oh: struct omap_hwmod *
4019 * Returns the main clock name assocated with @oh upon success,
4020 * or NULL if @oh is NULL.
4022 const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh)
4027 return oh->main_clk;