arch/arm/mach-mx3/mach-pcm037.c

   1 /*
   2  *  Copyright (C) 2008 Sascha Hauer, Pengutronix
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; either version 2 of the License, or
   7  * (at your option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  */
  14
  15 #include <linux/types.h>
  16 #include <linux/init.h>
  17 #include <linux/dma-mapping.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/mtd/physmap.h>
  20 #include <linux/mtd/plat-ram.h>
  21 #include <linux/memory.h>
  22 #include <linux/gpio.h>
  23 #include <linux/smsc911x.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/i2c.h>
  26 #include <linux/i2c/at24.h>
  27 #include <linux/delay.h>
  28 #include <linux/spi/spi.h>
  29 #include <linux/irq.h>
  30 #include <linux/fsl_devices.h>
  31 #include <linux/can/platform/sja1000.h>
  32 #include <linux/usb/otg.h>
  33 #include <linux/usb/ulpi.h>
  34 #include <linux/gfp.h>
  35
  36 #include <media/soc_camera.h>
  37
  38 #include <asm/mach-types.h>
  39 #include <asm/mach/arch.h>
  40 #include <asm/mach/time.h>
  41 #include <asm/mach/map.h>
  42 #include <mach/common.h>
  43 #include <mach/hardware.h>
  44 #include <mach/i2c.h>
  45 #include <mach/imx-uart.h>
  46 #include <mach/iomux-mx3.h>
  47 #include <mach/ipu.h>
  48 #include <mach/mmc.h>
  49 #include <mach/mx3_camera.h>
  50 #include <mach/mx3fb.h>
  51 #include <mach/mxc_ehci.h>
  52 #include <mach/ulpi.h>
  53
  54 #include "devices-imx31.h"
  55 #include "devices.h"
  56 #include "pcm037.h"
  57
  58 static enum pcm037_board_variant pcm037_instance = PCM037_PCM970;
  59
  60 static int __init pcm037_variant_setup(char *str)
  61 {
  62         if (!strcmp("eet", str))
  63                 pcm037_instance = PCM037_EET;
  64         else if (strcmp("pcm970", str))
  65                 pr_warning("Unknown pcm037 baseboard variant %s\n", str);
  66
  67         return 1;
  68 }
  69
  70 /* Supported values: "pcm970" (default) and "eet" */
  71 __setup("pcm037_variant=", pcm037_variant_setup);
  72
  73 enum pcm037_board_variant pcm037_variant(void)
  74 {
  75         return pcm037_instance;
  76 }
  77
  78 /* UART1 with RTS/CTS handshake signals */
  79 static unsigned int pcm037_uart1_handshake_pins[] = {
  80         MX31_PIN_CTS1__CTS1,
  81         MX31_PIN_RTS1__RTS1,
  82         MX31_PIN_TXD1__TXD1,
  83         MX31_PIN_RXD1__RXD1,
  84 };
  85
  86 /* UART1 without RTS/CTS handshake signals */
  87 static unsigned int pcm037_uart1_pins[] = {
  88         MX31_PIN_TXD1__TXD1,
  89         MX31_PIN_RXD1__RXD1,
  90 };
  91
  92 static unsigned int pcm037_pins[] = {
  93         /* I2C */
  94         MX31_PIN_CSPI2_MOSI__SCL,
  95         MX31_PIN_CSPI2_MISO__SDA,
  96         MX31_PIN_CSPI2_SS2__I2C3_SDA,
  97         MX31_PIN_CSPI2_SCLK__I2C3_SCL,
  98         /* SDHC1 */
  99         MX31_PIN_SD1_DATA3__SD1_DATA3,
 100         MX31_PIN_SD1_DATA2__SD1_DATA2,
 101         MX31_PIN_SD1_DATA1__SD1_DATA1,
 102         MX31_PIN_SD1_DATA0__SD1_DATA0,
 103         MX31_PIN_SD1_CLK__SD1_CLK,
 104         MX31_PIN_SD1_CMD__SD1_CMD,
 105         IOMUX_MODE(MX31_PIN_SCK6, IOMUX_CONFIG_GPIO), /* card detect */
 106         IOMUX_MODE(MX31_PIN_SFS6, IOMUX_CONFIG_GPIO), /* write protect */
 107         /* SPI1 */
 108         MX31_PIN_CSPI1_MOSI__MOSI,
 109         MX31_PIN_CSPI1_MISO__MISO,
 110         MX31_PIN_CSPI1_SCLK__SCLK,
 111         MX31_PIN_CSPI1_SPI_RDY__SPI_RDY,
 112         MX31_PIN_CSPI1_SS0__SS0,
 113         MX31_PIN_CSPI1_SS1__SS1,
 114         MX31_PIN_CSPI1_SS2__SS2,
 115         /* UART2 */
 116         MX31_PIN_TXD2__TXD2,
 117         MX31_PIN_RXD2__RXD2,
 118         MX31_PIN_CTS2__CTS2,
 119         MX31_PIN_RTS2__RTS2,
 120         /* UART3 */
 121         MX31_PIN_CSPI3_MOSI__RXD3,
 122         MX31_PIN_CSPI3_MISO__TXD3,
 123         MX31_PIN_CSPI3_SCLK__RTS3,
 124         MX31_PIN_CSPI3_SPI_RDY__CTS3,
 125         /* LAN9217 irq pin */
 126         IOMUX_MODE(MX31_PIN_GPIO3_1, IOMUX_CONFIG_GPIO),
 127         /* Onewire */
 128         MX31_PIN_BATT_LINE__OWIRE,
 129         /* Framebuffer */
 130         MX31_PIN_LD0__LD0,
 131         MX31_PIN_LD1__LD1,
 132         MX31_PIN_LD2__LD2,
 133         MX31_PIN_LD3__LD3,
 134         MX31_PIN_LD4__LD4,
 135         MX31_PIN_LD5__LD5,
 136         MX31_PIN_LD6__LD6,
 137         MX31_PIN_LD7__LD7,
 138         MX31_PIN_LD8__LD8,
 139         MX31_PIN_LD9__LD9,
 140         MX31_PIN_LD10__LD10,
 141         MX31_PIN_LD11__LD11,
 142         MX31_PIN_LD12__LD12,
 143         MX31_PIN_LD13__LD13,
 144         MX31_PIN_LD14__LD14,
 145         MX31_PIN_LD15__LD15,
 146         MX31_PIN_LD16__LD16,
 147         MX31_PIN_LD17__LD17,
 148         MX31_PIN_VSYNC3__VSYNC3,
 149         MX31_PIN_HSYNC__HSYNC,
 150         MX31_PIN_FPSHIFT__FPSHIFT,
 151         MX31_PIN_DRDY0__DRDY0,
 152         MX31_PIN_D3_REV__D3_REV,
 153         MX31_PIN_CONTRAST__CONTRAST,
 154         MX31_PIN_D3_SPL__D3_SPL,
 155         MX31_PIN_D3_CLS__D3_CLS,
 156         MX31_PIN_LCS0__GPI03_23,
 157         /* CSI */
 158         IOMUX_MODE(MX31_PIN_CSI_D5, IOMUX_CONFIG_GPIO),
 159         MX31_PIN_CSI_D6__CSI_D6,
 160         MX31_PIN_CSI_D7__CSI_D7,
 161         MX31_PIN_CSI_D8__CSI_D8,
 162         MX31_PIN_CSI_D9__CSI_D9,
 163         MX31_PIN_CSI_D10__CSI_D10,
 164         MX31_PIN_CSI_D11__CSI_D11,
 165         MX31_PIN_CSI_D12__CSI_D12,
 166         MX31_PIN_CSI_D13__CSI_D13,
 167         MX31_PIN_CSI_D14__CSI_D14,
 168         MX31_PIN_CSI_D15__CSI_D15,
 169         MX31_PIN_CSI_HSYNC__CSI_HSYNC,
 170         MX31_PIN_CSI_MCLK__CSI_MCLK,
 171         MX31_PIN_CSI_PIXCLK__CSI_PIXCLK,
 172         MX31_PIN_CSI_VSYNC__CSI_VSYNC,
 173         /* GPIO */
 174         IOMUX_MODE(MX31_PIN_ATA_DMACK, IOMUX_CONFIG_GPIO),
 175         /* OTG */
 176         MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
 177         MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
 178         MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
 179         MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
 180         MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
 181         MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
 182         MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
 183         MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
 184         MX31_PIN_USBOTG_CLK__USBOTG_CLK,
 185         MX31_PIN_USBOTG_DIR__USBOTG_DIR,
 186         MX31_PIN_USBOTG_NXT__USBOTG_NXT,
 187         MX31_PIN_USBOTG_STP__USBOTG_STP,
 188         /* USB host 2 */
 189         IOMUX_MODE(MX31_PIN_USBH2_CLK, IOMUX_CONFIG_FUNC),
 190         IOMUX_MODE(MX31_PIN_USBH2_DIR, IOMUX_CONFIG_FUNC),
 191         IOMUX_MODE(MX31_PIN_USBH2_NXT, IOMUX_CONFIG_FUNC),
 192         IOMUX_MODE(MX31_PIN_USBH2_STP, IOMUX_CONFIG_FUNC),
 193         IOMUX_MODE(MX31_PIN_USBH2_DATA0, IOMUX_CONFIG_FUNC),
 194         IOMUX_MODE(MX31_PIN_USBH2_DATA1, IOMUX_CONFIG_FUNC),
 195         IOMUX_MODE(MX31_PIN_STXD3, IOMUX_CONFIG_FUNC),
 196         IOMUX_MODE(MX31_PIN_SRXD3, IOMUX_CONFIG_FUNC),
 197         IOMUX_MODE(MX31_PIN_SCK3, IOMUX_CONFIG_FUNC),
 198         IOMUX_MODE(MX31_PIN_SFS3, IOMUX_CONFIG_FUNC),
 199         IOMUX_MODE(MX31_PIN_STXD6, IOMUX_CONFIG_FUNC),
 200         IOMUX_MODE(MX31_PIN_SRXD6, IOMUX_CONFIG_FUNC),
 201 };
 202
 203 static struct physmap_flash_data pcm037_flash_data = {
 204         .width  = 2,
 205 };
 206
 207 static struct resource pcm037_flash_resource = {
 208         .start  = 0xa0000000,
 209         .end    = 0xa1ffffff,
 210         .flags  = IORESOURCE_MEM,
 211 };
 212
 213 static struct platform_device pcm037_flash = {
 214         .name   = "physmap-flash",
 215         .id     = 0,
 216         .dev    = {
 217                 .platform_data  = &pcm037_flash_data,
 218         },
 219         .resource = &pcm037_flash_resource,
 220         .num_resources = 1,
 221 };
 222
 223 static struct imxuart_platform_data uart_pdata = {
 224         .flags = IMXUART_HAVE_RTSCTS,
 225 };
 226
 227 static struct resource smsc911x_resources[] = {
 228         {
 229                 .start          = MX31_CS1_BASE_ADDR + 0x300,
 230                 .end            = MX31_CS1_BASE_ADDR + 0x300 + SZ_64K - 1,
 231                 .flags          = IORESOURCE_MEM,
 232         }, {
 233                 .start          = IOMUX_TO_IRQ(MX31_PIN_GPIO3_1),
 234                 .end            = IOMUX_TO_IRQ(MX31_PIN_GPIO3_1),
 235                 .flags          = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
 236         },
 237 };
 238
 239 static struct smsc911x_platform_config smsc911x_info = {
 240         .flags          = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY |
 241                           SMSC911X_SAVE_MAC_ADDRESS,
 242         .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
 243         .irq_type       = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
 244         .phy_interface  = PHY_INTERFACE_MODE_MII,
 245 };
 246
 247 static struct platform_device pcm037_eth = {
 248         .name           = "smsc911x",
 249         .id             = -1,
 250         .num_resources  = ARRAY_SIZE(smsc911x_resources),
 251         .resource       = smsc911x_resources,
 252         .dev            = {
 253                 .platform_data = &smsc911x_info,
 254         },
 255 };
 256
 257 static struct platdata_mtd_ram pcm038_sram_data = {
 258         .bankwidth = 2,
 259 };
 260
 261 static struct resource pcm038_sram_resource = {
 262         .start = MX31_CS4_BASE_ADDR,
 263         .end   = MX31_CS4_BASE_ADDR + 512 * 1024 - 1,
 264         .flags = IORESOURCE_MEM,
 265 };
 266
 267 static struct platform_device pcm037_sram_device = {
 268         .name = "mtd-ram",
 269         .id = 0,
 270         .dev = {
 271                 .platform_data = &pcm038_sram_data,
 272         },
 273         .num_resources = 1,
 274         .resource = &pcm038_sram_resource,
 275 };
 276
 277 static const struct mxc_nand_platform_data
 278 pcm037_nand_board_info __initconst = {
 279         .width = 1,
 280         .hw_ecc = 1,
 281 };
 282
 283 static struct imxi2c_platform_data pcm037_i2c_1_data = {
 284         .bitrate = 100000,
 285 };
 286
 287 static struct imxi2c_platform_data pcm037_i2c_2_data = {
 288         .bitrate = 20000,
 289 };
 290
 291 static struct at24_platform_data board_eeprom = {
 292         .byte_len = 4096,
 293         .page_size = 32,
 294         .flags = AT24_FLAG_ADDR16,
 295 };
 296
 297 static int pcm037_camera_power(struct device *dev, int on)
 298 {
 299         /* disable or enable the camera in X7 or X8 PCM970 connector */
 300         gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_CSI_D5), !on);
 301         return 0;
 302 }
 303
 304 static struct i2c_board_info pcm037_i2c_camera[] = {
 305         {
 306                 I2C_BOARD_INFO("mt9t031", 0x5d),
 307         }, {
 308                 I2C_BOARD_INFO("mt9v022", 0x48),
 309         },
 310 };
 311
 312 static struct soc_camera_link iclink_mt9v022 = {
 313         .bus_id         = 0,            /* Must match with the camera ID */
 314         .board_info     = &pcm037_i2c_camera[1],
 315         .i2c_adapter_id = 2,
 316         .module_name    = "mt9v022",
 317 };
 318
 319 static struct soc_camera_link iclink_mt9t031 = {
 320         .bus_id         = 0,            /* Must match with the camera ID */
 321         .power          = pcm037_camera_power,
 322         .board_info     = &pcm037_i2c_camera[0],
 323         .i2c_adapter_id = 2,
 324         .module_name    = "mt9t031",
 325 };
 326
 327 static struct i2c_board_info pcm037_i2c_devices[] = {
 328         {
 329                 I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */
 330                 .platform_data = &board_eeprom,
 331         }, {
 332                 I2C_BOARD_INFO("pcf8563", 0x51),
 333         }
 334 };
 335
 336 static struct platform_device pcm037_mt9t031 = {
 337         .name   = "soc-camera-pdrv",
 338         .id     = 0,
 339         .dev    = {
 340                 .platform_data = &iclink_mt9t031,
 341         },
 342 };
 343
 344 static struct platform_device pcm037_mt9v022 = {
 345         .name   = "soc-camera-pdrv",
 346         .id     = 1,
 347         .dev    = {
 348                 .platform_data = &iclink_mt9v022,
 349         },
 350 };
 351
 352 /* Not connected by default */
 353 #ifdef PCM970_SDHC_RW_SWITCH
 354 static int pcm970_sdhc1_get_ro(struct device *dev)
 355 {
 356         return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_SFS6));
 357 }
 358 #endif
 359
 360 #define SDHC1_GPIO_WP   IOMUX_TO_GPIO(MX31_PIN_SFS6)
 361 #define SDHC1_GPIO_DET  IOMUX_TO_GPIO(MX31_PIN_SCK6)
 362
 363 static int pcm970_sdhc1_init(struct device *dev, irq_handler_t detect_irq,
 364                 void *data)
 365 {
 366         int ret;
 367
 368         ret = gpio_request(SDHC1_GPIO_DET, "sdhc-detect");
 369         if (ret)
 370                 return ret;
 371
 372         gpio_direction_input(SDHC1_GPIO_DET);
 373
 374 #ifdef PCM970_SDHC_RW_SWITCH
 375         ret = gpio_request(SDHC1_GPIO_WP, "sdhc-wp");
 376         if (ret)
 377                 goto err_gpio_free;
 378         gpio_direction_input(SDHC1_GPIO_WP);
 379 #endif
 380
 381         ret = request_irq(IOMUX_TO_IRQ(MX31_PIN_SCK6), detect_irq,
 382                         IRQF_DISABLED | IRQF_TRIGGER_FALLING,
 383                                 "sdhc-detect", data);
 384         if (ret)
 385                 goto err_gpio_free_2;
 386
 387         return 0;
 388
 389 err_gpio_free_2:
 390 #ifdef PCM970_SDHC_RW_SWITCH
 391         gpio_free(SDHC1_GPIO_WP);
 392 err_gpio_free:
 393 #endif
 394         gpio_free(SDHC1_GPIO_DET);
 395
 396         return ret;
 397 }
 398
 399 static void pcm970_sdhc1_exit(struct device *dev, void *data)
 400 {
 401         free_irq(IOMUX_TO_IRQ(MX31_PIN_SCK6), data);
 402         gpio_free(SDHC1_GPIO_DET);
 403         gpio_free(SDHC1_GPIO_WP);
 404 }
 405
 406 static struct imxmmc_platform_data sdhc_pdata = {
 407 #ifdef PCM970_SDHC_RW_SWITCH
 408         .get_ro = pcm970_sdhc1_get_ro,
 409 #endif
 410         .init = pcm970_sdhc1_init,
 411         .exit = pcm970_sdhc1_exit,
 412 };
 413
 414 struct mx3_camera_pdata camera_pdata = {
 415         .dma_dev        = &mx3_ipu.dev,
 416         .flags          = MX3_CAMERA_DATAWIDTH_8 | MX3_CAMERA_DATAWIDTH_10,
 417         .mclk_10khz     = 2000,
 418 };
 419
 420 static int __init pcm037_camera_alloc_dma(const size_t buf_size)
 421 {
 422         dma_addr_t dma_handle;
 423         void *buf;
 424         int dma;
 425
 426         if (buf_size < 2 * 1024 * 1024)
 427                 return -EINVAL;
 428
 429         buf = dma_alloc_coherent(NULL, buf_size, &dma_handle, GFP_KERNEL);
 430         if (!buf) {
 431                 pr_err("%s: cannot allocate camera buffer-memory\n", __func__);
 432                 return -ENOMEM;
 433         }
 434
 435         memset(buf, 0, buf_size);
 436
 437         dma = dma_declare_coherent_memory(&mx3_camera.dev,
 438                                         dma_handle, dma_handle, buf_size,
 439                                         DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
 440
 441         /* The way we call dma_declare_coherent_memory only a malloc can fail */
 442         return dma & DMA_MEMORY_MAP ? 0 : -ENOMEM;
 443 }
 444
 445 static struct platform_device *devices[] __initdata = {
 446         &pcm037_flash,
 447         &pcm037_sram_device,
 448         &imx_wdt_device0,
 449         &pcm037_mt9t031,
 450         &pcm037_mt9v022,
 451 };
 452
 453 static struct ipu_platform_data mx3_ipu_data = {
 454         .irq_base = MXC_IPU_IRQ_START,
 455 };
 456
 457 static const struct fb_videomode fb_modedb[] = {
 458         {
 459                 /* 240x320 @ 60 Hz Sharp */
 460                 .name           = "Sharp-LQ035Q7DH06-QVGA",
 461                 .refresh        = 60,
 462                 .xres           = 240,
 463                 .yres           = 320,
 464                 .pixclock       = 185925,
 465                 .left_margin    = 9,
 466                 .right_margin   = 16,
 467                 .upper_margin   = 7,
 468                 .lower_margin   = 9,
 469                 .hsync_len      = 1,
 470                 .vsync_len      = 1,
 471                 .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_SHARP_MODE |
 472                                   FB_SYNC_CLK_INVERT | FB_SYNC_CLK_IDLE_EN,
 473                 .vmode          = FB_VMODE_NONINTERLACED,
 474                 .flag           = 0,
 475         }, {
 476                 /* 240x320 @ 60 Hz */
 477                 .name           = "TX090",
 478                 .refresh        = 60,
 479                 .xres           = 240,
 480                 .yres           = 320,
 481                 .pixclock       = 38255,
 482                 .left_margin    = 144,
 483                 .right_margin   = 0,
 484                 .upper_margin   = 7,
 485                 .lower_margin   = 40,
 486                 .hsync_len      = 96,
 487                 .vsync_len      = 1,
 488                 .sync           = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_OE_ACT_HIGH,
 489                 .vmode          = FB_VMODE_NONINTERLACED,
 490                 .flag           = 0,
 491         }, {
 492                 /* 240x320 @ 60 Hz */
 493                 .name           = "CMEL-OLED",
 494                 .refresh        = 60,
 495                 .xres           = 240,
 496                 .yres           = 320,
 497                 .pixclock       = 185925,
 498                 .left_margin    = 9,
 499                 .right_margin   = 16,
 500                 .upper_margin   = 7,
 501                 .lower_margin   = 9,
 502                 .hsync_len      = 1,
 503                 .vsync_len      = 1,
 504                 .sync           = FB_SYNC_OE_ACT_HIGH | FB_SYNC_CLK_INVERT,
 505                 .vmode          = FB_VMODE_NONINTERLACED,
 506                 .flag           = 0,
 507         },
 508 };
 509
 510 static struct mx3fb_platform_data mx3fb_pdata = {
 511         .dma_dev        = &mx3_ipu.dev,
 512         .name           = "Sharp-LQ035Q7DH06-QVGA",
 513         .mode           = fb_modedb,
 514         .num_modes      = ARRAY_SIZE(fb_modedb),
 515 };
 516
 517 static struct resource pcm970_sja1000_resources[] = {
 518         {
 519                 .start   = MX31_CS5_BASE_ADDR,
 520                 .end     = MX31_CS5_BASE_ADDR + 0x100 - 1,
 521                 .flags   = IORESOURCE_MEM,
 522         }, {
 523                 .start   = IOMUX_TO_IRQ(IOMUX_PIN(48, 105)),
 524                 .end     = IOMUX_TO_IRQ(IOMUX_PIN(48, 105)),
 525                 .flags   = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
 526         },
 527 };
 528
 529 struct sja1000_platform_data pcm970_sja1000_platform_data = {
 530         .osc_freq       = 16000000,
 531         .ocr            = OCR_TX1_PULLDOWN | OCR_TX0_PUSHPULL,
 532         .cdr            = CDR_CBP,
 533 };
 534
 535 static struct platform_device pcm970_sja1000 = {
 536         .name = "sja1000_platform",
 537         .dev = {
 538                 .platform_data = &pcm970_sja1000_platform_data,
 539         },
 540         .resource = pcm970_sja1000_resources,
 541         .num_resources = ARRAY_SIZE(pcm970_sja1000_resources),
 542 };
 543
 544 static struct mxc_usbh_platform_data otg_pdata = {
 545         .portsc = MXC_EHCI_MODE_ULPI,
 546         .flags  = MXC_EHCI_INTERFACE_DIFF_UNI,
 547 };
 548
 549 static struct mxc_usbh_platform_data usbh2_pdata = {
 550         .portsc = MXC_EHCI_MODE_ULPI,
 551         .flags  = MXC_EHCI_INTERFACE_DIFF_UNI,
 552 };
 553
 554 static struct fsl_usb2_platform_data otg_device_pdata = {
 555         .operating_mode = FSL_USB2_DR_DEVICE,
 556         .phy_mode       = FSL_USB2_PHY_ULPI,
 557 };
 558
 559 static int otg_mode_host;
 560
 561 static int __init pcm037_otg_mode(char *options)
 562 {
 563         if (!strcmp(options, "host"))
 564                 otg_mode_host = 1;
 565         else if (!strcmp(options, "device"))
 566                 otg_mode_host = 0;
 567         else
 568                 pr_info("otg_mode neither \"host\" nor \"device\". "
 569                         "Defaulting to device\n");
 570         return 0;
 571 }
 572 __setup("otg_mode=", pcm037_otg_mode);
 573
 574 /*
 575  * Board specific initialization.
 576  */
 577 static void __init mxc_board_init(void)
 578 {
 579         int ret;
 580         u32 tmp;
 581
 582         mxc_iomux_set_gpr(MUX_PGP_UH2, 1);
 583
 584         mxc_iomux_setup_multiple_pins(pcm037_pins, ARRAY_SIZE(pcm037_pins),
 585                         "pcm037");
 586
 587 #define H2_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS \
 588                 | PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
 589
 590         mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, H2_PAD_CFG);
 591         mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, H2_PAD_CFG);
 592         mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, H2_PAD_CFG);
 593         mxc_iomux_set_pad(MX31_PIN_USBH2_STP, H2_PAD_CFG);
 594         mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, H2_PAD_CFG); /* USBH2_DATA0 */
 595         mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, H2_PAD_CFG); /* USBH2_DATA1 */
 596         mxc_iomux_set_pad(MX31_PIN_SRXD6, H2_PAD_CFG);  /* USBH2_DATA2 */
 597         mxc_iomux_set_pad(MX31_PIN_STXD6, H2_PAD_CFG);  /* USBH2_DATA3 */
 598         mxc_iomux_set_pad(MX31_PIN_SFS3, H2_PAD_CFG);   /* USBH2_DATA4 */
 599         mxc_iomux_set_pad(MX31_PIN_SCK3, H2_PAD_CFG);   /* USBH2_DATA5 */
 600         mxc_iomux_set_pad(MX31_PIN_SRXD3, H2_PAD_CFG);  /* USBH2_DATA6 */
 601         mxc_iomux_set_pad(MX31_PIN_STXD3, H2_PAD_CFG);  /* USBH2_DATA7 */
 602
 603         if (pcm037_variant() == PCM037_EET)
 604                 mxc_iomux_setup_multiple_pins(pcm037_uart1_pins,
 605                         ARRAY_SIZE(pcm037_uart1_pins), "pcm037_uart1");
 606         else
 607                 mxc_iomux_setup_multiple_pins(pcm037_uart1_handshake_pins,
 608                         ARRAY_SIZE(pcm037_uart1_handshake_pins),
 609                         "pcm037_uart1");
 610
 611         platform_add_devices(devices, ARRAY_SIZE(devices));
 612
 613         mxc_register_device(&mxc_uart_device0, &uart_pdata);
 614         mxc_register_device(&mxc_uart_device1, &uart_pdata);
 615         mxc_register_device(&mxc_uart_device2, &uart_pdata);
 616
 617         mxc_register_device(&mxc_w1_master_device, NULL);
 618
 619         /* LAN9217 IRQ pin */
 620         ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1), "lan9217-irq");
 621         if (ret)
 622                 pr_warning("could not get LAN irq gpio\n");
 623         else {
 624                 gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1));
 625                 platform_device_register(&pcm037_eth);
 626         }
 627
 628
 629         /* I2C adapters and devices */
 630         i2c_register_board_info(1, pcm037_i2c_devices,
 631                         ARRAY_SIZE(pcm037_i2c_devices));
 632
 633         mxc_register_device(&mxc_i2c_device1, &pcm037_i2c_1_data);
 634         mxc_register_device(&mxc_i2c_device2, &pcm037_i2c_2_data);
 635
 636         imx31_add_mxc_nand(&pcm037_nand_board_info);
 637         mxc_register_device(&mxcsdhc_device0, &sdhc_pdata);
 638         mxc_register_device(&mx3_ipu, &mx3_ipu_data);
 639         mxc_register_device(&mx3_fb, &mx3fb_pdata);
 640
 641         /* CSI */
 642         /* Camera power: default - off */
 643         ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_CSI_D5), "mt9t031-power");
 644         if (!ret)
 645                 gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_CSI_D5), 1);
 646         else
 647                 iclink_mt9t031.power = NULL;
 648
 649         if (!pcm037_camera_alloc_dma(4 * 1024 * 1024))
 650                 mxc_register_device(&mx3_camera, &camera_pdata);
 651
 652         platform_device_register(&pcm970_sja1000);
 653
 654 #if defined(CONFIG_USB_ULPI)
 655         if (otg_mode_host) {
 656                 otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
 657                                 USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
 658
 659                 mxc_register_device(&mxc_otg_host, &otg_pdata);
 660         }
 661
 662         usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
 663                                 USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
 664
 665         mxc_register_device(&mxc_usbh2, &usbh2_pdata);
 666 #endif
 667         if (!otg_mode_host)
 668                 mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata);
 669
 670 }
 671
 672 static void __init pcm037_timer_init(void)
 673 {
 674         mx31_clocks_init(26000000);
 675 }
 676
 677 struct sys_timer pcm037_timer = {
 678         .init   = pcm037_timer_init,
 679 };
 680
 681 MACHINE_START(PCM037, "Phytec Phycore pcm037")
 682         /* Maintainer: Pengutronix */
 683         .phys_io        = MX31_AIPS1_BASE_ADDR,
 684         .io_pg_offst    = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
 685         .boot_params    = MX3x_PHYS_OFFSET + 0x100,
 686         .map_io         = mx31_map_io,
 687         .init_irq       = mx31_init_irq,
 688         .init_machine   = mxc_board_init,
 689         .timer          = &pcm037_timer,
 690 MACHINE_END