arch/arm/mach-iop33x/iq80331.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * arch/arm/mach-iop33x/iq80331.c
   4  *
   5  * Board support code for the Intel IQ80331 platform.
   6  *
   7  * Author: Dave Jiang <dave.jiang@intel.com>
   8  * Copyright (C) 2003 Intel Corp.
   9  */
  10
  11 #include <linux/mm.h>
  12 #include <linux/init.h>
  13 #include <linux/kernel.h>
  14 #include <linux/pci.h>
  15 #include <linux/string.h>
  16 #include <linux/serial_core.h>
  17 #include <linux/serial_8250.h>
  18 #include <linux/mtd/physmap.h>
  19 #include <linux/platform_device.h>
  20 #include <linux/io.h>
  21 #include <mach/hardware.h>
  22 #include <asm/irq.h>
  23 #include <asm/mach/arch.h>
  24 #include <asm/mach/map.h>
  25 #include <asm/mach/pci.h>
  26 #include <asm/mach/time.h>
  27 #include <asm/mach-types.h>
  28 #include <asm/page.h>
  29 #include <asm/pgtable.h>
  30 #include <mach/time.h>
  31
  32 /*
  33  * IQ80331 timer tick configuration.
  34  */
  35 static void __init iq80331_timer_init(void)
  36 {
  37         /* D-Step parts run at a higher internal bus frequency */
  38         if (*IOP3XX_ATURID >= 0xa)
  39                 iop_init_time(333000000);
  40         else
  41                 iop_init_time(266000000);
  42 }
  43
  44
  45 /*
  46  * IQ80331 PCI.
  47  */
  48 static int __init
  49 iq80331_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
  50 {
  51         int irq;
  52
  53         if (slot == 1 && pin == 1) {
  54                 /* PCI-X Slot INTA */
  55                 irq = IRQ_IOP33X_XINT1;
  56         } else if (slot == 1 && pin == 2) {
  57                 /* PCI-X Slot INTB */
  58                 irq = IRQ_IOP33X_XINT2;
  59         } else if (slot == 1 && pin == 3) {
  60                 /* PCI-X Slot INTC */
  61                 irq = IRQ_IOP33X_XINT3;
  62         } else if (slot == 1 && pin == 4) {
  63                 /* PCI-X Slot INTD */
  64                 irq = IRQ_IOP33X_XINT0;
  65         } else if (slot == 2) {
  66                 /* GigE */
  67                 irq = IRQ_IOP33X_XINT2;
  68         } else {
  69                 printk(KERN_ERR "iq80331_pci_map_irq() called for unknown "
  70                         "device PCI:%d:%d:%d\n", dev->bus->number,
  71                         PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
  72                 irq = -1;
  73         }
  74
  75         return irq;
  76 }
  77
  78 static struct hw_pci iq80331_pci __initdata = {
  79         .nr_controllers = 1,
  80         .ops            = &iop3xx_ops,
  81         .setup          = iop3xx_pci_setup,
  82         .preinit        = iop3xx_pci_preinit_cond,
  83         .map_irq        = iq80331_pci_map_irq,
  84 };
  85
  86 static int __init iq80331_pci_init(void)
  87 {
  88         if ((iop3xx_get_init_atu() == IOP3XX_INIT_ATU_ENABLE) &&
  89                 machine_is_iq80331())
  90                 pci_common_init(&iq80331_pci);
  91
  92         return 0;
  93 }
  94
  95 subsys_initcall(iq80331_pci_init);
  96
  97
  98 /*
  99  * IQ80331 machine initialisation.
 100  */
 101 static struct physmap_flash_data iq80331_flash_data = {
 102         .width          = 1,
 103 };
 104
 105 static struct resource iq80331_flash_resource = {
 106         .start          = 0xc0000000,
 107         .end            = 0xc07fffff,
 108         .flags          = IORESOURCE_MEM,
 109 };
 110
 111 static struct platform_device iq80331_flash_device = {
 112         .name           = "physmap-flash",
 113         .id             = 0,
 114         .dev            = {
 115                 .platform_data  = &iq80331_flash_data,
 116         },
 117         .num_resources  = 1,
 118         .resource       = &iq80331_flash_resource,
 119 };
 120
 121 static struct resource iq80331_gpio_res[] = {
 122         DEFINE_RES_MEM((IOP3XX_PERIPHERAL_PHYS_BASE + 0x1780), 0x10),
 123 };
 124
 125 static void __init iq80331_init_machine(void)
 126 {
 127         platform_device_register_simple("gpio-iop", 0,
 128                                         iq80331_gpio_res,
 129                                         ARRAY_SIZE(iq80331_gpio_res));
 130         platform_device_register(&iop3xx_i2c0_device);
 131         platform_device_register(&iop3xx_i2c1_device);
 132         platform_device_register(&iop33x_uart0_device);
 133         platform_device_register(&iop33x_uart1_device);
 134         platform_device_register(&iq80331_flash_device);
 135         platform_device_register(&iop3xx_dma_0_channel);
 136         platform_device_register(&iop3xx_dma_1_channel);
 137         platform_device_register(&iop3xx_aau_channel);
 138 }
 139
 140 MACHINE_START(IQ80331, "Intel IQ80331")
 141         /* Maintainer: Intel Corp. */
 142         .atag_offset    = 0x100,
 143         .map_io         = iop3xx_map_io,
 144         .init_irq       = iop33x_init_irq,
 145         .init_time      = iq80331_timer_init,
 146         .init_machine   = iq80331_init_machine,
 147         .restart        = iop3xx_restart,
 148 MACHINE_END