1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * arch/arm/mach-iop32x/include/mach/irqs.h
5 * Author: Rory Bolt <rorybolt@pacbell.net>
6 * Copyright: (C) 2002 Rory Bolt
13 * IOP80321 chipset interrupts
15 #define IRQ_IOP32X_DMA0_EOT 0
16 #define IRQ_IOP32X_DMA0_EOC 1
17 #define IRQ_IOP32X_DMA1_EOT 2
18 #define IRQ_IOP32X_DMA1_EOC 3
19 #define IRQ_IOP32X_AA_EOT 6
20 #define IRQ_IOP32X_AA_EOC 7
21 #define IRQ_IOP32X_CORE_PMON 8
22 #define IRQ_IOP32X_TIMER0 9
23 #define IRQ_IOP32X_TIMER1 10
24 #define IRQ_IOP32X_I2C_0 11
25 #define IRQ_IOP32X_I2C_1 12
26 #define IRQ_IOP32X_MESSAGING 13
27 #define IRQ_IOP32X_ATU_BIST 14
28 #define IRQ_IOP32X_PERFMON 15
29 #define IRQ_IOP32X_CORE_PMU 16
30 #define IRQ_IOP32X_BIU_ERR 17
31 #define IRQ_IOP32X_ATU_ERR 18
32 #define IRQ_IOP32X_MCU_ERR 19
33 #define IRQ_IOP32X_DMA0_ERR 20
34 #define IRQ_IOP32X_DMA1_ERR 21
35 #define IRQ_IOP32X_AA_ERR 23
36 #define IRQ_IOP32X_MSG_ERR 24
37 #define IRQ_IOP32X_SSP 25
38 #define IRQ_IOP32X_XINT0 27
39 #define IRQ_IOP32X_XINT1 28
40 #define IRQ_IOP32X_XINT2 29
41 #define IRQ_IOP32X_XINT3 30
42 #define IRQ_IOP32X_HPI 31