1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * iop13xx low level irq macros
4 * Copyright (c) 2005-2006, Intel Corporation.
6 .macro get_irqnr_preamble, base, tmp
7 mrc p15, 0, \tmp, c15, c1, 0
8 orr \tmp, \tmp, #(1 << 6)
9 mcr p15, 0, \tmp, c15, c1, 0 @ Enable cp6 access
13 * Note: a 1-cycle window exists where iintvec will return the value
14 * of iintbase, so we explicitly check for "bad zeros"
16 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
17 mrc p6, 0, \irqnr, c3, c2, 0 @ Read IINTVEC
19 mrceq p6, 0, \irqnr, c3, c2, 0 @ Re-read on potentially bad zero
20 adds \irqstat, \irqnr, #1 @ Check for 0xffffffff
21 movne \irqnr, \irqnr, lsr #2 @ Convert to irqnr
24 .macro arch_ret_to_user, tmp1, tmp2
25 mrc p15, 0, \tmp1, c15, c1, 0
26 ands \tmp2, \tmp1, #(1 << 6)
27 bicne \tmp1, \tmp1, #(1 << 6)
28 mcrne p15, 0, \tmp1, c15, c1, 0 @ Disable cp6 access