arch/arm/mach-exynos/mach-smdkv310.c

   1 /* linux/arch/arm/mach-exynos4/mach-smdkv310.c
   2  *
   3  * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
   4  *              http://www.samsung.com
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9 */
  10
  11 #include <linux/serial_core.h>
  12 #include <linux/delay.h>
  13 #include <linux/gpio.h>
  14 #include <linux/lcd.h>
  15 #include <linux/mmc/host.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/smsc911x.h>
  18 #include <linux/io.h>
  19 #include <linux/i2c.h>
  20 #include <linux/input.h>
  21 #include <linux/pwm.h>
  22 #include <linux/pwm_backlight.h>
  23 #include <linux/platform_data/s3c-hsotg.h>
  24
  25 #include <asm/mach/arch.h>
  26 #include <asm/hardware/gic.h>
  27 #include <asm/mach-types.h>
  28
  29 #include <video/platform_lcd.h>
  30 #include <video/samsung_fimd.h>
  31 #include <plat/regs-serial.h>
  32 #include <plat/regs-srom.h>
  33 #include <plat/cpu.h>
  34 #include <plat/devs.h>
  35 #include <plat/fb.h>
  36 #include <plat/keypad.h>
  37 #include <plat/sdhci.h>
  38 #include <linux/platform_data/i2c-s3c2410.h>
  39 #include <plat/gpio-cfg.h>
  40 #include <plat/backlight.h>
  41 #include <plat/mfc.h>
  42 #include <linux/platform_data/usb-ehci-s5p.h>
  43 #include <plat/clock.h>
  44 #include <plat/hdmi.h>
  45
  46 #include <mach/map.h>
  47 #include <linux/platform_data/usb-exynos.h>
  48
  49 #include <drm/exynos_drm.h>
  50 #include "common.h"
  51
  52 /* Following are default values for UCON, ULCON and UFCON UART registers */
  53 #define SMDKV310_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
  54                                  S3C2410_UCON_RXILEVEL |        \
  55                                  S3C2410_UCON_TXIRQMODE |       \
  56                                  S3C2410_UCON_RXIRQMODE |       \
  57                                  S3C2410_UCON_RXFIFO_TOI |      \
  58                                  S3C2443_UCON_RXERR_IRQEN)
  59
  60 #define SMDKV310_ULCON_DEFAULT  S3C2410_LCON_CS8
  61
  62 #define SMDKV310_UFCON_DEFAULT  (S3C2410_UFCON_FIFOMODE |       \
  63                                  S5PV210_UFCON_TXTRIG4 |        \
  64                                  S5PV210_UFCON_RXTRIG4)
  65
  66 static struct s3c2410_uartcfg smdkv310_uartcfgs[] __initdata = {
  67         [0] = {
  68                 .hwport         = 0,
  69                 .flags          = 0,
  70                 .ucon           = SMDKV310_UCON_DEFAULT,
  71                 .ulcon          = SMDKV310_ULCON_DEFAULT,
  72                 .ufcon          = SMDKV310_UFCON_DEFAULT,
  73         },
  74         [1] = {
  75                 .hwport         = 1,
  76                 .flags          = 0,
  77                 .ucon           = SMDKV310_UCON_DEFAULT,
  78                 .ulcon          = SMDKV310_ULCON_DEFAULT,
  79                 .ufcon          = SMDKV310_UFCON_DEFAULT,
  80         },
  81         [2] = {
  82                 .hwport         = 2,
  83                 .flags          = 0,
  84                 .ucon           = SMDKV310_UCON_DEFAULT,
  85                 .ulcon          = SMDKV310_ULCON_DEFAULT,
  86                 .ufcon          = SMDKV310_UFCON_DEFAULT,
  87         },
  88         [3] = {
  89                 .hwport         = 3,
  90                 .flags          = 0,
  91                 .ucon           = SMDKV310_UCON_DEFAULT,
  92                 .ulcon          = SMDKV310_ULCON_DEFAULT,
  93                 .ufcon          = SMDKV310_UFCON_DEFAULT,
  94         },
  95 };
  96
  97 static struct s3c_sdhci_platdata smdkv310_hsmmc0_pdata __initdata = {
  98         .cd_type                = S3C_SDHCI_CD_INTERNAL,
  99 #ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT
 100         .max_width              = 8,
 101         .host_caps              = MMC_CAP_8_BIT_DATA,
 102 #endif
 103 };
 104
 105 static struct s3c_sdhci_platdata smdkv310_hsmmc1_pdata __initdata = {
 106         .cd_type                = S3C_SDHCI_CD_GPIO,
 107         .ext_cd_gpio            = EXYNOS4_GPK0(2),
 108         .ext_cd_gpio_invert     = 1,
 109 };
 110
 111 static struct s3c_sdhci_platdata smdkv310_hsmmc2_pdata __initdata = {
 112         .cd_type                = S3C_SDHCI_CD_INTERNAL,
 113 #ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT
 114         .max_width              = 8,
 115         .host_caps              = MMC_CAP_8_BIT_DATA,
 116 #endif
 117 };
 118
 119 static struct s3c_sdhci_platdata smdkv310_hsmmc3_pdata __initdata = {
 120         .cd_type                = S3C_SDHCI_CD_GPIO,
 121         .ext_cd_gpio            = EXYNOS4_GPK2(2),
 122         .ext_cd_gpio_invert     = 1,
 123 };
 124
 125 static void lcd_lte480wv_set_power(struct plat_lcd_data *pd,
 126                                    unsigned int power)
 127 {
 128         if (power) {
 129 #if !defined(CONFIG_BACKLIGHT_PWM)
 130                 gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_HIGH, "GPD0");
 131                 gpio_free(EXYNOS4_GPD0(1));
 132 #endif
 133                 /* fire nRESET on power up */
 134                 gpio_request_one(EXYNOS4_GPX0(6), GPIOF_OUT_INIT_HIGH, "GPX0");
 135                 mdelay(100);
 136
 137                 gpio_set_value(EXYNOS4_GPX0(6), 0);
 138                 mdelay(10);
 139
 140                 gpio_set_value(EXYNOS4_GPX0(6), 1);
 141                 mdelay(10);
 142
 143                 gpio_free(EXYNOS4_GPX0(6));
 144         } else {
 145 #if !defined(CONFIG_BACKLIGHT_PWM)
 146                 gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_LOW, "GPD0");
 147                 gpio_free(EXYNOS4_GPD0(1));
 148 #endif
 149         }
 150 }
 151
 152 static struct plat_lcd_data smdkv310_lcd_lte480wv_data = {
 153         .set_power              = lcd_lte480wv_set_power,
 154 };
 155
 156 static struct platform_device smdkv310_lcd_lte480wv = {
 157         .name                   = "platform-lcd",
 158         .dev.parent             = &s5p_device_fimd0.dev,
 159         .dev.platform_data      = &smdkv310_lcd_lte480wv_data,
 160 };
 161
 162 #ifdef CONFIG_DRM_EXYNOS
 163 static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
 164         .panel  = {
 165                 .timing = {
 166                         .left_margin    = 13,
 167                         .right_margin   = 8,
 168                         .upper_margin   = 7,
 169                         .lower_margin   = 5,
 170                         .hsync_len      = 3,
 171                         .vsync_len      = 1,
 172                         .xres           = 800,
 173                         .yres           = 480,
 174                 },
 175         },
 176         .vidcon0        = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
 177         .vidcon1        = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
 178         .default_win    = 0,
 179         .bpp            = 32,
 180 };
 181 #else
 182 static struct s3c_fb_pd_win smdkv310_fb_win0 = {
 183         .max_bpp        = 32,
 184         .default_bpp    = 24,
 185         .xres           = 800,
 186         .yres           = 480,
 187 };
 188
 189 static struct fb_videomode smdkv310_lcd_timing = {
 190         .left_margin    = 13,
 191         .right_margin   = 8,
 192         .upper_margin   = 7,
 193         .lower_margin   = 5,
 194         .hsync_len      = 3,
 195         .vsync_len      = 1,
 196         .xres           = 800,
 197         .yres           = 480,
 198 };
 199
 200 static struct s3c_fb_platdata smdkv310_lcd0_pdata __initdata = {
 201         .win[0]         = &smdkv310_fb_win0,
 202         .vtiming        = &smdkv310_lcd_timing,
 203         .vidcon0        = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
 204         .vidcon1        = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
 205         .setup_gpio     = exynos4_fimd0_gpio_setup_24bpp,
 206 };
 207 #endif
 208
 209 static struct resource smdkv310_smsc911x_resources[] = {
 210         [0] = DEFINE_RES_MEM(EXYNOS4_PA_SROM_BANK(1), SZ_64K),
 211         [1] = DEFINE_RES_NAMED(IRQ_EINT(5), 1, NULL, IORESOURCE_IRQ \
 212                                                 | IRQF_TRIGGER_LOW),
 213 };
 214
 215 static struct smsc911x_platform_config smsc9215_config = {
 216         .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
 217         .irq_type       = SMSC911X_IRQ_TYPE_PUSH_PULL,
 218         .flags          = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY,
 219         .phy_interface  = PHY_INTERFACE_MODE_MII,
 220         .mac            = {0x00, 0x80, 0x00, 0x23, 0x45, 0x67},
 221 };
 222
 223 static struct platform_device smdkv310_smsc911x = {
 224         .name           = "smsc911x",
 225         .id             = -1,
 226         .num_resources  = ARRAY_SIZE(smdkv310_smsc911x_resources),
 227         .resource       = smdkv310_smsc911x_resources,
 228         .dev            = {
 229                 .platform_data  = &smsc9215_config,
 230         },
 231 };
 232
 233 static uint32_t smdkv310_keymap[] __initdata = {
 234         /* KEY(row, col, keycode) */
 235         KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
 236         KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
 237         KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
 238         KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
 239 };
 240
 241 static struct matrix_keymap_data smdkv310_keymap_data __initdata = {
 242         .keymap         = smdkv310_keymap,
 243         .keymap_size    = ARRAY_SIZE(smdkv310_keymap),
 244 };
 245
 246 static struct samsung_keypad_platdata smdkv310_keypad_data __initdata = {
 247         .keymap_data    = &smdkv310_keymap_data,
 248         .rows           = 2,
 249         .cols           = 8,
 250 };
 251
 252 static struct i2c_board_info i2c_devs1[] __initdata = {
 253         {I2C_BOARD_INFO("wm8994", 0x1a),},
 254 };
 255
 256 /* USB EHCI */
 257 static struct s5p_ehci_platdata smdkv310_ehci_pdata;
 258
 259 static void __init smdkv310_ehci_init(void)
 260 {
 261         struct s5p_ehci_platdata *pdata = &smdkv310_ehci_pdata;
 262
 263         s5p_ehci_set_platdata(pdata);
 264 }
 265
 266 /* USB OHCI */
 267 static struct exynos4_ohci_platdata smdkv310_ohci_pdata;
 268
 269 static void __init smdkv310_ohci_init(void)
 270 {
 271         struct exynos4_ohci_platdata *pdata = &smdkv310_ohci_pdata;
 272
 273         exynos4_ohci_set_platdata(pdata);
 274 }
 275
 276 /* USB OTG */
 277 static struct s3c_hsotg_plat smdkv310_hsotg_pdata;
 278
 279 /* Audio device */
 280 static struct platform_device smdkv310_device_audio = {
 281         .name = "smdk-audio",
 282         .id = -1,
 283 };
 284
 285 static struct platform_device *smdkv310_devices[] __initdata = {
 286         &s3c_device_hsmmc0,
 287         &s3c_device_hsmmc1,
 288         &s3c_device_hsmmc2,
 289         &s3c_device_hsmmc3,
 290         &s3c_device_i2c1,
 291         &s5p_device_i2c_hdmiphy,
 292         &s3c_device_rtc,
 293         &s3c_device_usb_hsotg,
 294         &s3c_device_wdt,
 295         &s5p_device_ehci,
 296         &s5p_device_fimc0,
 297         &s5p_device_fimc1,
 298         &s5p_device_fimc2,
 299         &s5p_device_fimc3,
 300         &s5p_device_fimc_md,
 301         &s5p_device_g2d,
 302         &s5p_device_jpeg,
 303 #ifdef CONFIG_DRM_EXYNOS
 304         &exynos_device_drm,
 305 #endif
 306         &exynos4_device_ac97,
 307         &exynos4_device_i2s0,
 308         &exynos4_device_ohci,
 309         &samsung_device_keypad,
 310         &s5p_device_mfc,
 311         &s5p_device_mfc_l,
 312         &s5p_device_mfc_r,
 313         &exynos4_device_spdif,
 314         &samsung_asoc_dma,
 315         &samsung_asoc_idma,
 316         &s5p_device_fimd0,
 317         &smdkv310_device_audio,
 318         &smdkv310_lcd_lte480wv,
 319         &smdkv310_smsc911x,
 320         &exynos4_device_ahci,
 321         &s5p_device_hdmi,
 322         &s5p_device_mixer,
 323 };
 324
 325 static void __init smdkv310_smsc911x_init(void)
 326 {
 327         u32 cs1;
 328
 329         /* configure nCS1 width to 16 bits */
 330         cs1 = __raw_readl(S5P_SROM_BW) &
 331                 ~(S5P_SROM_BW__CS_MASK << S5P_SROM_BW__NCS1__SHIFT);
 332         cs1 |= ((1 << S5P_SROM_BW__DATAWIDTH__SHIFT) |
 333                 (1 << S5P_SROM_BW__WAITENABLE__SHIFT) |
 334                 (1 << S5P_SROM_BW__BYTEENABLE__SHIFT)) <<
 335                 S5P_SROM_BW__NCS1__SHIFT;
 336         __raw_writel(cs1, S5P_SROM_BW);
 337
 338         /* set timing for nCS1 suitable for ethernet chip */
 339         __raw_writel((0x1 << S5P_SROM_BCX__PMC__SHIFT) |
 340                      (0x9 << S5P_SROM_BCX__TACP__SHIFT) |
 341                      (0xc << S5P_SROM_BCX__TCAH__SHIFT) |
 342                      (0x1 << S5P_SROM_BCX__TCOH__SHIFT) |
 343                      (0x6 << S5P_SROM_BCX__TACC__SHIFT) |
 344                      (0x1 << S5P_SROM_BCX__TCOS__SHIFT) |
 345                      (0x1 << S5P_SROM_BCX__TACS__SHIFT), S5P_SROM_BC1);
 346 }
 347
 348 /* LCD Backlight data */
 349 static struct samsung_bl_gpio_info smdkv310_bl_gpio_info = {
 350         .no = EXYNOS4_GPD0(1),
 351         .func = S3C_GPIO_SFN(2),
 352 };
 353
 354 static struct platform_pwm_backlight_data smdkv310_bl_data = {
 355         .pwm_id = 1,
 356         .pwm_period_ns  = 1000,
 357 };
 358
 359 /* I2C module and id for HDMIPHY */
 360 static struct i2c_board_info hdmiphy_info = {
 361         I2C_BOARD_INFO("hdmiphy-exynos4210", 0x38),
 362 };
 363
 364 static struct pwm_lookup smdkv310_pwm_lookup[] = {
 365         PWM_LOOKUP("s3c24xx-pwm.1", 0, "pwm-backlight.0", NULL),
 366 };
 367
 368 static void s5p_tv_setup(void)
 369 {
 370         /* direct HPD to HDMI chip */
 371         WARN_ON(gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug"));
 372         s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
 373         s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
 374 }
 375
 376 static void __init smdkv310_map_io(void)
 377 {
 378         exynos_init_io(NULL, 0);
 379         s3c24xx_init_clocks(clk_xusbxti.rate);
 380         s3c24xx_init_uarts(smdkv310_uartcfgs, ARRAY_SIZE(smdkv310_uartcfgs));
 381 }
 382
 383 static void __init smdkv310_reserve(void)
 384 {
 385         s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
 386 }
 387
 388 static void __init smdkv310_machine_init(void)
 389 {
 390         s3c_i2c1_set_platdata(NULL);
 391         i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
 392
 393         smdkv310_smsc911x_init();
 394
 395         s3c_sdhci0_set_platdata(&smdkv310_hsmmc0_pdata);
 396         s3c_sdhci1_set_platdata(&smdkv310_hsmmc1_pdata);
 397         s3c_sdhci2_set_platdata(&smdkv310_hsmmc2_pdata);
 398         s3c_sdhci3_set_platdata(&smdkv310_hsmmc3_pdata);
 399
 400         s5p_tv_setup();
 401         s5p_i2c_hdmiphy_set_platdata(NULL);
 402         s5p_hdmi_set_platdata(&hdmiphy_info, NULL, 0);
 403
 404         samsung_keypad_set_platdata(&smdkv310_keypad_data);
 405
 406         samsung_bl_set(&smdkv310_bl_gpio_info, &smdkv310_bl_data);
 407         pwm_add_table(smdkv310_pwm_lookup, ARRAY_SIZE(smdkv310_pwm_lookup));
 408
 409 #ifdef CONFIG_DRM_EXYNOS
 410         s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
 411         exynos4_fimd0_gpio_setup_24bpp();
 412 #else
 413         s5p_fimd0_set_platdata(&smdkv310_lcd0_pdata);
 414 #endif
 415
 416         smdkv310_ehci_init();
 417         smdkv310_ohci_init();
 418         s3c_hsotg_set_platdata(&smdkv310_hsotg_pdata);
 419
 420         platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices));
 421 }
 422
 423 MACHINE_START(SMDKV310, "SMDKV310")
 424         /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
 425         /* Maintainer: Changhwan Youn <chaos.youn@samsung.com> */
 426         .atag_offset    = 0x100,
 427         .smp            = smp_ops(exynos_smp_ops),
 428         .init_irq       = exynos4_init_irq,
 429         .map_io         = smdkv310_map_io,
 430         .handle_irq     = gic_handle_irq,
 431         .init_machine   = smdkv310_machine_init,
 432         .timer          = &exynos4_timer,
 433         .reserve        = &smdkv310_reserve,
 434         .restart        = exynos4_restart,
 435 MACHINE_END
 436
 437 MACHINE_START(SMDKC210, "SMDKC210")
 438         /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
 439         .atag_offset    = 0x100,
 440         .smp            = smp_ops(exynos_smp_ops),
 441         .init_irq       = exynos4_init_irq,
 442         .map_io         = smdkv310_map_io,
 443         .handle_irq     = gic_handle_irq,
 444         .init_machine   = smdkv310_machine_init,
 445         .init_late      = exynos_init_late,
 446         .timer          = &exynos4_timer,
 447         .reserve        = &smdkv310_reserve,
 448         .restart        = exynos4_restart,
 449 MACHINE_END