arch/arm/mach-davinci/include/mach/mux.h

   1 /*
   2  * Table of the DAVINCI register configurations for the PINMUX combinations
   3  *
   4  * Author: Vladimir Barinov, MontaVista Software, Inc. <source@mvista.com>
   5  *
   6  * Based on linux/include/asm-arm/arch-omap/mux.h:
   7  * Copyright (C) 2003 - 2005 Nokia Corporation
   8  *
   9  * Written by Tony Lindgren
  10  *
  11  * 2007 (c) MontaVista Software, Inc. This file is licensed under
  12  * the terms of the GNU General Public License version 2. This program
  13  * is licensed "as is" without any warranty of any kind, whether express
  14  * or implied.
  15  *
  16  * Copyright (C) 2008 Texas Instruments.
  17  */
  18
  19 #ifndef __INC_MACH_MUX_H
  20 #define __INC_MACH_MUX_H
  21
  22 struct mux_config {
  23         const char *name;
  24         const char *mux_reg_name;
  25         const unsigned char mux_reg;
  26         const unsigned char mask_offset;
  27         const unsigned char mask;
  28         const unsigned char mode;
  29         bool debug;
  30 };
  31
  32 enum davinci_dm644x_index {
  33         /* ATA and HDDIR functions */
  34         DM644X_HDIREN,
  35         DM644X_ATAEN,
  36         DM644X_ATAEN_DISABLE,
  37
  38         /* HPI functions */
  39         DM644X_HPIEN_DISABLE,
  40
  41         /* AEAW functions */
  42         DM644X_AEAW,
  43
  44         /* Memory Stick */
  45         DM644X_MSTK,
  46
  47         /* I2C */
  48         DM644X_I2C,
  49
  50         /* ASP function */
  51         DM644X_MCBSP,
  52
  53         /* UART1 */
  54         DM644X_UART1,
  55
  56         /* UART2 */
  57         DM644X_UART2,
  58
  59         /* PWM0 */
  60         DM644X_PWM0,
  61
  62         /* PWM1 */
  63         DM644X_PWM1,
  64
  65         /* PWM2 */
  66         DM644X_PWM2,
  67
  68         /* VLYNQ function */
  69         DM644X_VLYNQEN,
  70         DM644X_VLSCREN,
  71         DM644X_VLYNQWD,
  72
  73         /* EMAC and MDIO function */
  74         DM644X_EMACEN,
  75
  76         /* GPIO3V[0:16] pins */
  77         DM644X_GPIO3V,
  78
  79         /* GPIO pins */
  80         DM644X_GPIO0,
  81         DM644X_GPIO3,
  82         DM644X_GPIO43_44,
  83         DM644X_GPIO46_47,
  84
  85         /* VPBE */
  86         DM644X_RGB666,
  87
  88         /* LCD */
  89         DM644X_LOEEN,
  90         DM644X_LFLDEN,
  91 };
  92
  93 enum davinci_dm646x_index {
  94         /* ATA function */
  95         DM646X_ATAEN,
  96
  97         /* AUDIO Clock */
  98         DM646X_AUDCK1,
  99         DM646X_AUDCK0,
 100
 101         /* CRGEN Control */
 102         DM646X_CRGMUX,
 103
 104         /* VPIF Control */
 105         DM646X_STSOMUX_DISABLE,
 106         DM646X_STSIMUX_DISABLE,
 107         DM646X_PTSOMUX_DISABLE,
 108         DM646X_PTSIMUX_DISABLE,
 109
 110         /* TSIF Control */
 111         DM646X_STSOMUX,
 112         DM646X_STSIMUX,
 113         DM646X_PTSOMUX_PARALLEL,
 114         DM646X_PTSIMUX_PARALLEL,
 115         DM646X_PTSOMUX_SERIAL,
 116         DM646X_PTSIMUX_SERIAL,
 117 };
 118
 119 enum davinci_dm355_index {
 120         /* MMC/SD 0 */
 121         DM355_MMCSD0,
 122
 123         /* MMC/SD 1 */
 124         DM355_SD1_CLK,
 125         DM355_SD1_CMD,
 126         DM355_SD1_DATA3,
 127         DM355_SD1_DATA2,
 128         DM355_SD1_DATA1,
 129         DM355_SD1_DATA0,
 130
 131         /* I2C */
 132         DM355_I2C_SDA,
 133         DM355_I2C_SCL,
 134
 135         /* ASP0 function */
 136         DM355_MCBSP0_BDX,
 137         DM355_MCBSP0_X,
 138         DM355_MCBSP0_BFSX,
 139         DM355_MCBSP0_BDR,
 140         DM355_MCBSP0_R,
 141         DM355_MCBSP0_BFSR,
 142
 143         /* SPI0 */
 144         DM355_SPI0_SDI,
 145         DM355_SPI0_SDENA0,
 146         DM355_SPI0_SDENA1,
 147
 148         /* IRQ muxing */
 149         DM355_INT_EDMA_CC,
 150         DM355_INT_EDMA_TC0_ERR,
 151         DM355_INT_EDMA_TC1_ERR,
 152
 153         /* EDMA event muxing */
 154         DM355_EVT8_ASP1_TX,
 155         DM355_EVT9_ASP1_RX,
 156         DM355_EVT26_MMC0_RX,
 157
 158         /* Video Out */
 159         DM355_VOUT_FIELD,
 160         DM355_VOUT_FIELD_G70,
 161         DM355_VOUT_HVSYNC,
 162         DM355_VOUT_COUTL_EN,
 163         DM355_VOUT_COUTH_EN,
 164 };
 165
 166 enum davinci_dm365_index {
 167         /* MMC/SD 0 */
 168         DM365_MMCSD0,
 169
 170         /* MMC/SD 1 */
 171         DM365_SD1_CLK,
 172         DM365_SD1_CMD,
 173         DM365_SD1_DATA3,
 174         DM365_SD1_DATA2,
 175         DM365_SD1_DATA1,
 176         DM365_SD1_DATA0,
 177
 178         /* I2C */
 179         DM365_I2C_SDA,
 180         DM365_I2C_SCL,
 181
 182         /* AEMIF */
 183         DM365_AEMIF_AR,
 184         DM365_AEMIF_A3,
 185         DM365_AEMIF_A7,
 186         DM365_AEMIF_D15_8,
 187         DM365_AEMIF_CE0,
 188
 189         /* ASP0 function */
 190         DM365_MCBSP0_BDX,
 191         DM365_MCBSP0_X,
 192         DM365_MCBSP0_BFSX,
 193         DM365_MCBSP0_BDR,
 194         DM365_MCBSP0_R,
 195         DM365_MCBSP0_BFSR,
 196
 197         /* SPI0 */
 198         DM365_SPI0_SCLK,
 199         DM365_SPI0_SDI,
 200         DM365_SPI0_SDO,
 201         DM365_SPI0_SDENA0,
 202         DM365_SPI0_SDENA1,
 203
 204         /* UART */
 205         DM365_UART0_RXD,
 206         DM365_UART0_TXD,
 207         DM365_UART1_RXD,
 208         DM365_UART1_TXD,
 209         DM365_UART1_RTS,
 210         DM365_UART1_CTS,
 211
 212         /* EMAC */
 213         DM365_EMAC_TX_EN,
 214         DM365_EMAC_TX_CLK,
 215         DM365_EMAC_COL,
 216         DM365_EMAC_TXD3,
 217         DM365_EMAC_TXD2,
 218         DM365_EMAC_TXD1,
 219         DM365_EMAC_TXD0,
 220         DM365_EMAC_RXD3,
 221         DM365_EMAC_RXD2,
 222         DM365_EMAC_RXD1,
 223         DM365_EMAC_RXD0,
 224         DM365_EMAC_RX_CLK,
 225         DM365_EMAC_RX_DV,
 226         DM365_EMAC_RX_ER,
 227         DM365_EMAC_CRS,
 228         DM365_EMAC_MDIO,
 229         DM365_EMAC_MDCLK,
 230
 231         /* Keypad */
 232         DM365_KEYPAD,
 233
 234         /* PWM */
 235         DM365_PWM0,
 236         DM365_PWM0_G23,
 237         DM365_PWM1,
 238         DM365_PWM1_G25,
 239         DM365_PWM2_G87,
 240         DM365_PWM2_G88,
 241         DM365_PWM2_G89,
 242         DM365_PWM2_G90,
 243         DM365_PWM3_G80,
 244         DM365_PWM3_G81,
 245         DM365_PWM3_G85,
 246         DM365_PWM3_G86,
 247
 248         /* SPI1 */
 249         DM365_SPI1_SCLK,
 250         DM365_SPI1_SDO,
 251         DM365_SPI1_SDI,
 252         DM365_SPI1_SDENA0,
 253         DM365_SPI1_SDENA1,
 254
 255         /* SPI2 */
 256         DM365_SPI2_SCLK,
 257         DM365_SPI2_SDO,
 258         DM365_SPI2_SDI,
 259         DM365_SPI2_SDENA0,
 260         DM365_SPI2_SDENA1,
 261
 262         /* SPI3 */
 263         DM365_SPI3_SCLK,
 264         DM365_SPI3_SDO,
 265         DM365_SPI3_SDI,
 266         DM365_SPI3_SDENA0,
 267         DM365_SPI3_SDENA1,
 268
 269         /* SPI4 */
 270         DM365_SPI4_SCLK,
 271         DM365_SPI4_SDO,
 272         DM365_SPI4_SDI,
 273         DM365_SPI4_SDENA0,
 274         DM365_SPI4_SDENA1,
 275
 276         /* GPIO */
 277         DM365_GPIO20,
 278         DM365_GPIO33,
 279         DM365_GPIO40,
 280
 281         /* Video */
 282         DM365_VOUT_FIELD,
 283         DM365_VOUT_FIELD_G81,
 284         DM365_VOUT_HVSYNC,
 285         DM365_VOUT_COUTL_EN,
 286         DM365_VOUT_COUTH_EN,
 287         DM365_VIN_CAM_WEN,
 288         DM365_VIN_CAM_VD,
 289         DM365_VIN_CAM_HD,
 290         DM365_VIN_YIN4_7_EN,
 291         DM365_VIN_YIN0_3_EN,
 292
 293         /* IRQ muxing */
 294         DM365_INT_EDMA_CC,
 295         DM365_INT_EDMA_TC0_ERR,
 296         DM365_INT_EDMA_TC1_ERR,
 297         DM365_INT_EDMA_TC2_ERR,
 298         DM365_INT_EDMA_TC3_ERR,
 299         DM365_INT_PRTCSS,
 300         DM365_INT_EMAC_RXTHRESH,
 301         DM365_INT_EMAC_RXPULSE,
 302         DM365_INT_EMAC_TXPULSE,
 303         DM365_INT_EMAC_MISCPULSE,
 304         DM365_INT_IMX0_ENABLE,
 305         DM365_INT_IMX0_DISABLE,
 306         DM365_INT_HDVICP_ENABLE,
 307         DM365_INT_HDVICP_DISABLE,
 308         DM365_INT_IMX1_ENABLE,
 309         DM365_INT_IMX1_DISABLE,
 310         DM365_INT_NSF_ENABLE,
 311         DM365_INT_NSF_DISABLE,
 312
 313         /* EDMA event muxing */
 314         DM365_EVT2_ASP_TX,
 315         DM365_EVT3_ASP_RX,
 316         DM365_EVT26_MMC0_RX,
 317 };
 318
 319 enum da830_index {
 320         DA830_GPIO7_14,
 321         DA830_RTCK,
 322         DA830_GPIO7_15,
 323         DA830_EMU_0,
 324         DA830_EMB_SDCKE,
 325         DA830_EMB_CLK_GLUE,
 326         DA830_EMB_CLK,
 327         DA830_NEMB_CS_0,
 328         DA830_NEMB_CAS,
 329         DA830_NEMB_RAS,
 330         DA830_NEMB_WE,
 331         DA830_EMB_BA_1,
 332         DA830_EMB_BA_0,
 333         DA830_EMB_A_0,
 334         DA830_EMB_A_1,
 335         DA830_EMB_A_2,
 336         DA830_EMB_A_3,
 337         DA830_EMB_A_4,
 338         DA830_EMB_A_5,
 339         DA830_GPIO7_0,
 340         DA830_GPIO7_1,
 341         DA830_GPIO7_2,
 342         DA830_GPIO7_3,
 343         DA830_GPIO7_4,
 344         DA830_GPIO7_5,
 345         DA830_GPIO7_6,
 346         DA830_GPIO7_7,
 347         DA830_EMB_A_6,
 348         DA830_EMB_A_7,
 349         DA830_EMB_A_8,
 350         DA830_EMB_A_9,
 351         DA830_EMB_A_10,
 352         DA830_EMB_A_11,
 353         DA830_EMB_A_12,
 354         DA830_EMB_D_31,
 355         DA830_GPIO7_8,
 356         DA830_GPIO7_9,
 357         DA830_GPIO7_10,
 358         DA830_GPIO7_11,
 359         DA830_GPIO7_12,
 360         DA830_GPIO7_13,
 361         DA830_GPIO3_13,
 362         DA830_EMB_D_30,
 363         DA830_EMB_D_29,
 364         DA830_EMB_D_28,
 365         DA830_EMB_D_27,
 366         DA830_EMB_D_26,
 367         DA830_EMB_D_25,
 368         DA830_EMB_D_24,
 369         DA830_EMB_D_23,
 370         DA830_EMB_D_22,
 371         DA830_EMB_D_21,
 372         DA830_EMB_D_20,
 373         DA830_EMB_D_19,
 374         DA830_EMB_D_18,
 375         DA830_EMB_D_17,
 376         DA830_EMB_D_16,
 377         DA830_NEMB_WE_DQM_3,
 378         DA830_NEMB_WE_DQM_2,
 379         DA830_EMB_D_0,
 380         DA830_EMB_D_1,
 381         DA830_EMB_D_2,
 382         DA830_EMB_D_3,
 383         DA830_EMB_D_4,
 384         DA830_EMB_D_5,
 385         DA830_EMB_D_6,
 386         DA830_GPIO6_0,
 387         DA830_GPIO6_1,
 388         DA830_GPIO6_2,
 389         DA830_GPIO6_3,
 390         DA830_GPIO6_4,
 391         DA830_GPIO6_5,
 392         DA830_GPIO6_6,
 393         DA830_EMB_D_7,
 394         DA830_EMB_D_8,
 395         DA830_EMB_D_9,
 396         DA830_EMB_D_10,
 397         DA830_EMB_D_11,
 398         DA830_EMB_D_12,
 399         DA830_EMB_D_13,
 400         DA830_EMB_D_14,
 401         DA830_GPIO6_7,
 402         DA830_GPIO6_8,
 403         DA830_GPIO6_9,
 404         DA830_GPIO6_10,
 405         DA830_GPIO6_11,
 406         DA830_GPIO6_12,
 407         DA830_GPIO6_13,
 408         DA830_GPIO6_14,
 409         DA830_EMB_D_15,
 410         DA830_NEMB_WE_DQM_1,
 411         DA830_NEMB_WE_DQM_0,
 412         DA830_SPI0_SOMI_0,
 413         DA830_SPI0_SIMO_0,
 414         DA830_SPI0_CLK,
 415         DA830_NSPI0_ENA,
 416         DA830_NSPI0_SCS_0,
 417         DA830_EQEP0I,
 418         DA830_EQEP0S,
 419         DA830_EQEP1I,
 420         DA830_NUART0_CTS,
 421         DA830_NUART0_RTS,
 422         DA830_EQEP0A,
 423         DA830_EQEP0B,
 424         DA830_GPIO6_15,
 425         DA830_GPIO5_14,
 426         DA830_GPIO5_15,
 427         DA830_GPIO5_0,
 428         DA830_GPIO5_1,
 429         DA830_GPIO5_2,
 430         DA830_GPIO5_3,
 431         DA830_GPIO5_4,
 432         DA830_SPI1_SOMI_0,
 433         DA830_SPI1_SIMO_0,
 434         DA830_SPI1_CLK,
 435         DA830_UART0_RXD,
 436         DA830_UART0_TXD,
 437         DA830_AXR1_10,
 438         DA830_AXR1_11,
 439         DA830_NSPI1_ENA,
 440         DA830_I2C1_SCL,
 441         DA830_I2C1_SDA,
 442         DA830_EQEP1S,
 443         DA830_I2C0_SDA,
 444         DA830_I2C0_SCL,
 445         DA830_UART2_RXD,
 446         DA830_TM64P0_IN12,
 447         DA830_TM64P0_OUT12,
 448         DA830_GPIO5_5,
 449         DA830_GPIO5_6,
 450         DA830_GPIO5_7,
 451         DA830_GPIO5_8,
 452         DA830_GPIO5_9,
 453         DA830_GPIO5_10,
 454         DA830_GPIO5_11,
 455         DA830_GPIO5_12,
 456         DA830_NSPI1_SCS_0,
 457         DA830_USB0_DRVVBUS,
 458         DA830_AHCLKX0,
 459         DA830_ACLKX0,
 460         DA830_AFSX0,
 461         DA830_AHCLKR0,
 462         DA830_ACLKR0,
 463         DA830_AFSR0,
 464         DA830_UART2_TXD,
 465         DA830_AHCLKX2,
 466         DA830_ECAP0_APWM0,
 467         DA830_RMII_MHZ_50_CLK,
 468         DA830_ECAP1_APWM1,
 469         DA830_USB_REFCLKIN,
 470         DA830_GPIO5_13,
 471         DA830_GPIO4_15,
 472         DA830_GPIO2_11,
 473         DA830_GPIO2_12,
 474         DA830_GPIO2_13,
 475         DA830_GPIO2_14,
 476         DA830_GPIO2_15,
 477         DA830_GPIO3_12,
 478         DA830_AMUTE0,
 479         DA830_AXR0_0,
 480         DA830_AXR0_1,
 481         DA830_AXR0_2,
 482         DA830_AXR0_3,
 483         DA830_AXR0_4,
 484         DA830_AXR0_5,
 485         DA830_AXR0_6,
 486         DA830_RMII_TXD_0,
 487         DA830_RMII_TXD_1,
 488         DA830_RMII_TXEN,
 489         DA830_RMII_CRS_DV,
 490         DA830_RMII_RXD_0,
 491         DA830_RMII_RXD_1,
 492         DA830_RMII_RXER,
 493         DA830_AFSR2,
 494         DA830_ACLKX2,
 495         DA830_AXR2_3,
 496         DA830_AXR2_2,
 497         DA830_AXR2_1,
 498         DA830_AFSX2,
 499         DA830_ACLKR2,
 500         DA830_NRESETOUT,
 501         DA830_GPIO3_0,
 502         DA830_GPIO3_1,
 503         DA830_GPIO3_2,
 504         DA830_GPIO3_3,
 505         DA830_GPIO3_4,
 506         DA830_GPIO3_5,
 507         DA830_GPIO3_6,
 508         DA830_AXR0_7,
 509         DA830_AXR0_8,
 510         DA830_UART1_RXD,
 511         DA830_UART1_TXD,
 512         DA830_AXR0_11,
 513         DA830_AHCLKX1,
 514         DA830_ACLKX1,
 515         DA830_AFSX1,
 516         DA830_MDIO_CLK,
 517         DA830_MDIO_D,
 518         DA830_AXR0_9,
 519         DA830_AXR0_10,
 520         DA830_EPWM0B,
 521         DA830_EPWM0A,
 522         DA830_EPWMSYNCI,
 523         DA830_AXR2_0,
 524         DA830_EPWMSYNC0,
 525         DA830_GPIO3_7,
 526         DA830_GPIO3_8,
 527         DA830_GPIO3_9,
 528         DA830_GPIO3_10,
 529         DA830_GPIO3_11,
 530         DA830_GPIO3_14,
 531         DA830_GPIO3_15,
 532         DA830_GPIO4_10,
 533         DA830_AHCLKR1,
 534         DA830_ACLKR1,
 535         DA830_AFSR1,
 536         DA830_AMUTE1,
 537         DA830_AXR1_0,
 538         DA830_AXR1_1,
 539         DA830_AXR1_2,
 540         DA830_AXR1_3,
 541         DA830_ECAP2_APWM2,
 542         DA830_EHRPWMGLUETZ,
 543         DA830_EQEP1A,
 544         DA830_GPIO4_11,
 545         DA830_GPIO4_12,
 546         DA830_GPIO4_13,
 547         DA830_GPIO4_14,
 548         DA830_GPIO4_0,
 549         DA830_GPIO4_1,
 550         DA830_GPIO4_2,
 551         DA830_GPIO4_3,
 552         DA830_AXR1_4,
 553         DA830_AXR1_5,
 554         DA830_AXR1_6,
 555         DA830_AXR1_7,
 556         DA830_AXR1_8,
 557         DA830_AXR1_9,
 558         DA830_EMA_D_0,
 559         DA830_EMA_D_1,
 560         DA830_EQEP1B,
 561         DA830_EPWM2B,
 562         DA830_EPWM2A,
 563         DA830_EPWM1B,
 564         DA830_EPWM1A,
 565         DA830_MMCSD_DAT_0,
 566         DA830_MMCSD_DAT_1,
 567         DA830_UHPI_HD_0,
 568         DA830_UHPI_HD_1,
 569         DA830_GPIO4_4,
 570         DA830_GPIO4_5,
 571         DA830_GPIO4_6,
 572         DA830_GPIO4_7,
 573         DA830_GPIO4_8,
 574         DA830_GPIO4_9,
 575         DA830_GPIO0_0,
 576         DA830_GPIO0_1,
 577         DA830_EMA_D_2,
 578         DA830_EMA_D_3,
 579         DA830_EMA_D_4,
 580         DA830_EMA_D_5,
 581         DA830_EMA_D_6,
 582         DA830_EMA_D_7,
 583         DA830_EMA_D_8,
 584         DA830_EMA_D_9,
 585         DA830_MMCSD_DAT_2,
 586         DA830_MMCSD_DAT_3,
 587         DA830_MMCSD_DAT_4,
 588         DA830_MMCSD_DAT_5,
 589         DA830_MMCSD_DAT_6,
 590         DA830_MMCSD_DAT_7,
 591         DA830_UHPI_HD_8,
 592         DA830_UHPI_HD_9,
 593         DA830_UHPI_HD_2,
 594         DA830_UHPI_HD_3,
 595         DA830_UHPI_HD_4,
 596         DA830_UHPI_HD_5,
 597         DA830_UHPI_HD_6,
 598         DA830_UHPI_HD_7,
 599         DA830_LCD_D_8,
 600         DA830_LCD_D_9,
 601         DA830_GPIO0_2,
 602         DA830_GPIO0_3,
 603         DA830_GPIO0_4,
 604         DA830_GPIO0_5,
 605         DA830_GPIO0_6,
 606         DA830_GPIO0_7,
 607         DA830_GPIO0_8,
 608         DA830_GPIO0_9,
 609         DA830_EMA_D_10,
 610         DA830_EMA_D_11,
 611         DA830_EMA_D_12,
 612         DA830_EMA_D_13,
 613         DA830_EMA_D_14,
 614         DA830_EMA_D_15,
 615         DA830_EMA_A_0,
 616         DA830_EMA_A_1,
 617         DA830_UHPI_HD_10,
 618         DA830_UHPI_HD_11,
 619         DA830_UHPI_HD_12,
 620         DA830_UHPI_HD_13,
 621         DA830_UHPI_HD_14,
 622         DA830_UHPI_HD_15,
 623         DA830_LCD_D_7,
 624         DA830_MMCSD_CLK,
 625         DA830_LCD_D_10,
 626         DA830_LCD_D_11,
 627         DA830_LCD_D_12,
 628         DA830_LCD_D_13,
 629         DA830_LCD_D_14,
 630         DA830_LCD_D_15,
 631         DA830_UHPI_HCNTL0,
 632         DA830_GPIO0_10,
 633         DA830_GPIO0_11,
 634         DA830_GPIO0_12,
 635         DA830_GPIO0_13,
 636         DA830_GPIO0_14,
 637         DA830_GPIO0_15,
 638         DA830_GPIO1_0,
 639         DA830_GPIO1_1,
 640         DA830_EMA_A_2,
 641         DA830_EMA_A_3,
 642         DA830_EMA_A_4,
 643         DA830_EMA_A_5,
 644         DA830_EMA_A_6,
 645         DA830_EMA_A_7,
 646         DA830_EMA_A_8,
 647         DA830_EMA_A_9,
 648         DA830_MMCSD_CMD,
 649         DA830_LCD_D_6,
 650         DA830_LCD_D_3,
 651         DA830_LCD_D_2,
 652         DA830_LCD_D_1,
 653         DA830_LCD_D_0,
 654         DA830_LCD_PCLK,
 655         DA830_LCD_HSYNC,
 656         DA830_UHPI_HCNTL1,
 657         DA830_GPIO1_2,
 658         DA830_GPIO1_3,
 659         DA830_GPIO1_4,
 660         DA830_GPIO1_5,
 661         DA830_GPIO1_6,
 662         DA830_GPIO1_7,
 663         DA830_GPIO1_8,
 664         DA830_GPIO1_9,
 665         DA830_EMA_A_10,
 666         DA830_EMA_A_11,
 667         DA830_EMA_A_12,
 668         DA830_EMA_BA_1,
 669         DA830_EMA_BA_0,
 670         DA830_EMA_CLK,
 671         DA830_EMA_SDCKE,
 672         DA830_NEMA_CAS,
 673         DA830_LCD_VSYNC,
 674         DA830_NLCD_AC_ENB_CS,
 675         DA830_LCD_MCLK,
 676         DA830_LCD_D_5,
 677         DA830_LCD_D_4,
 678         DA830_OBSCLK,
 679         DA830_NEMA_CS_4,
 680         DA830_UHPI_HHWIL,
 681         DA830_AHCLKR2,
 682         DA830_GPIO1_10,
 683         DA830_GPIO1_11,
 684         DA830_GPIO1_12,
 685         DA830_GPIO1_13,
 686         DA830_GPIO1_14,
 687         DA830_GPIO1_15,
 688         DA830_GPIO2_0,
 689         DA830_GPIO2_1,
 690         DA830_NEMA_RAS,
 691         DA830_NEMA_WE,
 692         DA830_NEMA_CS_0,
 693         DA830_NEMA_CS_2,
 694         DA830_NEMA_CS_3,
 695         DA830_NEMA_OE,
 696         DA830_NEMA_WE_DQM_1,
 697         DA830_NEMA_WE_DQM_0,
 698         DA830_NEMA_CS_5,
 699         DA830_UHPI_HRNW,
 700         DA830_NUHPI_HAS,
 701         DA830_NUHPI_HCS,
 702         DA830_NUHPI_HDS1,
 703         DA830_NUHPI_HDS2,
 704         DA830_NUHPI_HINT,
 705         DA830_AXR0_12,
 706         DA830_AMUTE2,
 707         DA830_AXR0_13,
 708         DA830_AXR0_14,
 709         DA830_AXR0_15,
 710         DA830_GPIO2_2,
 711         DA830_GPIO2_3,
 712         DA830_GPIO2_4,
 713         DA830_GPIO2_5,
 714         DA830_GPIO2_6,
 715         DA830_GPIO2_7,
 716         DA830_GPIO2_8,
 717         DA830_GPIO2_9,
 718         DA830_EMA_WAIT_0,
 719         DA830_NUHPI_HRDY,
 720         DA830_GPIO2_10,
 721 };
 722
 723 enum davinci_da850_index {
 724         /* UART0 function */
 725         DA850_NUART0_CTS,
 726         DA850_NUART0_RTS,
 727         DA850_UART0_RXD,
 728         DA850_UART0_TXD,
 729
 730         /* UART1 function */
 731         DA850_NUART1_CTS,
 732         DA850_NUART1_RTS,
 733         DA850_UART1_RXD,
 734         DA850_UART1_TXD,
 735
 736         /* UART2 function */
 737         DA850_NUART2_CTS,
 738         DA850_NUART2_RTS,
 739         DA850_UART2_RXD,
 740         DA850_UART2_TXD,
 741
 742         /* I2C1 function */
 743         DA850_I2C1_SCL,
 744         DA850_I2C1_SDA,
 745
 746         /* I2C0 function */
 747         DA850_I2C0_SDA,
 748         DA850_I2C0_SCL,
 749
 750         /* EMAC function */
 751         DA850_MII_TXEN,
 752         DA850_MII_TXCLK,
 753         DA850_MII_COL,
 754         DA850_MII_TXD_3,
 755         DA850_MII_TXD_2,
 756         DA850_MII_TXD_1,
 757         DA850_MII_TXD_0,
 758         DA850_MII_RXER,
 759         DA850_MII_CRS,
 760         DA850_MII_RXCLK,
 761         DA850_MII_RXDV,
 762         DA850_MII_RXD_3,
 763         DA850_MII_RXD_2,
 764         DA850_MII_RXD_1,
 765         DA850_MII_RXD_0,
 766         DA850_MDIO_CLK,
 767         DA850_MDIO_D,
 768
 769         /* McASP function */
 770         DA850_ACLKR,
 771         DA850_ACLKX,
 772         DA850_AFSR,
 773         DA850_AFSX,
 774         DA850_AHCLKR,
 775         DA850_AHCLKX,
 776         DA850_AMUTE,
 777         DA850_AXR_15,
 778         DA850_AXR_14,
 779         DA850_AXR_13,
 780         DA850_AXR_12,
 781         DA850_AXR_11,
 782         DA850_AXR_10,
 783         DA850_AXR_9,
 784         DA850_AXR_8,
 785         DA850_AXR_7,
 786         DA850_AXR_6,
 787         DA850_AXR_5,
 788         DA850_AXR_4,
 789         DA850_AXR_3,
 790         DA850_AXR_2,
 791         DA850_AXR_1,
 792         DA850_AXR_0,
 793
 794         /* LCD function */
 795         DA850_LCD_D_7,
 796         DA850_LCD_D_6,
 797         DA850_LCD_D_5,
 798         DA850_LCD_D_4,
 799         DA850_LCD_D_3,
 800         DA850_LCD_D_2,
 801         DA850_LCD_D_1,
 802         DA850_LCD_D_0,
 803         DA850_LCD_D_15,
 804         DA850_LCD_D_14,
 805         DA850_LCD_D_13,
 806         DA850_LCD_D_12,
 807         DA850_LCD_D_11,
 808         DA850_LCD_D_10,
 809         DA850_LCD_D_9,
 810         DA850_LCD_D_8,
 811         DA850_LCD_PCLK,
 812         DA850_LCD_HSYNC,
 813         DA850_LCD_VSYNC,
 814         DA850_NLCD_AC_ENB_CS,
 815
 816         /* MMC/SD0 function */
 817         DA850_MMCSD0_DAT_0,
 818         DA850_MMCSD0_DAT_1,
 819         DA850_MMCSD0_DAT_2,
 820         DA850_MMCSD0_DAT_3,
 821         DA850_MMCSD0_CLK,
 822         DA850_MMCSD0_CMD,
 823
 824         /* EMIF2.5/EMIFA function */
 825         DA850_EMA_D_7,
 826         DA850_EMA_D_6,
 827         DA850_EMA_D_5,
 828         DA850_EMA_D_4,
 829         DA850_EMA_D_3,
 830         DA850_EMA_D_2,
 831         DA850_EMA_D_1,
 832         DA850_EMA_D_0,
 833         DA850_EMA_A_1,
 834         DA850_EMA_A_2,
 835         DA850_NEMA_CS_3,
 836         DA850_NEMA_CS_4,
 837         DA850_NEMA_WE,
 838         DA850_NEMA_OE,
 839         DA850_EMA_D_15,
 840         DA850_EMA_D_14,
 841         DA850_EMA_D_13,
 842         DA850_EMA_D_12,
 843         DA850_EMA_D_11,
 844         DA850_EMA_D_10,
 845         DA850_EMA_D_9,
 846         DA850_EMA_D_8,
 847         DA850_EMA_A_0,
 848         DA850_EMA_A_3,
 849         DA850_EMA_A_4,
 850         DA850_EMA_A_5,
 851         DA850_EMA_A_6,
 852         DA850_EMA_A_7,
 853         DA850_EMA_A_8,
 854         DA850_EMA_A_9,
 855         DA850_EMA_A_10,
 856         DA850_EMA_A_11,
 857         DA850_EMA_A_12,
 858         DA850_EMA_A_13,
 859         DA850_EMA_A_14,
 860         DA850_EMA_A_15,
 861         DA850_EMA_A_16,
 862         DA850_EMA_A_17,
 863         DA850_EMA_A_18,
 864         DA850_EMA_A_19,
 865         DA850_EMA_A_20,
 866         DA850_EMA_A_21,
 867         DA850_EMA_A_22,
 868         DA850_EMA_A_23,
 869         DA850_EMA_BA_1,
 870         DA850_EMA_CLK,
 871         DA850_EMA_WAIT_1,
 872         DA850_NEMA_CS_2,
 873
 874         /* GPIO function */
 875         DA850_GPIO2_15,
 876         DA850_GPIO8_10,
 877         DA850_GPIO4_0,
 878         DA850_GPIO4_1,
 879 };
 880
 881 #ifdef CONFIG_DAVINCI_MUX
 882 /* setup pin muxing */
 883 extern int davinci_cfg_reg(unsigned long reg_cfg);
 884 #else
 885 /* boot loader does it all (no warnings from CONFIG_DAVINCI_MUX_WARNINGS) */
 886 static inline int davinci_cfg_reg(unsigned long reg_cfg) { return 0; }
 887 #endif
 888
 889 #endif /* __INC_MACH_MUX_H */