arch/arm/mach-davinci/devices-da8xx.c

   1 /*
   2  * DA8XX/OMAP L1XX platform device data
   3  *
   4  * Copyright (c) 2007-2009, MontaVista Software, Inc. <source@mvista.com>
   5  * Derived from code that was:
   6  *      Copyright (C) 2006 Komal Shah <komal_shah802003@yahoo.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  */
  13 #include <linux/init.h>
  14 #include <linux/platform_device.h>
  15 #include <linux/dma-contiguous.h>
  16 #include <linux/serial_8250.h>
  17 #include <linux/ahci_platform.h>
  18 #include <linux/clk.h>
  19 #include <linux/reboot.h>
  20
  21 #include <mach/cputype.h>
  22 #include <mach/common.h>
  23 #include <mach/time.h>
  24 #include <mach/da8xx.h>
  25 #include <mach/cpuidle.h>
  26 #include <mach/sram.h>
  27
  28 #include "clock.h"
  29 #include "asp.h"
  30
  31 #define DA8XX_TPCC_BASE                 0x01c00000
  32 #define DA8XX_TPTC0_BASE                0x01c08000
  33 #define DA8XX_TPTC1_BASE                0x01c08400
  34 #define DA8XX_WDOG_BASE                 0x01c21000 /* DA8XX_TIMER64P1_BASE */
  35 #define DA8XX_I2C0_BASE                 0x01c22000
  36 #define DA8XX_RTC_BASE                  0x01c23000
  37 #define DA8XX_PRUSS_MEM_BASE            0x01c30000
  38 #define DA8XX_MMCSD0_BASE               0x01c40000
  39 #define DA8XX_SPI0_BASE                 0x01c41000
  40 #define DA830_SPI1_BASE                 0x01e12000
  41 #define DA8XX_LCD_CNTRL_BASE            0x01e13000
  42 #define DA850_SATA_BASE                 0x01e18000
  43 #define DA850_MMCSD1_BASE               0x01e1b000
  44 #define DA8XX_EMAC_CPPI_PORT_BASE       0x01e20000
  45 #define DA8XX_EMAC_CPGMACSS_BASE        0x01e22000
  46 #define DA8XX_EMAC_CPGMAC_BASE          0x01e23000
  47 #define DA8XX_EMAC_MDIO_BASE            0x01e24000
  48 #define DA8XX_I2C1_BASE                 0x01e28000
  49 #define DA850_TPCC1_BASE                0x01e30000
  50 #define DA850_TPTC2_BASE                0x01e38000
  51 #define DA850_SPI1_BASE                 0x01f0e000
  52 #define DA8XX_DDR2_CTL_BASE             0xb0000000
  53
  54 #define DA8XX_EMAC_CTRL_REG_OFFSET      0x3000
  55 #define DA8XX_EMAC_MOD_REG_OFFSET       0x2000
  56 #define DA8XX_EMAC_RAM_OFFSET           0x0000
  57 #define DA8XX_EMAC_CTRL_RAM_SIZE        SZ_8K
  58
  59 #define DA8XX_DMA_SPI0_RX       EDMA_CTLR_CHAN(0, 14)
  60 #define DA8XX_DMA_SPI0_TX       EDMA_CTLR_CHAN(0, 15)
  61 #define DA8XX_DMA_MMCSD0_RX     EDMA_CTLR_CHAN(0, 16)
  62 #define DA8XX_DMA_MMCSD0_TX     EDMA_CTLR_CHAN(0, 17)
  63 #define DA8XX_DMA_SPI1_RX       EDMA_CTLR_CHAN(0, 18)
  64 #define DA8XX_DMA_SPI1_TX       EDMA_CTLR_CHAN(0, 19)
  65 #define DA850_DMA_MMCSD1_RX     EDMA_CTLR_CHAN(1, 28)
  66 #define DA850_DMA_MMCSD1_TX     EDMA_CTLR_CHAN(1, 29)
  67
  68 void __iomem *da8xx_syscfg0_base;
  69 void __iomem *da8xx_syscfg1_base;
  70
  71 static struct plat_serial8250_port da8xx_serial0_pdata[] = {
  72         {
  73                 .mapbase        = DA8XX_UART0_BASE,
  74                 .irq            = IRQ_DA8XX_UARTINT0,
  75                 .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
  76                                         UPF_IOREMAP,
  77                 .iotype         = UPIO_MEM,
  78                 .regshift       = 2,
  79         },
  80         {
  81                 .flags  = 0,
  82         }
  83 };
  84 static struct plat_serial8250_port da8xx_serial1_pdata[] = {
  85         {
  86                 .mapbase        = DA8XX_UART1_BASE,
  87                 .irq            = IRQ_DA8XX_UARTINT1,
  88                 .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
  89                                         UPF_IOREMAP,
  90                 .iotype         = UPIO_MEM,
  91                 .regshift       = 2,
  92         },
  93         {
  94                 .flags  = 0,
  95         }
  96 };
  97 static struct plat_serial8250_port da8xx_serial2_pdata[] = {
  98         {
  99                 .mapbase        = DA8XX_UART2_BASE,
 100                 .irq            = IRQ_DA8XX_UARTINT2,
 101                 .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
 102                                         UPF_IOREMAP,
 103                 .iotype         = UPIO_MEM,
 104                 .regshift       = 2,
 105         },
 106         {
 107                 .flags  = 0,
 108         }
 109 };
 110
 111 struct platform_device da8xx_serial_device[] = {
 112         {
 113                 .name   = "serial8250",
 114                 .id     = PLAT8250_DEV_PLATFORM,
 115                 .dev    = {
 116                         .platform_data  = da8xx_serial0_pdata,
 117                 }
 118         },
 119         {
 120                 .name   = "serial8250",
 121                 .id     = PLAT8250_DEV_PLATFORM1,
 122                 .dev    = {
 123                         .platform_data  = da8xx_serial1_pdata,
 124                 }
 125         },
 126         {
 127                 .name   = "serial8250",
 128                 .id     = PLAT8250_DEV_PLATFORM2,
 129                 .dev    = {
 130                         .platform_data  = da8xx_serial2_pdata,
 131                 }
 132         },
 133         {
 134         }
 135 };
 136
 137 static s8 da8xx_queue_priority_mapping[][2] = {
 138         /* {event queue no, Priority} */
 139         {0, 3},
 140         {1, 7},
 141         {-1, -1}
 142 };
 143
 144 static s8 da850_queue_priority_mapping[][2] = {
 145         /* {event queue no, Priority} */
 146         {0, 3},
 147         {-1, -1}
 148 };
 149
 150 static struct edma_soc_info da830_edma_cc0_info = {
 151         .queue_priority_mapping = da8xx_queue_priority_mapping,
 152         .default_queue          = EVENTQ_1,
 153 };
 154
 155 static struct edma_soc_info *da830_edma_info[EDMA_MAX_CC] = {
 156         &da830_edma_cc0_info,
 157 };
 158
 159 static struct edma_soc_info da850_edma_cc_info[] = {
 160         {
 161                 .queue_priority_mapping = da8xx_queue_priority_mapping,
 162                 .default_queue          = EVENTQ_1,
 163         },
 164         {
 165                 .queue_priority_mapping = da850_queue_priority_mapping,
 166                 .default_queue          = EVENTQ_0,
 167         },
 168 };
 169
 170 static struct edma_soc_info *da850_edma_info[EDMA_MAX_CC] = {
 171         &da850_edma_cc_info[0],
 172         &da850_edma_cc_info[1],
 173 };
 174
 175 static struct resource da830_edma_resources[] = {
 176         {
 177                 .name   = "edma_cc0",
 178                 .start  = DA8XX_TPCC_BASE,
 179                 .end    = DA8XX_TPCC_BASE + SZ_32K - 1,
 180                 .flags  = IORESOURCE_MEM,
 181         },
 182         {
 183                 .name   = "edma_tc0",
 184                 .start  = DA8XX_TPTC0_BASE,
 185                 .end    = DA8XX_TPTC0_BASE + SZ_1K - 1,
 186                 .flags  = IORESOURCE_MEM,
 187         },
 188         {
 189                 .name   = "edma_tc1",
 190                 .start  = DA8XX_TPTC1_BASE,
 191                 .end    = DA8XX_TPTC1_BASE + SZ_1K - 1,
 192                 .flags  = IORESOURCE_MEM,
 193         },
 194         {
 195                 .name   = "edma0",
 196                 .start  = IRQ_DA8XX_CCINT0,
 197                 .flags  = IORESOURCE_IRQ,
 198         },
 199         {
 200                 .name   = "edma0_err",
 201                 .start  = IRQ_DA8XX_CCERRINT,
 202                 .flags  = IORESOURCE_IRQ,
 203         },
 204 };
 205
 206 static struct resource da850_edma_resources[] = {
 207         {
 208                 .name   = "edma_cc0",
 209                 .start  = DA8XX_TPCC_BASE,
 210                 .end    = DA8XX_TPCC_BASE + SZ_32K - 1,
 211                 .flags  = IORESOURCE_MEM,
 212         },
 213         {
 214                 .name   = "edma_tc0",
 215                 .start  = DA8XX_TPTC0_BASE,
 216                 .end    = DA8XX_TPTC0_BASE + SZ_1K - 1,
 217                 .flags  = IORESOURCE_MEM,
 218         },
 219         {
 220                 .name   = "edma_tc1",
 221                 .start  = DA8XX_TPTC1_BASE,
 222                 .end    = DA8XX_TPTC1_BASE + SZ_1K - 1,
 223                 .flags  = IORESOURCE_MEM,
 224         },
 225         {
 226                 .name   = "edma_cc1",
 227                 .start  = DA850_TPCC1_BASE,
 228                 .end    = DA850_TPCC1_BASE + SZ_32K - 1,
 229                 .flags  = IORESOURCE_MEM,
 230         },
 231         {
 232                 .name   = "edma_tc2",
 233                 .start  = DA850_TPTC2_BASE,
 234                 .end    = DA850_TPTC2_BASE + SZ_1K - 1,
 235                 .flags  = IORESOURCE_MEM,
 236         },
 237         {
 238                 .name   = "edma0",
 239                 .start  = IRQ_DA8XX_CCINT0,
 240                 .flags  = IORESOURCE_IRQ,
 241         },
 242         {
 243                 .name   = "edma0_err",
 244                 .start  = IRQ_DA8XX_CCERRINT,
 245                 .flags  = IORESOURCE_IRQ,
 246         },
 247         {
 248                 .name   = "edma1",
 249                 .start  = IRQ_DA850_CCINT1,
 250                 .flags  = IORESOURCE_IRQ,
 251         },
 252         {
 253                 .name   = "edma1_err",
 254                 .start  = IRQ_DA850_CCERRINT1,
 255                 .flags  = IORESOURCE_IRQ,
 256         },
 257 };
 258
 259 static struct platform_device da830_edma_device = {
 260         .name           = "edma",
 261         .id             = -1,
 262         .dev = {
 263                 .platform_data = da830_edma_info,
 264         },
 265         .num_resources  = ARRAY_SIZE(da830_edma_resources),
 266         .resource       = da830_edma_resources,
 267 };
 268
 269 static struct platform_device da850_edma_device = {
 270         .name           = "edma",
 271         .id             = -1,
 272         .dev = {
 273                 .platform_data = da850_edma_info,
 274         },
 275         .num_resources  = ARRAY_SIZE(da850_edma_resources),
 276         .resource       = da850_edma_resources,
 277 };
 278
 279 int __init da830_register_edma(struct edma_rsv_info *rsv)
 280 {
 281         da830_edma_cc0_info.rsv = rsv;
 282
 283         return platform_device_register(&da830_edma_device);
 284 }
 285
 286 int __init da850_register_edma(struct edma_rsv_info *rsv[2])
 287 {
 288         if (rsv) {
 289                 da850_edma_cc_info[0].rsv = rsv[0];
 290                 da850_edma_cc_info[1].rsv = rsv[1];
 291         }
 292
 293         return platform_device_register(&da850_edma_device);
 294 }
 295
 296 static struct resource da8xx_i2c_resources0[] = {
 297         {
 298                 .start  = DA8XX_I2C0_BASE,
 299                 .end    = DA8XX_I2C0_BASE + SZ_4K - 1,
 300                 .flags  = IORESOURCE_MEM,
 301         },
 302         {
 303                 .start  = IRQ_DA8XX_I2CINT0,
 304                 .end    = IRQ_DA8XX_I2CINT0,
 305                 .flags  = IORESOURCE_IRQ,
 306         },
 307 };
 308
 309 static struct platform_device da8xx_i2c_device0 = {
 310         .name           = "i2c_davinci",
 311         .id             = 1,
 312         .num_resources  = ARRAY_SIZE(da8xx_i2c_resources0),
 313         .resource       = da8xx_i2c_resources0,
 314 };
 315
 316 static struct resource da8xx_i2c_resources1[] = {
 317         {
 318                 .start  = DA8XX_I2C1_BASE,
 319                 .end    = DA8XX_I2C1_BASE + SZ_4K - 1,
 320                 .flags  = IORESOURCE_MEM,
 321         },
 322         {
 323                 .start  = IRQ_DA8XX_I2CINT1,
 324                 .end    = IRQ_DA8XX_I2CINT1,
 325                 .flags  = IORESOURCE_IRQ,
 326         },
 327 };
 328
 329 static struct platform_device da8xx_i2c_device1 = {
 330         .name           = "i2c_davinci",
 331         .id             = 2,
 332         .num_resources  = ARRAY_SIZE(da8xx_i2c_resources1),
 333         .resource       = da8xx_i2c_resources1,
 334 };
 335
 336 int __init da8xx_register_i2c(int instance,
 337                 struct davinci_i2c_platform_data *pdata)
 338 {
 339         struct platform_device *pdev;
 340
 341         if (instance == 0)
 342                 pdev = &da8xx_i2c_device0;
 343         else if (instance == 1)
 344                 pdev = &da8xx_i2c_device1;
 345         else
 346                 return -EINVAL;
 347
 348         pdev->dev.platform_data = pdata;
 349         return platform_device_register(pdev);
 350 }
 351
 352 static struct resource da8xx_watchdog_resources[] = {
 353         {
 354                 .start  = DA8XX_WDOG_BASE,
 355                 .end    = DA8XX_WDOG_BASE + SZ_4K - 1,
 356                 .flags  = IORESOURCE_MEM,
 357         },
 358 };
 359
 360 static struct platform_device da8xx_wdt_device = {
 361         .name           = "davinci-wdt",
 362         .id             = -1,
 363         .num_resources  = ARRAY_SIZE(da8xx_watchdog_resources),
 364         .resource       = da8xx_watchdog_resources,
 365 };
 366
 367 void da8xx_restart(enum reboot_mode mode, const char *cmd)
 368 {
 369         struct device *dev;
 370
 371         dev = bus_find_device_by_name(&platform_bus_type, NULL, "davinci-wdt");
 372         if (!dev) {
 373                 pr_err("%s: failed to find watchdog device\n", __func__);
 374                 return;
 375         }
 376
 377         davinci_watchdog_reset(to_platform_device(dev));
 378 }
 379
 380 int __init da8xx_register_watchdog(void)
 381 {
 382         return platform_device_register(&da8xx_wdt_device);
 383 }
 384
 385 static struct resource da8xx_emac_resources[] = {
 386         {
 387                 .start  = DA8XX_EMAC_CPPI_PORT_BASE,
 388                 .end    = DA8XX_EMAC_CPPI_PORT_BASE + SZ_16K - 1,
 389                 .flags  = IORESOURCE_MEM,
 390         },
 391         {
 392                 .start  = IRQ_DA8XX_C0_RX_THRESH_PULSE,
 393                 .end    = IRQ_DA8XX_C0_RX_THRESH_PULSE,
 394                 .flags  = IORESOURCE_IRQ,
 395         },
 396         {
 397                 .start  = IRQ_DA8XX_C0_RX_PULSE,
 398                 .end    = IRQ_DA8XX_C0_RX_PULSE,
 399                 .flags  = IORESOURCE_IRQ,
 400         },
 401         {
 402                 .start  = IRQ_DA8XX_C0_TX_PULSE,
 403                 .end    = IRQ_DA8XX_C0_TX_PULSE,
 404                 .flags  = IORESOURCE_IRQ,
 405         },
 406         {
 407                 .start  = IRQ_DA8XX_C0_MISC_PULSE,
 408                 .end    = IRQ_DA8XX_C0_MISC_PULSE,
 409                 .flags  = IORESOURCE_IRQ,
 410         },
 411 };
 412
 413 struct emac_platform_data da8xx_emac_pdata = {
 414         .ctrl_reg_offset        = DA8XX_EMAC_CTRL_REG_OFFSET,
 415         .ctrl_mod_reg_offset    = DA8XX_EMAC_MOD_REG_OFFSET,
 416         .ctrl_ram_offset        = DA8XX_EMAC_RAM_OFFSET,
 417         .ctrl_ram_size          = DA8XX_EMAC_CTRL_RAM_SIZE,
 418         .version                = EMAC_VERSION_2,
 419 };
 420
 421 static struct platform_device da8xx_emac_device = {
 422         .name           = "davinci_emac",
 423         .id             = 1,
 424         .dev = {
 425                 .platform_data  = &da8xx_emac_pdata,
 426         },
 427         .num_resources  = ARRAY_SIZE(da8xx_emac_resources),
 428         .resource       = da8xx_emac_resources,
 429 };
 430
 431 static struct resource da8xx_mdio_resources[] = {
 432         {
 433                 .start  = DA8XX_EMAC_MDIO_BASE,
 434                 .end    = DA8XX_EMAC_MDIO_BASE + SZ_4K - 1,
 435                 .flags  = IORESOURCE_MEM,
 436         },
 437 };
 438
 439 static struct platform_device da8xx_mdio_device = {
 440         .name           = "davinci_mdio",
 441         .id             = 0,
 442         .num_resources  = ARRAY_SIZE(da8xx_mdio_resources),
 443         .resource       = da8xx_mdio_resources,
 444 };
 445
 446 int __init da8xx_register_emac(void)
 447 {
 448         int ret;
 449
 450         ret = platform_device_register(&da8xx_mdio_device);
 451         if (ret < 0)
 452                 return ret;
 453
 454         return platform_device_register(&da8xx_emac_device);
 455 }
 456
 457 static struct resource da830_mcasp1_resources[] = {
 458         {
 459                 .name   = "mpu",
 460                 .start  = DAVINCI_DA830_MCASP1_REG_BASE,
 461                 .end    = DAVINCI_DA830_MCASP1_REG_BASE + (SZ_1K * 12) - 1,
 462                 .flags  = IORESOURCE_MEM,
 463         },
 464         /* TX event */
 465         {
 466                 .start  = DAVINCI_DA830_DMA_MCASP1_AXEVT,
 467                 .end    = DAVINCI_DA830_DMA_MCASP1_AXEVT,
 468                 .flags  = IORESOURCE_DMA,
 469         },
 470         /* RX event */
 471         {
 472                 .start  = DAVINCI_DA830_DMA_MCASP1_AREVT,
 473                 .end    = DAVINCI_DA830_DMA_MCASP1_AREVT,
 474                 .flags  = IORESOURCE_DMA,
 475         },
 476 };
 477
 478 static struct platform_device da830_mcasp1_device = {
 479         .name           = "davinci-mcasp",
 480         .id             = 1,
 481         .num_resources  = ARRAY_SIZE(da830_mcasp1_resources),
 482         .resource       = da830_mcasp1_resources,
 483 };
 484
 485 static struct resource da850_mcasp_resources[] = {
 486         {
 487                 .name   = "mpu",
 488                 .start  = DAVINCI_DA8XX_MCASP0_REG_BASE,
 489                 .end    = DAVINCI_DA8XX_MCASP0_REG_BASE + (SZ_1K * 12) - 1,
 490                 .flags  = IORESOURCE_MEM,
 491         },
 492         /* TX event */
 493         {
 494                 .start  = DAVINCI_DA8XX_DMA_MCASP0_AXEVT,
 495                 .end    = DAVINCI_DA8XX_DMA_MCASP0_AXEVT,
 496                 .flags  = IORESOURCE_DMA,
 497         },
 498         /* RX event */
 499         {
 500                 .start  = DAVINCI_DA8XX_DMA_MCASP0_AREVT,
 501                 .end    = DAVINCI_DA8XX_DMA_MCASP0_AREVT,
 502                 .flags  = IORESOURCE_DMA,
 503         },
 504 };
 505
 506 static struct platform_device da850_mcasp_device = {
 507         .name           = "davinci-mcasp",
 508         .id             = 0,
 509         .num_resources  = ARRAY_SIZE(da850_mcasp_resources),
 510         .resource       = da850_mcasp_resources,
 511 };
 512
 513 void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata)
 514 {
 515         /* DA830/OMAP-L137 has 3 instances of McASP */
 516         if (cpu_is_davinci_da830() && id == 1) {
 517                 da830_mcasp1_device.dev.platform_data = pdata;
 518                 platform_device_register(&da830_mcasp1_device);
 519         } else if (cpu_is_davinci_da850()) {
 520                 da850_mcasp_device.dev.platform_data = pdata;
 521                 platform_device_register(&da850_mcasp_device);
 522         }
 523 }
 524
 525 static struct resource da8xx_pruss_resources[] = {
 526         {
 527                 .start  = DA8XX_PRUSS_MEM_BASE,
 528                 .end    = DA8XX_PRUSS_MEM_BASE + 0xFFFF,
 529                 .flags  = IORESOURCE_MEM,
 530         },
 531         {
 532                 .start  = IRQ_DA8XX_EVTOUT0,
 533                 .end    = IRQ_DA8XX_EVTOUT0,
 534                 .flags  = IORESOURCE_IRQ,
 535         },
 536         {
 537                 .start  = IRQ_DA8XX_EVTOUT1,
 538                 .end    = IRQ_DA8XX_EVTOUT1,
 539                 .flags  = IORESOURCE_IRQ,
 540         },
 541         {
 542                 .start  = IRQ_DA8XX_EVTOUT2,
 543                 .end    = IRQ_DA8XX_EVTOUT2,
 544                 .flags  = IORESOURCE_IRQ,
 545         },
 546         {
 547                 .start  = IRQ_DA8XX_EVTOUT3,
 548                 .end    = IRQ_DA8XX_EVTOUT3,
 549                 .flags  = IORESOURCE_IRQ,
 550         },
 551         {
 552                 .start  = IRQ_DA8XX_EVTOUT4,
 553                 .end    = IRQ_DA8XX_EVTOUT4,
 554                 .flags  = IORESOURCE_IRQ,
 555         },
 556         {
 557                 .start  = IRQ_DA8XX_EVTOUT5,
 558                 .end    = IRQ_DA8XX_EVTOUT5,
 559                 .flags  = IORESOURCE_IRQ,
 560         },
 561         {
 562                 .start  = IRQ_DA8XX_EVTOUT6,
 563                 .end    = IRQ_DA8XX_EVTOUT6,
 564                 .flags  = IORESOURCE_IRQ,
 565         },
 566         {
 567                 .start  = IRQ_DA8XX_EVTOUT7,
 568                 .end    = IRQ_DA8XX_EVTOUT7,
 569                 .flags  = IORESOURCE_IRQ,
 570         },
 571 };
 572
 573 static struct uio_pruss_pdata da8xx_uio_pruss_pdata = {
 574         .pintc_base     = 0x4000,
 575 };
 576
 577 static struct platform_device da8xx_uio_pruss_dev = {
 578         .name           = "pruss_uio",
 579         .id             = -1,
 580         .num_resources  = ARRAY_SIZE(da8xx_pruss_resources),
 581         .resource       = da8xx_pruss_resources,
 582         .dev            = {
 583                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 584                 .platform_data          = &da8xx_uio_pruss_pdata,
 585         }
 586 };
 587
 588 int __init da8xx_register_uio_pruss(void)
 589 {
 590         da8xx_uio_pruss_pdata.sram_pool = sram_get_gen_pool();
 591         return platform_device_register(&da8xx_uio_pruss_dev);
 592 }
 593
 594 static struct lcd_ctrl_config lcd_cfg = {
 595         .panel_shade            = COLOR_ACTIVE,
 596         .bpp                    = 16,
 597 };
 598
 599 struct da8xx_lcdc_platform_data sharp_lcd035q3dg01_pdata = {
 600         .manu_name              = "sharp",
 601         .controller_data        = &lcd_cfg,
 602         .type                   = "Sharp_LCD035Q3DG01",
 603 };
 604
 605 struct da8xx_lcdc_platform_data sharp_lk043t1dg01_pdata = {
 606         .manu_name              = "sharp",
 607         .controller_data        = &lcd_cfg,
 608         .type                   = "Sharp_LK043T1DG01",
 609 };
 610
 611 static struct resource da8xx_lcdc_resources[] = {
 612         [0] = { /* registers */
 613                 .start  = DA8XX_LCD_CNTRL_BASE,
 614                 .end    = DA8XX_LCD_CNTRL_BASE + SZ_4K - 1,
 615                 .flags  = IORESOURCE_MEM,
 616         },
 617         [1] = { /* interrupt */
 618                 .start  = IRQ_DA8XX_LCDINT,
 619                 .end    = IRQ_DA8XX_LCDINT,
 620                 .flags  = IORESOURCE_IRQ,
 621         },
 622 };
 623
 624 static struct platform_device da8xx_lcdc_device = {
 625         .name           = "da8xx_lcdc",
 626         .id             = 0,
 627         .num_resources  = ARRAY_SIZE(da8xx_lcdc_resources),
 628         .resource       = da8xx_lcdc_resources,
 629 };
 630
 631 int __init da8xx_register_lcdc(struct da8xx_lcdc_platform_data *pdata)
 632 {
 633         da8xx_lcdc_device.dev.platform_data = pdata;
 634         return platform_device_register(&da8xx_lcdc_device);
 635 }
 636
 637 static struct resource da8xx_gpio_resources[] = {
 638         { /* registers */
 639                 .start  = DA8XX_GPIO_BASE,
 640                 .end    = DA8XX_GPIO_BASE + SZ_4K - 1,
 641                 .flags  = IORESOURCE_MEM,
 642         },
 643         { /* interrupt */
 644                 .start  = IRQ_DA8XX_GPIO0,
 645                 .end    = IRQ_DA8XX_GPIO8,
 646                 .flags  = IORESOURCE_IRQ,
 647         },
 648 };
 649
 650 static struct platform_device da8xx_gpio_device = {
 651         .name           = "davinci_gpio",
 652         .id             = -1,
 653         .num_resources  = ARRAY_SIZE(da8xx_gpio_resources),
 654         .resource       = da8xx_gpio_resources,
 655 };
 656
 657 int __init da8xx_register_gpio(void *pdata)
 658 {
 659         da8xx_gpio_device.dev.platform_data = pdata;
 660         return platform_device_register(&da8xx_gpio_device);
 661 }
 662
 663 static struct resource da8xx_mmcsd0_resources[] = {
 664         {               /* registers */
 665                 .start  = DA8XX_MMCSD0_BASE,
 666                 .end    = DA8XX_MMCSD0_BASE + SZ_4K - 1,
 667                 .flags  = IORESOURCE_MEM,
 668         },
 669         {               /* interrupt */
 670                 .start  = IRQ_DA8XX_MMCSDINT0,
 671                 .end    = IRQ_DA8XX_MMCSDINT0,
 672                 .flags  = IORESOURCE_IRQ,
 673         },
 674         {               /* DMA RX */
 675                 .start  = DA8XX_DMA_MMCSD0_RX,
 676                 .end    = DA8XX_DMA_MMCSD0_RX,
 677                 .flags  = IORESOURCE_DMA,
 678         },
 679         {               /* DMA TX */
 680                 .start  = DA8XX_DMA_MMCSD0_TX,
 681                 .end    = DA8XX_DMA_MMCSD0_TX,
 682                 .flags  = IORESOURCE_DMA,
 683         },
 684 };
 685
 686 static struct platform_device da8xx_mmcsd0_device = {
 687         .name           = "da830-mmc",
 688         .id             = 0,
 689         .num_resources  = ARRAY_SIZE(da8xx_mmcsd0_resources),
 690         .resource       = da8xx_mmcsd0_resources,
 691 };
 692
 693 int __init da8xx_register_mmcsd0(struct davinci_mmc_config *config)
 694 {
 695         da8xx_mmcsd0_device.dev.platform_data = config;
 696         return platform_device_register(&da8xx_mmcsd0_device);
 697 }
 698
 699 #ifdef CONFIG_ARCH_DAVINCI_DA850
 700 static struct resource da850_mmcsd1_resources[] = {
 701         {               /* registers */
 702                 .start  = DA850_MMCSD1_BASE,
 703                 .end    = DA850_MMCSD1_BASE + SZ_4K - 1,
 704                 .flags  = IORESOURCE_MEM,
 705         },
 706         {               /* interrupt */
 707                 .start  = IRQ_DA850_MMCSDINT0_1,
 708                 .end    = IRQ_DA850_MMCSDINT0_1,
 709                 .flags  = IORESOURCE_IRQ,
 710         },
 711         {               /* DMA RX */
 712                 .start  = DA850_DMA_MMCSD1_RX,
 713                 .end    = DA850_DMA_MMCSD1_RX,
 714                 .flags  = IORESOURCE_DMA,
 715         },
 716         {               /* DMA TX */
 717                 .start  = DA850_DMA_MMCSD1_TX,
 718                 .end    = DA850_DMA_MMCSD1_TX,
 719                 .flags  = IORESOURCE_DMA,
 720         },
 721 };
 722
 723 static struct platform_device da850_mmcsd1_device = {
 724         .name           = "da830-mmc",
 725         .id             = 1,
 726         .num_resources  = ARRAY_SIZE(da850_mmcsd1_resources),
 727         .resource       = da850_mmcsd1_resources,
 728 };
 729
 730 int __init da850_register_mmcsd1(struct davinci_mmc_config *config)
 731 {
 732         da850_mmcsd1_device.dev.platform_data = config;
 733         return platform_device_register(&da850_mmcsd1_device);
 734 }
 735 #endif
 736
 737 static struct resource da8xx_rproc_resources[] = {
 738         { /* DSP boot address */
 739                 .start          = DA8XX_SYSCFG0_BASE + DA8XX_HOST1CFG_REG,
 740                 .end            = DA8XX_SYSCFG0_BASE + DA8XX_HOST1CFG_REG + 3,
 741                 .flags          = IORESOURCE_MEM,
 742         },
 743         { /* DSP interrupt registers */
 744                 .start          = DA8XX_SYSCFG0_BASE + DA8XX_CHIPSIG_REG,
 745                 .end            = DA8XX_SYSCFG0_BASE + DA8XX_CHIPSIG_REG + 7,
 746                 .flags          = IORESOURCE_MEM,
 747         },
 748         { /* dsp irq */
 749                 .start          = IRQ_DA8XX_CHIPINT0,
 750                 .end            = IRQ_DA8XX_CHIPINT0,
 751                 .flags          = IORESOURCE_IRQ,
 752         },
 753 };
 754
 755 static struct platform_device da8xx_dsp = {
 756         .name   = "davinci-rproc",
 757         .dev    = {
 758                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 759         },
 760         .num_resources  = ARRAY_SIZE(da8xx_rproc_resources),
 761         .resource       = da8xx_rproc_resources,
 762 };
 763
 764 #if IS_ENABLED(CONFIG_DA8XX_REMOTEPROC)
 765
 766 static phys_addr_t rproc_base __initdata;
 767 static unsigned long rproc_size __initdata;
 768
 769 static int __init early_rproc_mem(char *p)
 770 {
 771         char *endp;
 772
 773         if (p == NULL)
 774                 return 0;
 775
 776         rproc_size = memparse(p, &endp);
 777         if (*endp == '@')
 778                 rproc_base = memparse(endp + 1, NULL);
 779
 780         return 0;
 781 }
 782 early_param("rproc_mem", early_rproc_mem);
 783
 784 void __init da8xx_rproc_reserve_cma(void)
 785 {
 786         int ret;
 787
 788         if (!rproc_base || !rproc_size) {
 789                 pr_err("%s: 'rproc_mem=nn@address' badly specified\n"
 790                        "    'nn' and 'address' must both be non-zero\n",
 791                        __func__);
 792
 793                 return;
 794         }
 795
 796         pr_info("%s: reserving 0x%lx @ 0x%lx...\n",
 797                 __func__, rproc_size, (unsigned long)rproc_base);
 798
 799         ret = dma_declare_contiguous(&da8xx_dsp.dev, rproc_size, rproc_base, 0);
 800         if (ret)
 801                 pr_err("%s: dma_declare_contiguous failed %d\n", __func__, ret);
 802 }
 803
 804 #else
 805
 806 void __init da8xx_rproc_reserve_cma(void)
 807 {
 808 }
 809
 810 #endif
 811
 812 int __init da8xx_register_rproc(void)
 813 {
 814         int ret;
 815
 816         ret = platform_device_register(&da8xx_dsp);
 817         if (ret)
 818                 pr_err("%s: can't register DSP device: %d\n", __func__, ret);
 819
 820         return ret;
 821 };
 822
 823 static struct resource da8xx_rtc_resources[] = {
 824         {
 825                 .start          = DA8XX_RTC_BASE,
 826                 .end            = DA8XX_RTC_BASE + SZ_4K - 1,
 827                 .flags          = IORESOURCE_MEM,
 828         },
 829         { /* timer irq */
 830                 .start          = IRQ_DA8XX_RTC,
 831                 .end            = IRQ_DA8XX_RTC,
 832                 .flags          = IORESOURCE_IRQ,
 833         },
 834         { /* alarm irq */
 835                 .start          = IRQ_DA8XX_RTC,
 836                 .end            = IRQ_DA8XX_RTC,
 837                 .flags          = IORESOURCE_IRQ,
 838         },
 839 };
 840
 841 static struct platform_device da8xx_rtc_device = {
 842         .name           = "da830-rtc",
 843         .id             = -1,
 844         .num_resources  = ARRAY_SIZE(da8xx_rtc_resources),
 845         .resource       = da8xx_rtc_resources,
 846 };
 847
 848 int da8xx_register_rtc(void)
 849 {
 850         return platform_device_register(&da8xx_rtc_device);
 851 }
 852
 853 static void __iomem *da8xx_ddr2_ctlr_base;
 854 void __iomem * __init da8xx_get_mem_ctlr(void)
 855 {
 856         if (da8xx_ddr2_ctlr_base)
 857                 return da8xx_ddr2_ctlr_base;
 858
 859         da8xx_ddr2_ctlr_base = ioremap(DA8XX_DDR2_CTL_BASE, SZ_32K);
 860         if (!da8xx_ddr2_ctlr_base)
 861                 pr_warn("%s: Unable to map DDR2 controller", __func__);
 862
 863         return da8xx_ddr2_ctlr_base;
 864 }
 865
 866 static struct resource da8xx_cpuidle_resources[] = {
 867         {
 868                 .start          = DA8XX_DDR2_CTL_BASE,
 869                 .end            = DA8XX_DDR2_CTL_BASE + SZ_32K - 1,
 870                 .flags          = IORESOURCE_MEM,
 871         },
 872 };
 873
 874 /* DA8XX devices support DDR2 power down */
 875 static struct davinci_cpuidle_config da8xx_cpuidle_pdata = {
 876         .ddr2_pdown     = 1,
 877 };
 878
 879
 880 static struct platform_device da8xx_cpuidle_device = {
 881         .name                   = "cpuidle-davinci",
 882         .num_resources          = ARRAY_SIZE(da8xx_cpuidle_resources),
 883         .resource               = da8xx_cpuidle_resources,
 884         .dev = {
 885                 .platform_data  = &da8xx_cpuidle_pdata,
 886         },
 887 };
 888
 889 int __init da8xx_register_cpuidle(void)
 890 {
 891         da8xx_cpuidle_pdata.ddr2_ctlr_base = da8xx_get_mem_ctlr();
 892
 893         return platform_device_register(&da8xx_cpuidle_device);
 894 }
 895
 896 static struct resource da8xx_spi0_resources[] = {
 897         [0] = {
 898                 .start  = DA8XX_SPI0_BASE,
 899                 .end    = DA8XX_SPI0_BASE + SZ_4K - 1,
 900                 .flags  = IORESOURCE_MEM,
 901         },
 902         [1] = {
 903                 .start  = IRQ_DA8XX_SPINT0,
 904                 .end    = IRQ_DA8XX_SPINT0,
 905                 .flags  = IORESOURCE_IRQ,
 906         },
 907         [2] = {
 908                 .start  = DA8XX_DMA_SPI0_RX,
 909                 .end    = DA8XX_DMA_SPI0_RX,
 910                 .flags  = IORESOURCE_DMA,
 911         },
 912         [3] = {
 913                 .start  = DA8XX_DMA_SPI0_TX,
 914                 .end    = DA8XX_DMA_SPI0_TX,
 915                 .flags  = IORESOURCE_DMA,
 916         },
 917 };
 918
 919 static struct resource da8xx_spi1_resources[] = {
 920         [0] = {
 921                 .start  = DA830_SPI1_BASE,
 922                 .end    = DA830_SPI1_BASE + SZ_4K - 1,
 923                 .flags  = IORESOURCE_MEM,
 924         },
 925         [1] = {
 926                 .start  = IRQ_DA8XX_SPINT1,
 927                 .end    = IRQ_DA8XX_SPINT1,
 928                 .flags  = IORESOURCE_IRQ,
 929         },
 930         [2] = {
 931                 .start  = DA8XX_DMA_SPI1_RX,
 932                 .end    = DA8XX_DMA_SPI1_RX,
 933                 .flags  = IORESOURCE_DMA,
 934         },
 935         [3] = {
 936                 .start  = DA8XX_DMA_SPI1_TX,
 937                 .end    = DA8XX_DMA_SPI1_TX,
 938                 .flags  = IORESOURCE_DMA,
 939         },
 940 };
 941
 942 static struct davinci_spi_platform_data da8xx_spi_pdata[] = {
 943         [0] = {
 944                 .version        = SPI_VERSION_2,
 945                 .intr_line      = 1,
 946                 .dma_event_q    = EVENTQ_0,
 947         },
 948         [1] = {
 949                 .version        = SPI_VERSION_2,
 950                 .intr_line      = 1,
 951                 .dma_event_q    = EVENTQ_0,
 952         },
 953 };
 954
 955 static struct platform_device da8xx_spi_device[] = {
 956         [0] = {
 957                 .name           = "spi_davinci",
 958                 .id             = 0,
 959                 .num_resources  = ARRAY_SIZE(da8xx_spi0_resources),
 960                 .resource       = da8xx_spi0_resources,
 961                 .dev            = {
 962                         .platform_data = &da8xx_spi_pdata[0],
 963                 },
 964         },
 965         [1] = {
 966                 .name           = "spi_davinci",
 967                 .id             = 1,
 968                 .num_resources  = ARRAY_SIZE(da8xx_spi1_resources),
 969                 .resource       = da8xx_spi1_resources,
 970                 .dev            = {
 971                         .platform_data = &da8xx_spi_pdata[1],
 972                 },
 973         },
 974 };
 975
 976 int __init da8xx_register_spi_bus(int instance, unsigned num_chipselect)
 977 {
 978         if (instance < 0 || instance > 1)
 979                 return -EINVAL;
 980
 981         da8xx_spi_pdata[instance].num_chipselect = num_chipselect;
 982
 983         if (instance == 1 && cpu_is_davinci_da850()) {
 984                 da8xx_spi1_resources[0].start = DA850_SPI1_BASE;
 985                 da8xx_spi1_resources[0].end = DA850_SPI1_BASE + SZ_4K - 1;
 986         }
 987
 988         return platform_device_register(&da8xx_spi_device[instance]);
 989 }
 990
 991 #ifdef CONFIG_ARCH_DAVINCI_DA850
 992 static struct resource da850_sata_resources[] = {
 993         {
 994                 .start  = DA850_SATA_BASE,
 995                 .end    = DA850_SATA_BASE + 0x1fff,
 996                 .flags  = IORESOURCE_MEM,
 997         },
 998         {
 999                 .start  = DA8XX_SYSCFG1_BASE + DA8XX_PWRDN_REG,
1000                 .end    = DA8XX_SYSCFG1_BASE + DA8XX_PWRDN_REG + 0x3,
1001                 .flags  = IORESOURCE_MEM,
1002         },
1003         {
1004                 .start  = IRQ_DA850_SATAINT,
1005                 .flags  = IORESOURCE_IRQ,
1006         },
1007 };
1008
1009 static u64 da850_sata_dmamask = DMA_BIT_MASK(32);
1010
1011 static struct platform_device da850_sata_device = {
1012         .name   = "ahci_da850",
1013         .id     = -1,
1014         .dev    = {
1015                 .dma_mask               = &da850_sata_dmamask,
1016                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1017         },
1018         .num_resources  = ARRAY_SIZE(da850_sata_resources),
1019         .resource       = da850_sata_resources,
1020 };
1021
1022 int __init da850_register_sata(unsigned long refclkpn)
1023 {
1024         /* please see comment in drivers/ata/ahci_da850.c */
1025         BUG_ON(refclkpn != 100 * 1000 * 1000);
1026
1027         return platform_device_register(&da850_sata_device);
1028 }
1029 #endif