arch/arm/mach-at91/at91sam9rl_devices.c

   1 /*
   2  *  Copyright (C) 2007 Atmel Corporation
   3  *
   4  * This file is subject to the terms and conditions of the GNU General Public
   5  * License.  See the file COPYING in the main directory of this archive for
   6  * more details.
   7  */
   8
   9 #include <asm/mach/arch.h>
  10 #include <asm/mach/map.h>
  11
  12 #include <linux/dma-mapping.h>
  13 #include <linux/gpio.h>
  14 #include <linux/platform_device.h>
  15 #include <linux/i2c-gpio.h>
  16
  17 #include <linux/fb.h>
  18 #include <video/atmel_lcdc.h>
  19
  20 #include <mach/board.h>
  21 #include <mach/at91sam9rl.h>
  22 #include <mach/at91sam9rl_matrix.h>
  23 #include <mach/at91_matrix.h>
  24 #include <mach/at91sam9_smc.h>
  25 #include <mach/at_hdmac.h>
  26
  27 #include "generic.h"
  28
  29
  30 /* --------------------------------------------------------------------
  31  *  HDMAC - AHB DMA Controller
  32  * -------------------------------------------------------------------- */
  33
  34 #if defined(CONFIG_AT_HDMAC) || defined(CONFIG_AT_HDMAC_MODULE)
  35 static u64 hdmac_dmamask = DMA_BIT_MASK(32);
  36
  37 static struct resource hdmac_resources[] = {
  38         [0] = {
  39                 .start  = AT91SAM9RL_BASE_DMA,
  40                 .end    = AT91SAM9RL_BASE_DMA + SZ_512 - 1,
  41                 .flags  = IORESOURCE_MEM,
  42         },
  43         [2] = {
  44                 .start  = AT91SAM9RL_ID_DMA,
  45                 .end    = AT91SAM9RL_ID_DMA,
  46                 .flags  = IORESOURCE_IRQ,
  47         },
  48 };
  49
  50 static struct platform_device at_hdmac_device = {
  51         .name           = "at91sam9rl_dma",
  52         .id             = -1,
  53         .dev            = {
  54                                 .dma_mask               = &hdmac_dmamask,
  55                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
  56         },
  57         .resource       = hdmac_resources,
  58         .num_resources  = ARRAY_SIZE(hdmac_resources),
  59 };
  60
  61 void __init at91_add_device_hdmac(void)
  62 {
  63         platform_device_register(&at_hdmac_device);
  64 }
  65 #else
  66 void __init at91_add_device_hdmac(void) {}
  67 #endif
  68
  69 /* --------------------------------------------------------------------
  70  *  USB HS Device (Gadget)
  71  * -------------------------------------------------------------------- */
  72
  73 #if defined(CONFIG_USB_ATMEL_USBA) || defined(CONFIG_USB_ATMEL_USBA_MODULE)
  74
  75 static struct resource usba_udc_resources[] = {
  76         [0] = {
  77                 .start  = AT91SAM9RL_UDPHS_FIFO,
  78                 .end    = AT91SAM9RL_UDPHS_FIFO + SZ_512K - 1,
  79                 .flags  = IORESOURCE_MEM,
  80         },
  81         [1] = {
  82                 .start  = AT91SAM9RL_BASE_UDPHS,
  83                 .end    = AT91SAM9RL_BASE_UDPHS + SZ_1K - 1,
  84                 .flags  = IORESOURCE_MEM,
  85         },
  86         [2] = {
  87                 .start  = AT91SAM9RL_ID_UDPHS,
  88                 .end    = AT91SAM9RL_ID_UDPHS,
  89                 .flags  = IORESOURCE_IRQ,
  90         },
  91 };
  92
  93 #define EP(nam, idx, maxpkt, maxbk, dma, isoc)                  \
  94         [idx] = {                                               \
  95                 .name           = nam,                          \
  96                 .index          = idx,                          \
  97                 .fifo_size      = maxpkt,                       \
  98                 .nr_banks       = maxbk,                        \
  99                 .can_dma        = dma,                          \
 100                 .can_isoc       = isoc,                         \
 101         }
 102
 103 static struct usba_ep_data usba_udc_ep[] __initdata = {
 104         EP("ep0", 0, 64, 1, 0, 0),
 105         EP("ep1", 1, 1024, 2, 1, 1),
 106         EP("ep2", 2, 1024, 2, 1, 1),
 107         EP("ep3", 3, 1024, 3, 1, 0),
 108         EP("ep4", 4, 1024, 3, 1, 0),
 109         EP("ep5", 5, 1024, 3, 1, 1),
 110         EP("ep6", 6, 1024, 3, 1, 1),
 111 };
 112
 113 #undef EP
 114
 115 /*
 116  * pdata doesn't have room for any endpoints, so we need to
 117  * append room for the ones we need right after it.
 118  */
 119 static struct {
 120         struct usba_platform_data pdata;
 121         struct usba_ep_data ep[7];
 122 } usba_udc_data;
 123
 124 static struct platform_device at91_usba_udc_device = {
 125         .name           = "atmel_usba_udc",
 126         .id             = -1,
 127         .dev            = {
 128                                 .platform_data  = &usba_udc_data.pdata,
 129         },
 130         .resource       = usba_udc_resources,
 131         .num_resources  = ARRAY_SIZE(usba_udc_resources),
 132 };
 133
 134 void __init at91_add_device_usba(struct usba_platform_data *data)
 135 {
 136         /*
 137          * Invalid pins are 0 on AT91, but the usba driver is shared
 138          * with AVR32, which use negative values instead. Once/if
 139          * gpio_is_valid() is ported to AT91, revisit this code.
 140          */
 141         usba_udc_data.pdata.vbus_pin = -EINVAL;
 142         usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep);
 143         memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep));
 144
 145         if (data && gpio_is_valid(data->vbus_pin)) {
 146                 at91_set_gpio_input(data->vbus_pin, 0);
 147                 at91_set_deglitch(data->vbus_pin, 1);
 148                 usba_udc_data.pdata.vbus_pin = data->vbus_pin;
 149         }
 150
 151         /* Pullup pin is handled internally by USB device peripheral */
 152
 153         platform_device_register(&at91_usba_udc_device);
 154 }
 155 #else
 156 void __init at91_add_device_usba(struct usba_platform_data *data) {}
 157 #endif
 158
 159
 160 /* --------------------------------------------------------------------
 161  *  MMC / SD
 162  * -------------------------------------------------------------------- */
 163
 164 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
 165 static u64 mmc_dmamask = DMA_BIT_MASK(32);
 166 static struct at91_mmc_data mmc_data;
 167
 168 static struct resource mmc_resources[] = {
 169         [0] = {
 170                 .start  = AT91SAM9RL_BASE_MCI,
 171                 .end    = AT91SAM9RL_BASE_MCI + SZ_16K - 1,
 172                 .flags  = IORESOURCE_MEM,
 173         },
 174         [1] = {
 175                 .start  = AT91SAM9RL_ID_MCI,
 176                 .end    = AT91SAM9RL_ID_MCI,
 177                 .flags  = IORESOURCE_IRQ,
 178         },
 179 };
 180
 181 static struct platform_device at91sam9rl_mmc_device = {
 182         .name           = "at91_mci",
 183         .id             = -1,
 184         .dev            = {
 185                                 .dma_mask               = &mmc_dmamask,
 186                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 187                                 .platform_data          = &mmc_data,
 188         },
 189         .resource       = mmc_resources,
 190         .num_resources  = ARRAY_SIZE(mmc_resources),
 191 };
 192
 193 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
 194 {
 195         if (!data)
 196                 return;
 197
 198         /* input/irq */
 199         if (gpio_is_valid(data->det_pin)) {
 200                 at91_set_gpio_input(data->det_pin, 1);
 201                 at91_set_deglitch(data->det_pin, 1);
 202         }
 203         if (gpio_is_valid(data->wp_pin))
 204                 at91_set_gpio_input(data->wp_pin, 1);
 205         if (gpio_is_valid(data->vcc_pin))
 206                 at91_set_gpio_output(data->vcc_pin, 0);
 207
 208         /* CLK */
 209         at91_set_A_periph(AT91_PIN_PA2, 0);
 210
 211         /* CMD */
 212         at91_set_A_periph(AT91_PIN_PA1, 1);
 213
 214         /* DAT0, maybe DAT1..DAT3 */
 215         at91_set_A_periph(AT91_PIN_PA0, 1);
 216         if (data->wire4) {
 217                 at91_set_A_periph(AT91_PIN_PA3, 1);
 218                 at91_set_A_periph(AT91_PIN_PA4, 1);
 219                 at91_set_A_periph(AT91_PIN_PA5, 1);
 220         }
 221
 222         mmc_data = *data;
 223         platform_device_register(&at91sam9rl_mmc_device);
 224 }
 225 #else
 226 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
 227 #endif
 228
 229
 230 /* --------------------------------------------------------------------
 231  *  NAND / SmartMedia
 232  * -------------------------------------------------------------------- */
 233
 234 #if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
 235 static struct atmel_nand_data nand_data;
 236
 237 #define NAND_BASE       AT91_CHIPSELECT_3
 238
 239 static struct resource nand_resources[] = {
 240         [0] = {
 241                 .start  = NAND_BASE,
 242                 .end    = NAND_BASE + SZ_256M - 1,
 243                 .flags  = IORESOURCE_MEM,
 244         },
 245         [1] = {
 246                 .start  = AT91SAM9RL_BASE_ECC,
 247                 .end    = AT91SAM9RL_BASE_ECC + SZ_512 - 1,
 248                 .flags  = IORESOURCE_MEM,
 249         }
 250 };
 251
 252 static struct platform_device atmel_nand_device = {
 253         .name           = "atmel_nand",
 254         .id             = -1,
 255         .dev            = {
 256                                 .platform_data  = &nand_data,
 257         },
 258         .resource       = nand_resources,
 259         .num_resources  = ARRAY_SIZE(nand_resources),
 260 };
 261
 262 void __init at91_add_device_nand(struct atmel_nand_data *data)
 263 {
 264         unsigned long csa;
 265
 266         if (!data)
 267                 return;
 268
 269         csa = at91_matrix_read(AT91_MATRIX_EBICSA);
 270         at91_matrix_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
 271
 272         /* enable pin */
 273         if (gpio_is_valid(data->enable_pin))
 274                 at91_set_gpio_output(data->enable_pin, 1);
 275
 276         /* ready/busy pin */
 277         if (gpio_is_valid(data->rdy_pin))
 278                 at91_set_gpio_input(data->rdy_pin, 1);
 279
 280         /* card detect pin */
 281         if (gpio_is_valid(data->det_pin))
 282                 at91_set_gpio_input(data->det_pin, 1);
 283
 284         at91_set_A_periph(AT91_PIN_PB4, 0);             /* NANDOE */
 285         at91_set_A_periph(AT91_PIN_PB5, 0);             /* NANDWE */
 286
 287         nand_data = *data;
 288         platform_device_register(&atmel_nand_device);
 289 }
 290
 291 #else
 292 void __init at91_add_device_nand(struct atmel_nand_data *data) {}
 293 #endif
 294
 295
 296 /* --------------------------------------------------------------------
 297  *  TWI (i2c)
 298  * -------------------------------------------------------------------- */
 299
 300 /*
 301  * Prefer the GPIO code since the TWI controller isn't robust
 302  * (gets overruns and underruns under load) and can only issue
 303  * repeated STARTs in one scenario (the driver doesn't yet handle them).
 304  */
 305 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
 306
 307 static struct i2c_gpio_platform_data pdata = {
 308         .sda_pin                = AT91_PIN_PA23,
 309         .sda_is_open_drain      = 1,
 310         .scl_pin                = AT91_PIN_PA24,
 311         .scl_is_open_drain      = 1,
 312         .udelay                 = 2,            /* ~100 kHz */
 313 };
 314
 315 static struct platform_device at91sam9rl_twi_device = {
 316         .name                   = "i2c-gpio",
 317         .id                     = -1,
 318         .dev.platform_data      = &pdata,
 319 };
 320
 321 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
 322 {
 323         at91_set_GPIO_periph(AT91_PIN_PA23, 1);         /* TWD (SDA) */
 324         at91_set_multi_drive(AT91_PIN_PA23, 1);
 325
 326         at91_set_GPIO_periph(AT91_PIN_PA24, 1);         /* TWCK (SCL) */
 327         at91_set_multi_drive(AT91_PIN_PA24, 1);
 328
 329         i2c_register_board_info(0, devices, nr_devices);
 330         platform_device_register(&at91sam9rl_twi_device);
 331 }
 332
 333 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
 334
 335 static struct resource twi_resources[] = {
 336         [0] = {
 337                 .start  = AT91SAM9RL_BASE_TWI0,
 338                 .end    = AT91SAM9RL_BASE_TWI0 + SZ_16K - 1,
 339                 .flags  = IORESOURCE_MEM,
 340         },
 341         [1] = {
 342                 .start  = AT91SAM9RL_ID_TWI0,
 343                 .end    = AT91SAM9RL_ID_TWI0,
 344                 .flags  = IORESOURCE_IRQ,
 345         },
 346 };
 347
 348 static struct platform_device at91sam9rl_twi_device = {
 349         .name           = "at91_i2c",
 350         .id             = -1,
 351         .resource       = twi_resources,
 352         .num_resources  = ARRAY_SIZE(twi_resources),
 353 };
 354
 355 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
 356 {
 357         /* pins used for TWI interface */
 358         at91_set_A_periph(AT91_PIN_PA23, 0);            /* TWD */
 359         at91_set_multi_drive(AT91_PIN_PA23, 1);
 360
 361         at91_set_A_periph(AT91_PIN_PA24, 0);            /* TWCK */
 362         at91_set_multi_drive(AT91_PIN_PA24, 1);
 363
 364         i2c_register_board_info(0, devices, nr_devices);
 365         platform_device_register(&at91sam9rl_twi_device);
 366 }
 367 #else
 368 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
 369 #endif
 370
 371
 372 /* --------------------------------------------------------------------
 373  *  SPI
 374  * -------------------------------------------------------------------- */
 375
 376 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
 377 static u64 spi_dmamask = DMA_BIT_MASK(32);
 378
 379 static struct resource spi_resources[] = {
 380         [0] = {
 381                 .start  = AT91SAM9RL_BASE_SPI,
 382                 .end    = AT91SAM9RL_BASE_SPI + SZ_16K - 1,
 383                 .flags  = IORESOURCE_MEM,
 384         },
 385         [1] = {
 386                 .start  = AT91SAM9RL_ID_SPI,
 387                 .end    = AT91SAM9RL_ID_SPI,
 388                 .flags  = IORESOURCE_IRQ,
 389         },
 390 };
 391
 392 static struct platform_device at91sam9rl_spi_device = {
 393         .name           = "atmel_spi",
 394         .id             = 0,
 395         .dev            = {
 396                                 .dma_mask               = &spi_dmamask,
 397                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 398         },
 399         .resource       = spi_resources,
 400         .num_resources  = ARRAY_SIZE(spi_resources),
 401 };
 402
 403 static const unsigned spi_standard_cs[4] = { AT91_PIN_PA28, AT91_PIN_PB7, AT91_PIN_PD8, AT91_PIN_PD9 };
 404
 405
 406 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
 407 {
 408         int i;
 409         unsigned long cs_pin;
 410
 411         at91_set_A_periph(AT91_PIN_PA25, 0);    /* MISO */
 412         at91_set_A_periph(AT91_PIN_PA26, 0);    /* MOSI */
 413         at91_set_A_periph(AT91_PIN_PA27, 0);    /* SPCK */
 414
 415         /* Enable SPI chip-selects */
 416         for (i = 0; i < nr_devices; i++) {
 417                 if (devices[i].controller_data)
 418                         cs_pin = (unsigned long) devices[i].controller_data;
 419                 else
 420                         cs_pin = spi_standard_cs[devices[i].chip_select];
 421
 422                 if (!gpio_is_valid(cs_pin))
 423                         continue;
 424
 425                 /* enable chip-select pin */
 426                 at91_set_gpio_output(cs_pin, 1);
 427
 428                 /* pass chip-select pin to driver */
 429                 devices[i].controller_data = (void *) cs_pin;
 430         }
 431
 432         spi_register_board_info(devices, nr_devices);
 433         platform_device_register(&at91sam9rl_spi_device);
 434 }
 435 #else
 436 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
 437 #endif
 438
 439
 440 /* --------------------------------------------------------------------
 441  *  AC97
 442  * -------------------------------------------------------------------- */
 443
 444 #if defined(CONFIG_SND_ATMEL_AC97C) || defined(CONFIG_SND_ATMEL_AC97C_MODULE)
 445 static u64 ac97_dmamask = DMA_BIT_MASK(32);
 446 static struct ac97c_platform_data ac97_data;
 447
 448 static struct resource ac97_resources[] = {
 449         [0] = {
 450                 .start  = AT91SAM9RL_BASE_AC97C,
 451                 .end    = AT91SAM9RL_BASE_AC97C + SZ_16K - 1,
 452                 .flags  = IORESOURCE_MEM,
 453         },
 454         [1] = {
 455                 .start  = AT91SAM9RL_ID_AC97C,
 456                 .end    = AT91SAM9RL_ID_AC97C,
 457                 .flags  = IORESOURCE_IRQ,
 458         },
 459 };
 460
 461 static struct platform_device at91sam9rl_ac97_device = {
 462         .name           = "atmel_ac97c",
 463         .id             = 0,
 464         .dev            = {
 465                                 .dma_mask               = &ac97_dmamask,
 466                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 467                                 .platform_data          = &ac97_data,
 468         },
 469         .resource       = ac97_resources,
 470         .num_resources  = ARRAY_SIZE(ac97_resources),
 471 };
 472
 473 void __init at91_add_device_ac97(struct ac97c_platform_data *data)
 474 {
 475         if (!data)
 476                 return;
 477
 478         at91_set_A_periph(AT91_PIN_PD1, 0);     /* AC97FS */
 479         at91_set_A_periph(AT91_PIN_PD2, 0);     /* AC97CK */
 480         at91_set_A_periph(AT91_PIN_PD3, 0);     /* AC97TX */
 481         at91_set_A_periph(AT91_PIN_PD4, 0);     /* AC97RX */
 482
 483         /* reset */
 484         if (gpio_is_valid(data->reset_pin))
 485                 at91_set_gpio_output(data->reset_pin, 0);
 486
 487         ac97_data = *data;
 488         platform_device_register(&at91sam9rl_ac97_device);
 489 }
 490 #else
 491 void __init at91_add_device_ac97(struct ac97c_platform_data *data) {}
 492 #endif
 493
 494
 495 /* --------------------------------------------------------------------
 496  *  LCD Controller
 497  * -------------------------------------------------------------------- */
 498
 499 #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
 500 static u64 lcdc_dmamask = DMA_BIT_MASK(32);
 501 static struct atmel_lcdfb_info lcdc_data;
 502
 503 static struct resource lcdc_resources[] = {
 504         [0] = {
 505                 .start  = AT91SAM9RL_LCDC_BASE,
 506                 .end    = AT91SAM9RL_LCDC_BASE + SZ_4K - 1,
 507                 .flags  = IORESOURCE_MEM,
 508         },
 509         [1] = {
 510                 .start  = AT91SAM9RL_ID_LCDC,
 511                 .end    = AT91SAM9RL_ID_LCDC,
 512                 .flags  = IORESOURCE_IRQ,
 513         },
 514 };
 515
 516 static struct platform_device at91_lcdc_device = {
 517         .name           = "atmel_lcdfb",
 518         .id             = 0,
 519         .dev            = {
 520                                 .dma_mask               = &lcdc_dmamask,
 521                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 522                                 .platform_data          = &lcdc_data,
 523         },
 524         .resource       = lcdc_resources,
 525         .num_resources  = ARRAY_SIZE(lcdc_resources),
 526 };
 527
 528 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
 529 {
 530         if (!data) {
 531                 return;
 532         }
 533
 534         at91_set_B_periph(AT91_PIN_PC1, 0);     /* LCDPWR */
 535         at91_set_A_periph(AT91_PIN_PC5, 0);     /* LCDHSYNC */
 536         at91_set_A_periph(AT91_PIN_PC6, 0);     /* LCDDOTCK */
 537         at91_set_A_periph(AT91_PIN_PC7, 0);     /* LCDDEN */
 538         at91_set_A_periph(AT91_PIN_PC3, 0);     /* LCDCC */
 539         at91_set_B_periph(AT91_PIN_PC9, 0);     /* LCDD3 */
 540         at91_set_B_periph(AT91_PIN_PC10, 0);    /* LCDD4 */
 541         at91_set_B_periph(AT91_PIN_PC11, 0);    /* LCDD5 */
 542         at91_set_B_periph(AT91_PIN_PC12, 0);    /* LCDD6 */
 543         at91_set_B_periph(AT91_PIN_PC13, 0);    /* LCDD7 */
 544         at91_set_B_periph(AT91_PIN_PC15, 0);    /* LCDD11 */
 545         at91_set_B_periph(AT91_PIN_PC16, 0);    /* LCDD12 */
 546         at91_set_B_periph(AT91_PIN_PC17, 0);    /* LCDD13 */
 547         at91_set_B_periph(AT91_PIN_PC18, 0);    /* LCDD14 */
 548         at91_set_B_periph(AT91_PIN_PC19, 0);    /* LCDD15 */
 549         at91_set_B_periph(AT91_PIN_PC20, 0);    /* LCDD18 */
 550         at91_set_B_periph(AT91_PIN_PC21, 0);    /* LCDD19 */
 551         at91_set_B_periph(AT91_PIN_PC22, 0);    /* LCDD20 */
 552         at91_set_B_periph(AT91_PIN_PC23, 0);    /* LCDD21 */
 553         at91_set_B_periph(AT91_PIN_PC24, 0);    /* LCDD22 */
 554         at91_set_B_periph(AT91_PIN_PC25, 0);    /* LCDD23 */
 555
 556         lcdc_data = *data;
 557         platform_device_register(&at91_lcdc_device);
 558 }
 559 #else
 560 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
 561 #endif
 562
 563
 564 /* --------------------------------------------------------------------
 565  *  Timer/Counter block
 566  * -------------------------------------------------------------------- */
 567
 568 #ifdef CONFIG_ATMEL_TCLIB
 569
 570 static struct resource tcb_resources[] = {
 571         [0] = {
 572                 .start  = AT91SAM9RL_BASE_TCB0,
 573                 .end    = AT91SAM9RL_BASE_TCB0 + SZ_16K - 1,
 574                 .flags  = IORESOURCE_MEM,
 575         },
 576         [1] = {
 577                 .start  = AT91SAM9RL_ID_TC0,
 578                 .end    = AT91SAM9RL_ID_TC0,
 579                 .flags  = IORESOURCE_IRQ,
 580         },
 581         [2] = {
 582                 .start  = AT91SAM9RL_ID_TC1,
 583                 .end    = AT91SAM9RL_ID_TC1,
 584                 .flags  = IORESOURCE_IRQ,
 585         },
 586         [3] = {
 587                 .start  = AT91SAM9RL_ID_TC2,
 588                 .end    = AT91SAM9RL_ID_TC2,
 589                 .flags  = IORESOURCE_IRQ,
 590         },
 591 };
 592
 593 static struct platform_device at91sam9rl_tcb_device = {
 594         .name           = "atmel_tcb",
 595         .id             = 0,
 596         .resource       = tcb_resources,
 597         .num_resources  = ARRAY_SIZE(tcb_resources),
 598 };
 599
 600 static void __init at91_add_device_tc(void)
 601 {
 602         platform_device_register(&at91sam9rl_tcb_device);
 603 }
 604 #else
 605 static void __init at91_add_device_tc(void) { }
 606 #endif
 607
 608
 609 /* --------------------------------------------------------------------
 610  *  Touchscreen
 611  * -------------------------------------------------------------------- */
 612
 613 #if defined(CONFIG_TOUCHSCREEN_ATMEL_TSADCC) || defined(CONFIG_TOUCHSCREEN_ATMEL_TSADCC_MODULE)
 614 static u64 tsadcc_dmamask = DMA_BIT_MASK(32);
 615 static struct at91_tsadcc_data tsadcc_data;
 616
 617 static struct resource tsadcc_resources[] = {
 618         [0] = {
 619                 .start  = AT91SAM9RL_BASE_TSC,
 620                 .end    = AT91SAM9RL_BASE_TSC + SZ_16K - 1,
 621                 .flags  = IORESOURCE_MEM,
 622         },
 623         [1] = {
 624                 .start  = AT91SAM9RL_ID_TSC,
 625                 .end    = AT91SAM9RL_ID_TSC,
 626                 .flags  = IORESOURCE_IRQ,
 627         }
 628 };
 629
 630 static struct platform_device at91sam9rl_tsadcc_device = {
 631         .name           = "atmel_tsadcc",
 632         .id             = -1,
 633         .dev            = {
 634                                 .dma_mask               = &tsadcc_dmamask,
 635                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 636                                 .platform_data          = &tsadcc_data,
 637         },
 638         .resource       = tsadcc_resources,
 639         .num_resources  = ARRAY_SIZE(tsadcc_resources),
 640 };
 641
 642 void __init at91_add_device_tsadcc(struct at91_tsadcc_data *data)
 643 {
 644         if (!data)
 645                 return;
 646
 647         at91_set_A_periph(AT91_PIN_PA17, 0);    /* AD0_XR */
 648         at91_set_A_periph(AT91_PIN_PA18, 0);    /* AD1_XL */
 649         at91_set_A_periph(AT91_PIN_PA19, 0);    /* AD2_YT */
 650         at91_set_A_periph(AT91_PIN_PA20, 0);    /* AD3_TB */
 651
 652         tsadcc_data = *data;
 653         platform_device_register(&at91sam9rl_tsadcc_device);
 654 }
 655 #else
 656 void __init at91_add_device_tsadcc(struct at91_tsadcc_data *data) {}
 657 #endif
 658
 659
 660 /* --------------------------------------------------------------------
 661  *  RTC
 662  * -------------------------------------------------------------------- */
 663
 664 #if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE)
 665 static struct platform_device at91sam9rl_rtc_device = {
 666         .name           = "at91_rtc",
 667         .id             = -1,
 668         .num_resources  = 0,
 669 };
 670
 671 static void __init at91_add_device_rtc(void)
 672 {
 673         platform_device_register(&at91sam9rl_rtc_device);
 674 }
 675 #else
 676 static void __init at91_add_device_rtc(void) {}
 677 #endif
 678
 679
 680 /* --------------------------------------------------------------------
 681  *  RTT
 682  * -------------------------------------------------------------------- */
 683
 684 static struct resource rtt_resources[] = {
 685         {
 686                 .start  = AT91SAM9RL_BASE_RTT,
 687                 .end    = AT91SAM9RL_BASE_RTT + SZ_16 - 1,
 688                 .flags  = IORESOURCE_MEM,
 689         }, {
 690                 .flags  = IORESOURCE_MEM,
 691         }
 692 };
 693
 694 static struct platform_device at91sam9rl_rtt_device = {
 695         .name           = "at91_rtt",
 696         .id             = 0,
 697         .resource       = rtt_resources,
 698 };
 699
 700 #if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
 701 static void __init at91_add_device_rtt_rtc(void)
 702 {
 703         at91sam9rl_rtt_device.name = "rtc-at91sam9";
 704         /*
 705          * The second resource is needed:
 706          * GPBR will serve as the storage for RTC time offset
 707          */
 708         at91sam9rl_rtt_device.num_resources = 2;
 709         rtt_resources[1].start = AT91SAM9RL_BASE_GPBR +
 710                                  4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
 711         rtt_resources[1].end = rtt_resources[1].start + 3;
 712 }
 713 #else
 714 static void __init at91_add_device_rtt_rtc(void)
 715 {
 716         /* Only one resource is needed: RTT not used as RTC */
 717         at91sam9rl_rtt_device.num_resources = 1;
 718 }
 719 #endif
 720
 721 static void __init at91_add_device_rtt(void)
 722 {
 723         at91_add_device_rtt_rtc();
 724         platform_device_register(&at91sam9rl_rtt_device);
 725 }
 726
 727
 728 /* --------------------------------------------------------------------
 729  *  Watchdog
 730  * -------------------------------------------------------------------- */
 731
 732 #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
 733 static struct resource wdt_resources[] = {
 734         {
 735                 .start  = AT91SAM9RL_BASE_WDT,
 736                 .end    = AT91SAM9RL_BASE_WDT + SZ_16 - 1,
 737                 .flags  = IORESOURCE_MEM,
 738         }
 739 };
 740
 741 static struct platform_device at91sam9rl_wdt_device = {
 742         .name           = "at91_wdt",
 743         .id             = -1,
 744         .resource       = wdt_resources,
 745         .num_resources  = ARRAY_SIZE(wdt_resources),
 746 };
 747
 748 static void __init at91_add_device_watchdog(void)
 749 {
 750         platform_device_register(&at91sam9rl_wdt_device);
 751 }
 752 #else
 753 static void __init at91_add_device_watchdog(void) {}
 754 #endif
 755
 756
 757 /* --------------------------------------------------------------------
 758  *  PWM
 759  * --------------------------------------------------------------------*/
 760
 761 #if defined(CONFIG_ATMEL_PWM)
 762 static u32 pwm_mask;
 763
 764 static struct resource pwm_resources[] = {
 765         [0] = {
 766                 .start  = AT91SAM9RL_BASE_PWMC,
 767                 .end    = AT91SAM9RL_BASE_PWMC + SZ_16K - 1,
 768                 .flags  = IORESOURCE_MEM,
 769         },
 770         [1] = {
 771                 .start  = AT91SAM9RL_ID_PWMC,
 772                 .end    = AT91SAM9RL_ID_PWMC,
 773                 .flags  = IORESOURCE_IRQ,
 774         },
 775 };
 776
 777 static struct platform_device at91sam9rl_pwm0_device = {
 778         .name   = "atmel_pwm",
 779         .id     = -1,
 780         .dev    = {
 781                 .platform_data          = &pwm_mask,
 782         },
 783         .resource       = pwm_resources,
 784         .num_resources  = ARRAY_SIZE(pwm_resources),
 785 };
 786
 787 void __init at91_add_device_pwm(u32 mask)
 788 {
 789         if (mask & (1 << AT91_PWM0))
 790                 at91_set_B_periph(AT91_PIN_PB8, 1);     /* enable PWM0 */
 791
 792         if (mask & (1 << AT91_PWM1))
 793                 at91_set_B_periph(AT91_PIN_PB9, 1);     /* enable PWM1 */
 794
 795         if (mask & (1 << AT91_PWM2))
 796                 at91_set_B_periph(AT91_PIN_PD5, 1);     /* enable PWM2 */
 797
 798         if (mask & (1 << AT91_PWM3))
 799                 at91_set_B_periph(AT91_PIN_PD8, 1);     /* enable PWM3 */
 800
 801         pwm_mask = mask;
 802
 803         platform_device_register(&at91sam9rl_pwm0_device);
 804 }
 805 #else
 806 void __init at91_add_device_pwm(u32 mask) {}
 807 #endif
 808
 809
 810 /* --------------------------------------------------------------------
 811  *  SSC -- Synchronous Serial Controller
 812  * -------------------------------------------------------------------- */
 813
 814 #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
 815 static u64 ssc0_dmamask = DMA_BIT_MASK(32);
 816
 817 static struct resource ssc0_resources[] = {
 818         [0] = {
 819                 .start  = AT91SAM9RL_BASE_SSC0,
 820                 .end    = AT91SAM9RL_BASE_SSC0 + SZ_16K - 1,
 821                 .flags  = IORESOURCE_MEM,
 822         },
 823         [1] = {
 824                 .start  = AT91SAM9RL_ID_SSC0,
 825                 .end    = AT91SAM9RL_ID_SSC0,
 826                 .flags  = IORESOURCE_IRQ,
 827         },
 828 };
 829
 830 static struct platform_device at91sam9rl_ssc0_device = {
 831         .name   = "ssc",
 832         .id     = 0,
 833         .dev    = {
 834                 .dma_mask               = &ssc0_dmamask,
 835                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 836         },
 837         .resource       = ssc0_resources,
 838         .num_resources  = ARRAY_SIZE(ssc0_resources),
 839 };
 840
 841 static inline void configure_ssc0_pins(unsigned pins)
 842 {
 843         if (pins & ATMEL_SSC_TF)
 844                 at91_set_A_periph(AT91_PIN_PC0, 1);
 845         if (pins & ATMEL_SSC_TK)
 846                 at91_set_A_periph(AT91_PIN_PC1, 1);
 847         if (pins & ATMEL_SSC_TD)
 848                 at91_set_A_periph(AT91_PIN_PA15, 1);
 849         if (pins & ATMEL_SSC_RD)
 850                 at91_set_A_periph(AT91_PIN_PA16, 1);
 851         if (pins & ATMEL_SSC_RK)
 852                 at91_set_B_periph(AT91_PIN_PA10, 1);
 853         if (pins & ATMEL_SSC_RF)
 854                 at91_set_B_periph(AT91_PIN_PA22, 1);
 855 }
 856
 857 static u64 ssc1_dmamask = DMA_BIT_MASK(32);
 858
 859 static struct resource ssc1_resources[] = {
 860         [0] = {
 861                 .start  = AT91SAM9RL_BASE_SSC1,
 862                 .end    = AT91SAM9RL_BASE_SSC1 + SZ_16K - 1,
 863                 .flags  = IORESOURCE_MEM,
 864         },
 865         [1] = {
 866                 .start  = AT91SAM9RL_ID_SSC1,
 867                 .end    = AT91SAM9RL_ID_SSC1,
 868                 .flags  = IORESOURCE_IRQ,
 869         },
 870 };
 871
 872 static struct platform_device at91sam9rl_ssc1_device = {
 873         .name   = "ssc",
 874         .id     = 1,
 875         .dev    = {
 876                 .dma_mask               = &ssc1_dmamask,
 877                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 878         },
 879         .resource       = ssc1_resources,
 880         .num_resources  = ARRAY_SIZE(ssc1_resources),
 881 };
 882
 883 static inline void configure_ssc1_pins(unsigned pins)
 884 {
 885         if (pins & ATMEL_SSC_TF)
 886                 at91_set_B_periph(AT91_PIN_PA29, 1);
 887         if (pins & ATMEL_SSC_TK)
 888                 at91_set_B_periph(AT91_PIN_PA30, 1);
 889         if (pins & ATMEL_SSC_TD)
 890                 at91_set_B_periph(AT91_PIN_PA13, 1);
 891         if (pins & ATMEL_SSC_RD)
 892                 at91_set_B_periph(AT91_PIN_PA14, 1);
 893         if (pins & ATMEL_SSC_RK)
 894                 at91_set_B_periph(AT91_PIN_PA9, 1);
 895         if (pins & ATMEL_SSC_RF)
 896                 at91_set_B_periph(AT91_PIN_PA8, 1);
 897 }
 898
 899 /*
 900  * SSC controllers are accessed through library code, instead of any
 901  * kind of all-singing/all-dancing driver.  For example one could be
 902  * used by a particular I2S audio codec's driver, while another one
 903  * on the same system might be used by a custom data capture driver.
 904  */
 905 void __init at91_add_device_ssc(unsigned id, unsigned pins)
 906 {
 907         struct platform_device *pdev;
 908
 909         /*
 910          * NOTE: caller is responsible for passing information matching
 911          * "pins" to whatever will be using each particular controller.
 912          */
 913         switch (id) {
 914         case AT91SAM9RL_ID_SSC0:
 915                 pdev = &at91sam9rl_ssc0_device;
 916                 configure_ssc0_pins(pins);
 917                 break;
 918         case AT91SAM9RL_ID_SSC1:
 919                 pdev = &at91sam9rl_ssc1_device;
 920                 configure_ssc1_pins(pins);
 921                 break;
 922         default:
 923                 return;
 924         }
 925
 926         platform_device_register(pdev);
 927 }
 928
 929 #else
 930 void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
 931 #endif
 932
 933
 934 /* --------------------------------------------------------------------
 935  *  UART
 936  * -------------------------------------------------------------------- */
 937
 938 #if defined(CONFIG_SERIAL_ATMEL)
 939 static struct resource dbgu_resources[] = {
 940         [0] = {
 941                 .start  = AT91SAM9RL_BASE_DBGU,
 942                 .end    = AT91SAM9RL_BASE_DBGU + SZ_512 - 1,
 943                 .flags  = IORESOURCE_MEM,
 944         },
 945         [1] = {
 946                 .start  = AT91_ID_SYS,
 947                 .end    = AT91_ID_SYS,
 948                 .flags  = IORESOURCE_IRQ,
 949         },
 950 };
 951
 952 static struct atmel_uart_data dbgu_data = {
 953         .use_dma_tx     = 0,
 954         .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
 955 };
 956
 957 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
 958
 959 static struct platform_device at91sam9rl_dbgu_device = {
 960         .name           = "atmel_usart",
 961         .id             = 0,
 962         .dev            = {
 963                                 .dma_mask               = &dbgu_dmamask,
 964                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 965                                 .platform_data          = &dbgu_data,
 966         },
 967         .resource       = dbgu_resources,
 968         .num_resources  = ARRAY_SIZE(dbgu_resources),
 969 };
 970
 971 static inline void configure_dbgu_pins(void)
 972 {
 973         at91_set_A_periph(AT91_PIN_PA21, 0);            /* DRXD */
 974         at91_set_A_periph(AT91_PIN_PA22, 1);            /* DTXD */
 975 }
 976
 977 static struct resource uart0_resources[] = {
 978         [0] = {
 979                 .start  = AT91SAM9RL_BASE_US0,
 980                 .end    = AT91SAM9RL_BASE_US0 + SZ_16K - 1,
 981                 .flags  = IORESOURCE_MEM,
 982         },
 983         [1] = {
 984                 .start  = AT91SAM9RL_ID_US0,
 985                 .end    = AT91SAM9RL_ID_US0,
 986                 .flags  = IORESOURCE_IRQ,
 987         },
 988 };
 989
 990 static struct atmel_uart_data uart0_data = {
 991         .use_dma_tx     = 1,
 992         .use_dma_rx     = 1,
 993 };
 994
 995 static u64 uart0_dmamask = DMA_BIT_MASK(32);
 996
 997 static struct platform_device at91sam9rl_uart0_device = {
 998         .name           = "atmel_usart",
 999         .id             = 1,
1000         .dev            = {
1001                                 .dma_mask               = &uart0_dmamask,
1002                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1003                                 .platform_data          = &uart0_data,
1004         },
1005         .resource       = uart0_resources,
1006         .num_resources  = ARRAY_SIZE(uart0_resources),
1007 };
1008
1009 static inline void configure_usart0_pins(unsigned pins)
1010 {
1011         at91_set_A_periph(AT91_PIN_PA6, 1);             /* TXD0 */
1012         at91_set_A_periph(AT91_PIN_PA7, 0);             /* RXD0 */
1013
1014         if (pins & ATMEL_UART_RTS)
1015                 at91_set_A_periph(AT91_PIN_PA9, 0);     /* RTS0 */
1016         if (pins & ATMEL_UART_CTS)
1017                 at91_set_A_periph(AT91_PIN_PA10, 0);    /* CTS0 */
1018         if (pins & ATMEL_UART_DSR)
1019                 at91_set_A_periph(AT91_PIN_PD14, 0);    /* DSR0 */
1020         if (pins & ATMEL_UART_DTR)
1021                 at91_set_A_periph(AT91_PIN_PD15, 0);    /* DTR0 */
1022         if (pins & ATMEL_UART_DCD)
1023                 at91_set_A_periph(AT91_PIN_PD16, 0);    /* DCD0 */
1024         if (pins & ATMEL_UART_RI)
1025                 at91_set_A_periph(AT91_PIN_PD17, 0);    /* RI0 */
1026 }
1027
1028 static struct resource uart1_resources[] = {
1029         [0] = {
1030                 .start  = AT91SAM9RL_BASE_US1,
1031                 .end    = AT91SAM9RL_BASE_US1 + SZ_16K - 1,
1032                 .flags  = IORESOURCE_MEM,
1033         },
1034         [1] = {
1035                 .start  = AT91SAM9RL_ID_US1,
1036                 .end    = AT91SAM9RL_ID_US1,
1037                 .flags  = IORESOURCE_IRQ,
1038         },
1039 };
1040
1041 static struct atmel_uart_data uart1_data = {
1042         .use_dma_tx     = 1,
1043         .use_dma_rx     = 1,
1044 };
1045
1046 static u64 uart1_dmamask = DMA_BIT_MASK(32);
1047
1048 static struct platform_device at91sam9rl_uart1_device = {
1049         .name           = "atmel_usart",
1050         .id             = 2,
1051         .dev            = {
1052                                 .dma_mask               = &uart1_dmamask,
1053                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1054                                 .platform_data          = &uart1_data,
1055         },
1056         .resource       = uart1_resources,
1057         .num_resources  = ARRAY_SIZE(uart1_resources),
1058 };
1059
1060 static inline void configure_usart1_pins(unsigned pins)
1061 {
1062         at91_set_A_periph(AT91_PIN_PA11, 1);            /* TXD1 */
1063         at91_set_A_periph(AT91_PIN_PA12, 0);            /* RXD1 */
1064
1065         if (pins & ATMEL_UART_RTS)
1066                 at91_set_B_periph(AT91_PIN_PA18, 0);    /* RTS1 */
1067         if (pins & ATMEL_UART_CTS)
1068                 at91_set_B_periph(AT91_PIN_PA19, 0);    /* CTS1 */
1069 }
1070
1071 static struct resource uart2_resources[] = {
1072         [0] = {
1073                 .start  = AT91SAM9RL_BASE_US2,
1074                 .end    = AT91SAM9RL_BASE_US2 + SZ_16K - 1,
1075                 .flags  = IORESOURCE_MEM,
1076         },
1077         [1] = {
1078                 .start  = AT91SAM9RL_ID_US2,
1079                 .end    = AT91SAM9RL_ID_US2,
1080                 .flags  = IORESOURCE_IRQ,
1081         },
1082 };
1083
1084 static struct atmel_uart_data uart2_data = {
1085         .use_dma_tx     = 1,
1086         .use_dma_rx     = 1,
1087 };
1088
1089 static u64 uart2_dmamask = DMA_BIT_MASK(32);
1090
1091 static struct platform_device at91sam9rl_uart2_device = {
1092         .name           = "atmel_usart",
1093         .id             = 3,
1094         .dev            = {
1095                                 .dma_mask               = &uart2_dmamask,
1096                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1097                                 .platform_data          = &uart2_data,
1098         },
1099         .resource       = uart2_resources,
1100         .num_resources  = ARRAY_SIZE(uart2_resources),
1101 };
1102
1103 static inline void configure_usart2_pins(unsigned pins)
1104 {
1105         at91_set_A_periph(AT91_PIN_PA13, 1);            /* TXD2 */
1106         at91_set_A_periph(AT91_PIN_PA14, 0);            /* RXD2 */
1107
1108         if (pins & ATMEL_UART_RTS)
1109                 at91_set_A_periph(AT91_PIN_PA29, 0);    /* RTS2 */
1110         if (pins & ATMEL_UART_CTS)
1111                 at91_set_A_periph(AT91_PIN_PA30, 0);    /* CTS2 */
1112 }
1113
1114 static struct resource uart3_resources[] = {
1115         [0] = {
1116                 .start  = AT91SAM9RL_BASE_US3,
1117                 .end    = AT91SAM9RL_BASE_US3 + SZ_16K - 1,
1118                 .flags  = IORESOURCE_MEM,
1119         },
1120         [1] = {
1121                 .start  = AT91SAM9RL_ID_US3,
1122                 .end    = AT91SAM9RL_ID_US3,
1123                 .flags  = IORESOURCE_IRQ,
1124         },
1125 };
1126
1127 static struct atmel_uart_data uart3_data = {
1128         .use_dma_tx     = 1,
1129         .use_dma_rx     = 1,
1130 };
1131
1132 static u64 uart3_dmamask = DMA_BIT_MASK(32);
1133
1134 static struct platform_device at91sam9rl_uart3_device = {
1135         .name           = "atmel_usart",
1136         .id             = 4,
1137         .dev            = {
1138                                 .dma_mask               = &uart3_dmamask,
1139                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1140                                 .platform_data          = &uart3_data,
1141         },
1142         .resource       = uart3_resources,
1143         .num_resources  = ARRAY_SIZE(uart3_resources),
1144 };
1145
1146 static inline void configure_usart3_pins(unsigned pins)
1147 {
1148         at91_set_A_periph(AT91_PIN_PB0, 1);             /* TXD3 */
1149         at91_set_A_periph(AT91_PIN_PB1, 0);             /* RXD3 */
1150
1151         if (pins & ATMEL_UART_RTS)
1152                 at91_set_B_periph(AT91_PIN_PD4, 0);     /* RTS3 */
1153         if (pins & ATMEL_UART_CTS)
1154                 at91_set_B_periph(AT91_PIN_PD3, 0);     /* CTS3 */
1155 }
1156
1157 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART];   /* the UARTs to use */
1158
1159 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1160 {
1161         struct platform_device *pdev;
1162         struct atmel_uart_data *pdata;
1163
1164         switch (id) {
1165                 case 0:         /* DBGU */
1166                         pdev = &at91sam9rl_dbgu_device;
1167                         configure_dbgu_pins();
1168                         break;
1169                 case AT91SAM9RL_ID_US0:
1170                         pdev = &at91sam9rl_uart0_device;
1171                         configure_usart0_pins(pins);
1172                         break;
1173                 case AT91SAM9RL_ID_US1:
1174                         pdev = &at91sam9rl_uart1_device;
1175                         configure_usart1_pins(pins);
1176                         break;
1177                 case AT91SAM9RL_ID_US2:
1178                         pdev = &at91sam9rl_uart2_device;
1179                         configure_usart2_pins(pins);
1180                         break;
1181                 case AT91SAM9RL_ID_US3:
1182                         pdev = &at91sam9rl_uart3_device;
1183                         configure_usart3_pins(pins);
1184                         break;
1185                 default:
1186                         return;
1187         }
1188         pdata = pdev->dev.platform_data;
1189         pdata->num = portnr;            /* update to mapped ID */
1190
1191         if (portnr < ATMEL_MAX_UART)
1192                 at91_uarts[portnr] = pdev;
1193 }
1194
1195 void __init at91_set_serial_console(unsigned portnr)
1196 {
1197         if (portnr < ATMEL_MAX_UART) {
1198                 atmel_default_console_device = at91_uarts[portnr];
1199                 at91sam9rl_set_console_clock(at91_uarts[portnr]->id);
1200         }
1201 }
1202
1203 void __init at91_add_device_serial(void)
1204 {
1205         int i;
1206
1207         for (i = 0; i < ATMEL_MAX_UART; i++) {
1208                 if (at91_uarts[i])
1209                         platform_device_register(at91_uarts[i]);
1210         }
1211
1212         if (!atmel_default_console_device)
1213                 printk(KERN_INFO "AT91: No default serial console defined.\n");
1214 }
1215 #else
1216 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1217 void __init at91_set_serial_console(unsigned portnr) {}
1218 void __init at91_add_device_serial(void) {}
1219 #endif
1220
1221
1222 /* -------------------------------------------------------------------- */
1223
1224 /*
1225  * These devices are always present and don't need any board-specific
1226  * setup.
1227  */
1228 static int __init at91_add_standard_devices(void)
1229 {
1230         at91_add_device_hdmac();
1231         at91_add_device_rtc();
1232         at91_add_device_rtt();
1233         at91_add_device_watchdog();
1234         at91_add_device_tc();
1235         return 0;
1236 }
1237
1238 arch_initcall(at91_add_standard_devices);