Merge tag 'fbdev-updates-for-3.7' of git://github.com/schandinat/linux-2.6
[sfrench/cifs-2.6.git] / arch / arm / boot / dts / tegra20-seaboard.dts
1 /dts-v1/;
2
3 /include/ "tegra20.dtsi"
4
5 / {
6         model = "NVIDIA Seaboard";
7         compatible = "nvidia,seaboard", "nvidia,tegra20";
8
9         memory {
10                 reg = <0x00000000 0x40000000>;
11         };
12
13         pinmux {
14                 pinctrl-names = "default";
15                 pinctrl-0 = <&state_default>;
16
17                 state_default: pinmux {
18                         ata {
19                                 nvidia,pins = "ata";
20                                 nvidia,function = "ide";
21                         };
22                         atb {
23                                 nvidia,pins = "atb", "gma", "gme";
24                                 nvidia,function = "sdio4";
25                         };
26                         atc {
27                                 nvidia,pins = "atc";
28                                 nvidia,function = "nand";
29                         };
30                         atd {
31                                 nvidia,pins = "atd", "ate", "gmb", "spia",
32                                         "spib", "spic";
33                                 nvidia,function = "gmi";
34                         };
35                         cdev1 {
36                                 nvidia,pins = "cdev1";
37                                 nvidia,function = "plla_out";
38                         };
39                         cdev2 {
40                                 nvidia,pins = "cdev2";
41                                 nvidia,function = "pllp_out4";
42                         };
43                         crtp {
44                                 nvidia,pins = "crtp", "lm1";
45                                 nvidia,function = "crt";
46                         };
47                         csus {
48                                 nvidia,pins = "csus";
49                                 nvidia,function = "vi_sensor_clk";
50                         };
51                         dap1 {
52                                 nvidia,pins = "dap1";
53                                 nvidia,function = "dap1";
54                         };
55                         dap2 {
56                                 nvidia,pins = "dap2";
57                                 nvidia,function = "dap2";
58                         };
59                         dap3 {
60                                 nvidia,pins = "dap3";
61                                 nvidia,function = "dap3";
62                         };
63                         dap4 {
64                                 nvidia,pins = "dap4";
65                                 nvidia,function = "dap4";
66                         };
67                         dta {
68                                 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
69                                 nvidia,function = "vi";
70                         };
71                         dtf {
72                                 nvidia,pins = "dtf";
73                                 nvidia,function = "i2c3";
74                         };
75                         gmc {
76                                 nvidia,pins = "gmc";
77                                 nvidia,function = "uartd";
78                         };
79                         gmd {
80                                 nvidia,pins = "gmd";
81                                 nvidia,function = "sflash";
82                         };
83                         gpu {
84                                 nvidia,pins = "gpu";
85                                 nvidia,function = "pwm";
86                         };
87                         gpu7 {
88                                 nvidia,pins = "gpu7";
89                                 nvidia,function = "rtck";
90                         };
91                         gpv {
92                                 nvidia,pins = "gpv", "slxa", "slxk";
93                                 nvidia,function = "pcie";
94                         };
95                         hdint {
96                                 nvidia,pins = "hdint", "lpw0", "lpw2", "lsc1",
97                                         "lsck", "lsda";
98                                 nvidia,function = "hdmi";
99                         };
100                         i2cp {
101                                 nvidia,pins = "i2cp";
102                                 nvidia,function = "i2cp";
103                         };
104                         irrx {
105                                 nvidia,pins = "irrx", "irtx";
106                                 nvidia,function = "uartb";
107                         };
108                         kbca {
109                                 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
110                                         "kbce", "kbcf";
111                                 nvidia,function = "kbc";
112                         };
113                         lcsn {
114                                 nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",
115                                         "lsdi", "lvp0";
116                                 nvidia,function = "rsvd4";
117                         };
118                         ld0 {
119                                 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
120                                         "ld5", "ld6", "ld7", "ld8", "ld9",
121                                         "ld10", "ld11", "ld12", "ld13", "ld14",
122                                         "ld15", "ld16", "ld17", "ldi", "lhp0",
123                                         "lhp1", "lhp2", "lhs", "lpp", "lsc0",
124                                         "lspi", "lvp1", "lvs";
125                                 nvidia,function = "displaya";
126                         };
127                         owc {
128                                 nvidia,pins = "owc", "spdi", "spdo", "uac";
129                                 nvidia,function = "rsvd2";
130                         };
131                         pmc {
132                                 nvidia,pins = "pmc";
133                                 nvidia,function = "pwr_on";
134                         };
135                         rm {
136                                 nvidia,pins = "rm";
137                                 nvidia,function = "i2c1";
138                         };
139                         sdb {
140                                 nvidia,pins = "sdb", "sdc", "sdd";
141                                 nvidia,function = "sdio3";
142                         };
143                         sdio1 {
144                                 nvidia,pins = "sdio1";
145                                 nvidia,function = "sdio1";
146                         };
147                         slxc {
148                                 nvidia,pins = "slxc", "slxd";
149                                 nvidia,function = "spdif";
150                         };
151                         spid {
152                                 nvidia,pins = "spid", "spie", "spif";
153                                 nvidia,function = "spi1";
154                         };
155                         spig {
156                                 nvidia,pins = "spig", "spih";
157                                 nvidia,function = "spi2_alt";
158                         };
159                         uaa {
160                                 nvidia,pins = "uaa", "uab", "uda";
161                                 nvidia,function = "ulpi";
162                         };
163                         uad {
164                                 nvidia,pins = "uad";
165                                 nvidia,function = "irda";
166                         };
167                         uca {
168                                 nvidia,pins = "uca", "ucb";
169                                 nvidia,function = "uartc";
170                         };
171                         conf_ata {
172                                 nvidia,pins = "ata", "atb", "atc", "atd",
173                                         "cdev1", "cdev2", "dap1", "dap2",
174                                         "dap4", "ddc", "dtf", "gma", "gmc", "gmd",
175                                         "gme", "gpu", "gpu7", "i2cp", "irrx",
176                                         "irtx", "pta", "rm", "sdc", "sdd",
177                                         "slxd", "slxk", "spdi", "spdo", "uac",
178                                         "uad", "uca", "ucb", "uda";
179                                 nvidia,pull = <0>;
180                                 nvidia,tristate = <0>;
181                         };
182                         conf_ate {
183                                 nvidia,pins = "ate", "csus", "dap3",
184                                         "gpv", "owc", "slxc", "spib", "spid",
185                                         "spie";
186                                 nvidia,pull = <0>;
187                                 nvidia,tristate = <1>;
188                         };
189                         conf_ck32 {
190                                 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
191                                         "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
192                                 nvidia,pull = <0>;
193                         };
194                         conf_crtp {
195                                 nvidia,pins = "crtp", "gmb", "slxa", "spia",
196                                         "spig", "spih";
197                                 nvidia,pull = <2>;
198                                 nvidia,tristate = <1>;
199                         };
200                         conf_dta {
201                                 nvidia,pins = "dta", "dtb", "dtc", "dtd";
202                                 nvidia,pull = <1>;
203                                 nvidia,tristate = <0>;
204                         };
205                         conf_dte {
206                                 nvidia,pins = "dte", "spif";
207                                 nvidia,pull = <1>;
208                                 nvidia,tristate = <1>;
209                         };
210                         conf_hdint {
211                                 nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
212                                         "lpw1", "lsc1", "lsck", "lsda", "lsdi",
213                                         "lvp0";
214                                 nvidia,tristate = <1>;
215                         };
216                         conf_kbca {
217                                 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
218                                         "kbce", "kbcf", "sdio1", "spic", "uaa",
219                                         "uab";
220                                 nvidia,pull = <2>;
221                                 nvidia,tristate = <0>;
222                         };
223                         conf_lc {
224                                 nvidia,pins = "lc", "ls";
225                                 nvidia,pull = <2>;
226                         };
227                         conf_ld0 {
228                                 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
229                                         "ld5", "ld6", "ld7", "ld8", "ld9",
230                                         "ld10", "ld11", "ld12", "ld13", "ld14",
231                                         "ld15", "ld16", "ld17", "ldi", "lhp0",
232                                         "lhp1", "lhp2", "lhs", "lm0", "lpp",
233                                         "lpw0", "lpw2", "lsc0", "lspi", "lvp1",
234                                         "lvs", "pmc", "sdb";
235                                 nvidia,tristate = <0>;
236                         };
237                         conf_ld17_0 {
238                                 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
239                                         "ld23_22";
240                                 nvidia,pull = <1>;
241                         };
242                         drive_sdio1 {
243                                 nvidia,pins = "drive_sdio1";
244                                 nvidia,high-speed-mode = <0>;
245                                 nvidia,schmitt = <0>;
246                                 nvidia,low-power-mode = <3>;
247                                 nvidia,pull-down-strength = <31>;
248                                 nvidia,pull-up-strength = <31>;
249                                 nvidia,slew-rate-rising = <3>;
250                                 nvidia,slew-rate-falling = <3>;
251                         };
252                 };
253
254                 state_i2cmux_ddc: pinmux_i2cmux_ddc {
255                         ddc {
256                                 nvidia,pins = "ddc";
257                                 nvidia,function = "i2c2";
258                         };
259                         pta {
260                                 nvidia,pins = "pta";
261                                 nvidia,function = "rsvd4";
262                         };
263                 };
264
265                 state_i2cmux_pta: pinmux_i2cmux_pta {
266                         ddc {
267                                 nvidia,pins = "ddc";
268                                 nvidia,function = "rsvd4";
269                         };
270                         pta {
271                                 nvidia,pins = "pta";
272                                 nvidia,function = "i2c2";
273                         };
274                 };
275
276                 state_i2cmux_idle: pinmux_i2cmux_idle {
277                         ddc {
278                                 nvidia,pins = "ddc";
279                                 nvidia,function = "rsvd4";
280                         };
281                         pta {
282                                 nvidia,pins = "pta";
283                                 nvidia,function = "rsvd4";
284                         };
285                 };
286         };
287
288         i2s@70002800 {
289                 status = "okay";
290         };
291
292         serial@70006300 {
293                 status = "okay";
294                 clock-frequency = <216000000>;
295         };
296
297         i2c@7000c000 {
298                 status = "okay";
299                 clock-frequency = <400000>;
300
301                 wm8903: wm8903@1a {
302                         compatible = "wlf,wm8903";
303                         reg = <0x1a>;
304                         interrupt-parent = <&gpio>;
305                         interrupts = <187 0x04>;
306
307                         gpio-controller;
308                         #gpio-cells = <2>;
309
310                         micdet-cfg = <0>;
311                         micdet-delay = <100>;
312                         gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
313                 };
314
315                 /* ALS and proximity sensor */
316                 isl29018@44 {
317                         compatible = "isil,isl29018";
318                         reg = <0x44>;
319                         interrupt-parent = <&gpio>;
320                         interrupts = <202 0x04>; /* GPIO PZ2 */
321                 };
322
323                 gyrometer@68 {
324                         compatible = "invn,mpu3050";
325                         reg = <0x68>;
326                         interrupt-parent = <&gpio>;
327                         interrupts = <204 0x04>; /* gpio PZ4 */
328                 };
329         };
330
331         i2c@7000c400 {
332                 status = "okay";
333                 clock-frequency = <100000>;
334         };
335
336         i2cmux {
337                 compatible = "i2c-mux-pinctrl";
338                 #address-cells = <1>;
339                 #size-cells = <0>;
340
341                 i2c-parent = <&{/i2c@7000c400}>;
342
343                 pinctrl-names = "ddc", "pta", "idle";
344                 pinctrl-0 = <&state_i2cmux_ddc>;
345                 pinctrl-1 = <&state_i2cmux_pta>;
346                 pinctrl-2 = <&state_i2cmux_idle>;
347
348                 i2c@0 {
349                         reg = <0>;
350                         #address-cells = <1>;
351                         #size-cells = <0>;
352                 };
353
354                 i2c@1 {
355                         reg = <1>;
356                         #address-cells = <1>;
357                         #size-cells = <0>;
358
359                         smart-battery@b {
360                                 compatible = "ti,bq20z75", "smart-battery-1.1";
361                                 reg = <0xb>;
362                                 ti,i2c-retry-count = <2>;
363                                 ti,poll-retry-count = <10>;
364                         };
365                 };
366         };
367
368         i2c@7000c500 {
369                 status = "okay";
370                 clock-frequency = <400000>;
371         };
372
373         i2c@7000d000 {
374                 status = "okay";
375                 clock-frequency = <400000>;
376
377                 pmic: tps6586x@34 {
378                         compatible = "ti,tps6586x";
379                         reg = <0x34>;
380                         interrupts = <0 86 0x4>;
381
382                         ti,system-power-controller;
383
384                         #gpio-cells = <2>;
385                         gpio-controller;
386
387                         sys-supply = <&vdd_5v0_reg>;
388                         vin-sm0-supply = <&sys_reg>;
389                         vin-sm1-supply = <&sys_reg>;
390                         vin-sm2-supply = <&sys_reg>;
391                         vinldo01-supply = <&sm2_reg>;
392                         vinldo23-supply = <&sm2_reg>;
393                         vinldo4-supply = <&sm2_reg>;
394                         vinldo678-supply = <&sm2_reg>;
395                         vinldo9-supply = <&sm2_reg>;
396
397                         regulators {
398                                 #address-cells = <1>;
399                                 #size-cells = <0>;
400
401                                 sys_reg: regulator@0 {
402                                         reg = <0>;
403                                         regulator-compatible = "sys";
404                                         regulator-name = "vdd_sys";
405                                         regulator-always-on;
406                                 };
407
408                                 regulator@1 {
409                                         reg = <1>;
410                                         regulator-compatible = "sm0";
411                                         regulator-name = "vdd_sm0,vdd_core";
412                                         regulator-min-microvolt = <1300000>;
413                                         regulator-max-microvolt = <1300000>;
414                                         regulator-always-on;
415                                 };
416
417                                 regulator@2 {
418                                         reg = <2>;
419                                         regulator-compatible = "sm1";
420                                         regulator-name = "vdd_sm1,vdd_cpu";
421                                         regulator-min-microvolt = <1125000>;
422                                         regulator-max-microvolt = <1125000>;
423                                         regulator-always-on;
424                                 };
425
426                                 sm2_reg: regulator@3 {
427                                         reg = <3>;
428                                         regulator-compatible = "sm2";
429                                         regulator-name = "vdd_sm2,vin_ldo*";
430                                         regulator-min-microvolt = <3700000>;
431                                         regulator-max-microvolt = <3700000>;
432                                         regulator-always-on;
433                                 };
434
435                                 /* LDO0 is not connected to anything */
436
437                                 regulator@5 {
438                                         reg = <5>;
439                                         regulator-compatible = "ldo1";
440                                         regulator-name = "vdd_ldo1,avdd_pll*";
441                                         regulator-min-microvolt = <1100000>;
442                                         regulator-max-microvolt = <1100000>;
443                                         regulator-always-on;
444                                 };
445
446                                 regulator@6 {
447                                         reg = <6>;
448                                         regulator-compatible = "ldo2";
449                                         regulator-name = "vdd_ldo2,vdd_rtc";
450                                         regulator-min-microvolt = <1200000>;
451                                         regulator-max-microvolt = <1200000>;
452                                 };
453
454                                 regulator@7 {
455                                         reg = <7>;
456                                         regulator-compatible = "ldo3";
457                                         regulator-name = "vdd_ldo3,avdd_usb*";
458                                         regulator-min-microvolt = <3300000>;
459                                         regulator-max-microvolt = <3300000>;
460                                         regulator-always-on;
461                                 };
462
463                                 regulator@8 {
464                                         reg = <8>;
465                                         regulator-compatible = "ldo4";
466                                         regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
467                                         regulator-min-microvolt = <1800000>;
468                                         regulator-max-microvolt = <1800000>;
469                                         regulator-always-on;
470                                 };
471
472                                 regulator@9 {
473                                         reg = <9>;
474                                         regulator-compatible = "ldo5";
475                                         regulator-name = "vdd_ldo5,vcore_mmc";
476                                         regulator-min-microvolt = <2850000>;
477                                         regulator-max-microvolt = <2850000>;
478                                         regulator-always-on;
479                                 };
480
481                                 regulator@10 {
482                                         reg = <10>;
483                                         regulator-compatible = "ldo6";
484                                         regulator-name = "vdd_ldo6,avdd_vdac,vddio_vi,vddio_cam";
485                                         regulator-min-microvolt = <1800000>;
486                                         regulator-max-microvolt = <1800000>;
487                                 };
488
489                                 regulator@11 {
490                                         reg = <11>;
491                                         regulator-compatible = "ldo7";
492                                         regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";
493                                         regulator-min-microvolt = <3300000>;
494                                         regulator-max-microvolt = <3300000>;
495                                 };
496
497                                 regulator@12 {
498                                         reg = <12>;
499                                         regulator-compatible = "ldo8";
500                                         regulator-name = "vdd_ldo8,avdd_hdmi_pll";
501                                         regulator-min-microvolt = <1800000>;
502                                         regulator-max-microvolt = <1800000>;
503                                 };
504
505                                 regulator@13 {
506                                         reg = <13>;
507                                         regulator-compatible = "ldo9";
508                                         regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
509                                         regulator-min-microvolt = <2850000>;
510                                         regulator-max-microvolt = <2850000>;
511                                         regulator-always-on;
512                                 };
513
514                                 regulator@14 {
515                                         reg = <14>;
516                                         regulator-compatible = "ldo_rtc";
517                                         regulator-name = "vdd_rtc_out,vdd_cell";
518                                         regulator-min-microvolt = <3300000>;
519                                         regulator-max-microvolt = <3300000>;
520                                         regulator-always-on;
521                                 };
522                         };
523                 };
524
525                 temperature-sensor@4c {
526                         compatible = "nct1008";
527                         reg = <0x4c>;
528                 };
529
530                 magnetometer@c {
531                         compatible = "ak8975";
532                         reg = <0xc>;
533                         interrupt-parent = <&gpio>;
534                         interrupts = <109 0x04>; /* gpio PN5 */
535                 };
536         };
537
538         pmc {
539                 nvidia,invert-interrupt;
540         };
541
542         memory-controller@7000f400 {
543                 emc-table@190000 {
544                         reg = <190000>;
545                         compatible = "nvidia,tegra20-emc-table";
546                         clock-frequency = <190000>;
547                         nvidia,emc-registers = <0x0000000c 0x00000026
548                                 0x00000009 0x00000003 0x00000004 0x00000004
549                                 0x00000002 0x0000000c 0x00000003 0x00000003
550                                 0x00000002 0x00000001 0x00000004 0x00000005
551                                 0x00000004 0x00000009 0x0000000d 0x0000059f
552                                 0x00000000 0x00000003 0x00000003 0x00000003
553                                 0x00000003 0x00000001 0x0000000b 0x000000c8
554                                 0x00000003 0x00000007 0x00000004 0x0000000f
555                                 0x00000002 0x00000000 0x00000000 0x00000002
556                                 0x00000000 0x00000000 0x00000083 0xa06204ae
557                                 0x007dc010 0x00000000 0x00000000 0x00000000
558                                 0x00000000 0x00000000 0x00000000 0x00000000>;
559                 };
560
561                 emc-table@380000 {
562                         reg = <380000>;
563                         compatible = "nvidia,tegra20-emc-table";
564                         clock-frequency = <380000>;
565                         nvidia,emc-registers = <0x00000017 0x0000004b
566                                 0x00000012 0x00000006 0x00000004 0x00000005
567                                 0x00000003 0x0000000c 0x00000006 0x00000006
568                                 0x00000003 0x00000001 0x00000004 0x00000005
569                                 0x00000004 0x00000009 0x0000000d 0x00000b5f
570                                 0x00000000 0x00000003 0x00000003 0x00000006
571                                 0x00000006 0x00000001 0x00000011 0x000000c8
572                                 0x00000003 0x0000000e 0x00000007 0x0000000f
573                                 0x00000002 0x00000000 0x00000000 0x00000002
574                                 0x00000000 0x00000000 0x00000083 0xe044048b
575                                 0x007d8010 0x00000000 0x00000000 0x00000000
576                                 0x00000000 0x00000000 0x00000000 0x00000000>;
577                 };
578         };
579
580         usb@c5000000 {
581                 status = "okay";
582                 nvidia,vbus-gpio = <&gpio 24 0>; /* PD0 */
583                 dr_mode = "otg";
584         };
585
586         usb@c5004000 {
587                 status = "okay";
588                 nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
589         };
590
591         usb@c5008000 {
592                 status = "okay";
593         };
594
595         sdhci@c8000400 {
596                 status = "okay";
597                 cd-gpios = <&gpio 69 0>; /* gpio PI5 */
598                 wp-gpios = <&gpio 57 0>; /* gpio PH1 */
599                 power-gpios = <&gpio 70 0>; /* gpio PI6 */
600                 bus-width = <4>;
601         };
602
603         sdhci@c8000600 {
604                 status = "okay";
605                 bus-width = <8>;
606         };
607
608         gpio-keys {
609                 compatible = "gpio-keys";
610
611                 power {
612                         label = "Power";
613                         gpios = <&gpio 170 1>; /* gpio PV2, active low */
614                         linux,code = <116>; /* KEY_POWER */
615                         gpio-key,wakeup;
616                 };
617
618                 lid {
619                         label = "Lid";
620                         gpios = <&gpio 23 0>; /* gpio PC7 */
621                         linux,input-type = <5>; /* EV_SW */
622                         linux,code = <0>; /* SW_LID */
623                         debounce-interval = <1>;
624                         gpio-key,wakeup;
625                 };
626         };
627
628         regulators {
629                 compatible = "simple-bus";
630                 #address-cells = <1>;
631                 #size-cells = <0>;
632
633                 vdd_5v0_reg: regulator@0 {
634                         compatible = "regulator-fixed";
635                         reg = <0>;
636                         regulator-name = "vdd_5v0";
637                         regulator-min-microvolt = <5000000>;
638                         regulator-max-microvolt = <5000000>;
639                         regulator-always-on;
640                 };
641
642                 regulator@1 {
643                         compatible = "regulator-fixed";
644                         reg = <1>;
645                         regulator-name = "vdd_1v5";
646                         regulator-min-microvolt = <1500000>;
647                         regulator-max-microvolt = <1500000>;
648                         gpio = <&pmic 0 0>;
649                 };
650
651                 regulator@2 {
652                         compatible = "regulator-fixed";
653                         reg = <2>;
654                         regulator-name = "vdd_1v2";
655                         regulator-min-microvolt = <1200000>;
656                         regulator-max-microvolt = <1200000>;
657                         gpio = <&pmic 1 0>;
658                         enable-active-high;
659                 };
660         };
661
662         sound {
663                 compatible = "nvidia,tegra-audio-wm8903-seaboard",
664                              "nvidia,tegra-audio-wm8903";
665                 nvidia,model = "NVIDIA Tegra Seaboard";
666
667                 nvidia,audio-routing =
668                         "Headphone Jack", "HPOUTR",
669                         "Headphone Jack", "HPOUTL",
670                         "Int Spk", "ROP",
671                         "Int Spk", "RON",
672                         "Int Spk", "LOP",
673                         "Int Spk", "LON",
674                         "Mic Jack", "MICBIAS",
675                         "IN1R", "Mic Jack";
676
677                 nvidia,i2s-controller = <&tegra_i2s1>;
678                 nvidia,audio-codec = <&wm8903>;
679
680                 nvidia,spkr-en-gpios = <&wm8903 2 0>;
681                 nvidia,hp-det-gpios = <&gpio 185 0>; /* gpio PX1 */
682         };
683 };