arch/arm/boot/dts/stm32mp157-pinctrl.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
   2 /*
   3  * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
   4  * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
   5  */
   6 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
   7
   8 / {
   9         soc {
  10                 pinctrl: pin-controller@50002000 {
  11                         #address-cells = <1>;
  12                         #size-cells = <1>;
  13                         compatible = "st,stm32mp157-pinctrl";
  14                         ranges = <0 0x50002000 0xa400>;
  15                         interrupt-parent = <&exti>;
  16                         st,syscfg = <&exti 0x60 0xff>;
  17                         pins-are-numbered;
  18
  19                         gpioa: gpio@50002000 {
  20                                 gpio-controller;
  21                                 #gpio-cells = <2>;
  22                                 interrupt-controller;
  23                                 #interrupt-cells = <2>;
  24                                 reg = <0x0 0x400>;
  25                                 clocks = <&rcc GPIOA>;
  26                                 st,bank-name = "GPIOA";
  27                                 status = "disabled";
  28                         };
  29
  30                         gpiob: gpio@50003000 {
  31                                 gpio-controller;
  32                                 #gpio-cells = <2>;
  33                                 interrupt-controller;
  34                                 #interrupt-cells = <2>;
  35                                 reg = <0x1000 0x400>;
  36                                 clocks = <&rcc GPIOB>;
  37                                 st,bank-name = "GPIOB";
  38                                 status = "disabled";
  39                         };
  40
  41                         gpioc: gpio@50004000 {
  42                                 gpio-controller;
  43                                 #gpio-cells = <2>;
  44                                 interrupt-controller;
  45                                 #interrupt-cells = <2>;
  46                                 reg = <0x2000 0x400>;
  47                                 clocks = <&rcc GPIOC>;
  48                                 st,bank-name = "GPIOC";
  49                                 status = "disabled";
  50                         };
  51
  52                         gpiod: gpio@50005000 {
  53                                 gpio-controller;
  54                                 #gpio-cells = <2>;
  55                                 interrupt-controller;
  56                                 #interrupt-cells = <2>;
  57                                 reg = <0x3000 0x400>;
  58                                 clocks = <&rcc GPIOD>;
  59                                 st,bank-name = "GPIOD";
  60                                 status = "disabled";
  61                         };
  62
  63                         gpioe: gpio@50006000 {
  64                                 gpio-controller;
  65                                 #gpio-cells = <2>;
  66                                 interrupt-controller;
  67                                 #interrupt-cells = <2>;
  68                                 reg = <0x4000 0x400>;
  69                                 clocks = <&rcc GPIOE>;
  70                                 st,bank-name = "GPIOE";
  71                                 status = "disabled";
  72                         };
  73
  74                         gpiof: gpio@50007000 {
  75                                 gpio-controller;
  76                                 #gpio-cells = <2>;
  77                                 interrupt-controller;
  78                                 #interrupt-cells = <2>;
  79                                 reg = <0x5000 0x400>;
  80                                 clocks = <&rcc GPIOF>;
  81                                 st,bank-name = "GPIOF";
  82                                 status = "disabled";
  83                         };
  84
  85                         gpiog: gpio@50008000 {
  86                                 gpio-controller;
  87                                 #gpio-cells = <2>;
  88                                 interrupt-controller;
  89                                 #interrupt-cells = <2>;
  90                                 reg = <0x6000 0x400>;
  91                                 clocks = <&rcc GPIOG>;
  92                                 st,bank-name = "GPIOG";
  93                                 status = "disabled";
  94                         };
  95
  96                         gpioh: gpio@50009000 {
  97                                 gpio-controller;
  98                                 #gpio-cells = <2>;
  99                                 interrupt-controller;
 100                                 #interrupt-cells = <2>;
 101                                 reg = <0x7000 0x400>;
 102                                 clocks = <&rcc GPIOH>;
 103                                 st,bank-name = "GPIOH";
 104                                 status = "disabled";
 105                         };
 106
 107                         gpioi: gpio@5000a000 {
 108                                 gpio-controller;
 109                                 #gpio-cells = <2>;
 110                                 interrupt-controller;
 111                                 #interrupt-cells = <2>;
 112                                 reg = <0x8000 0x400>;
 113                                 clocks = <&rcc GPIOI>;
 114                                 st,bank-name = "GPIOI";
 115                                 status = "disabled";
 116                         };
 117
 118                         gpioj: gpio@5000b000 {
 119                                 gpio-controller;
 120                                 #gpio-cells = <2>;
 121                                 interrupt-controller;
 122                                 #interrupt-cells = <2>;
 123                                 reg = <0x9000 0x400>;
 124                                 clocks = <&rcc GPIOJ>;
 125                                 st,bank-name = "GPIOJ";
 126                                 status = "disabled";
 127                         };
 128
 129                         gpiok: gpio@5000c000 {
 130                                 gpio-controller;
 131                                 #gpio-cells = <2>;
 132                                 interrupt-controller;
 133                                 #interrupt-cells = <2>;
 134                                 reg = <0xa000 0x400>;
 135                                 clocks = <&rcc GPIOK>;
 136                                 st,bank-name = "GPIOK";
 137                                 status = "disabled";
 138                         };
 139
 140                         cec_pins_a: cec-0 {
 141                                 pins {
 142                                         pinmux = <STM32_PINMUX('A', 15, AF4)>;
 143                                         bias-disable;
 144                                         drive-open-drain;
 145                                         slew-rate = <0>;
 146                                 };
 147                         };
 148
 149                         cec_pins_sleep_a: cec-sleep-0 {
 150                                 pins {
 151                                         pinmux = <STM32_PINMUX('A', 15, ANALOG)>; /* HDMI_CEC */
 152                                 };
 153                         };
 154
 155                         cec_pins_b: cec-1 {
 156                                 pins {
 157                                         pinmux = <STM32_PINMUX('B', 6, AF5)>;
 158                                         bias-disable;
 159                                         drive-open-drain;
 160                                         slew-rate = <0>;
 161                                 };
 162                         };
 163
 164                         cec_pins_sleep_b: cec-sleep-1 {
 165                                 pins {
 166                                         pinmux = <STM32_PINMUX('B', 6, ANALOG)>; /* HDMI_CEC */
 167                                 };
 168                         };
 169
 170                         dcmi_pins_a: dcmi-0 {
 171                                 pins {
 172                                         pinmux = <STM32_PINMUX('H', 8,  AF13)>,/* DCMI_HSYNC */
 173                                                  <STM32_PINMUX('B', 7,  AF13)>,/* DCMI_VSYNC */
 174                                                  <STM32_PINMUX('A', 6,  AF13)>,/* DCMI_PIXCLK */
 175                                                  <STM32_PINMUX('H', 9,  AF13)>,/* DCMI_D0 */
 176                                                  <STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */
 177                                                  <STM32_PINMUX('H', 11, AF13)>,/* DCMI_D2 */
 178                                                  <STM32_PINMUX('H', 12, AF13)>,/* DCMI_D3 */
 179                                                  <STM32_PINMUX('H', 14, AF13)>,/* DCMI_D4 */
 180                                                  <STM32_PINMUX('I', 4,  AF13)>,/* DCMI_D5 */
 181                                                  <STM32_PINMUX('B', 8,  AF13)>,/* DCMI_D6 */
 182                                                  <STM32_PINMUX('E', 6,  AF13)>,/* DCMI_D7 */
 183                                                  <STM32_PINMUX('I', 1,  AF13)>,/* DCMI_D8 */
 184                                                  <STM32_PINMUX('H', 7,  AF13)>,/* DCMI_D9 */
 185                                                  <STM32_PINMUX('I', 3,  AF13)>,/* DCMI_D10 */
 186                                                  <STM32_PINMUX('H', 15, AF13)>;/* DCMI_D11 */
 187                                         bias-disable;
 188                                 };
 189                         };
 190
 191                         dcmi_sleep_pins_a: dcmi-sleep-0 {
 192                                 pins {
 193                                         pinmux = <STM32_PINMUX('H', 8,  ANALOG)>,/* DCMI_HSYNC */
 194                                                  <STM32_PINMUX('B', 7,  ANALOG)>,/* DCMI_VSYNC */
 195                                                  <STM32_PINMUX('A', 6,  ANALOG)>,/* DCMI_PIXCLK */
 196                                                  <STM32_PINMUX('H', 9,  ANALOG)>,/* DCMI_D0 */
 197                                                  <STM32_PINMUX('H', 10, ANALOG)>,/* DCMI_D1 */
 198                                                  <STM32_PINMUX('H', 11, ANALOG)>,/* DCMI_D2 */
 199                                                  <STM32_PINMUX('H', 12, ANALOG)>,/* DCMI_D3 */
 200                                                  <STM32_PINMUX('H', 14, ANALOG)>,/* DCMI_D4 */
 201                                                  <STM32_PINMUX('I', 4,  ANALOG)>,/* DCMI_D5 */
 202                                                  <STM32_PINMUX('B', 8,  ANALOG)>,/* DCMI_D6 */
 203                                                  <STM32_PINMUX('E', 6,  ANALOG)>,/* DCMI_D7 */
 204                                                  <STM32_PINMUX('I', 1,  ANALOG)>,/* DCMI_D8 */
 205                                                  <STM32_PINMUX('H', 7,  ANALOG)>,/* DCMI_D9 */
 206                                                  <STM32_PINMUX('I', 3,  ANALOG)>,/* DCMI_D10 */
 207                                                  <STM32_PINMUX('H', 15, ANALOG)>;/* DCMI_D11 */
 208                                 };
 209                         };
 210
 211                         ethernet0_rgmii_pins_a: rgmii-0 {
 212                                 pins1 {
 213                                         pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
 214                                                  <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
 215                                                  <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
 216                                                  <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
 217                                                  <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
 218                                                  <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
 219                                                  <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */
 220                                                  <STM32_PINMUX('A', 2, AF11)>, /* ETH_MDIO */
 221                                                  <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
 222                                         bias-disable;
 223                                         drive-push-pull;
 224                                         slew-rate = <3>;
 225                                 };
 226                                 pins2 {
 227                                         pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
 228                                                  <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
 229                                                  <STM32_PINMUX('B', 0, AF11)>, /* ETH_RGMII_RXD2 */
 230                                                  <STM32_PINMUX('B', 1, AF11)>, /* ETH_RGMII_RXD3 */
 231                                                  <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
 232                                                  <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
 233                                         bias-disable;
 234                                 };
 235                         };
 236
 237                         ethernet0_rgmii_pins_sleep_a: rgmii-sleep-0 {
 238                                 pins1 {
 239                                         pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
 240                                                  <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
 241                                                  <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */
 242                                                  <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
 243                                                  <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
 244                                                  <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
 245                                                  <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
 246                                                  <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
 247                                                  <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */
 248                                                  <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
 249                                                  <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
 250                                                  <STM32_PINMUX('B', 0, ANALOG)>, /* ETH_RGMII_RXD2 */
 251                                                  <STM32_PINMUX('B', 1, ANALOG)>, /* ETH_RGMII_RXD3 */
 252                                                  <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
 253                                                  <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
 254                                 };
 255                         };
 256
 257                         fmc_pins_a: fmc-0 {
 258                                 pins1 {
 259                                         pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */
 260                                                  <STM32_PINMUX('D', 5, AF12)>, /* FMC_NWE */
 261                                                  <STM32_PINMUX('D', 11, AF12)>, /* FMC_A16_FMC_CLE */
 262                                                  <STM32_PINMUX('D', 12, AF12)>, /* FMC_A17_FMC_ALE */
 263                                                  <STM32_PINMUX('D', 14, AF12)>, /* FMC_D0 */
 264                                                  <STM32_PINMUX('D', 15, AF12)>, /* FMC_D1 */
 265                                                  <STM32_PINMUX('D', 0, AF12)>, /* FMC_D2 */
 266                                                  <STM32_PINMUX('D', 1, AF12)>, /* FMC_D3 */
 267                                                  <STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */
 268                                                  <STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */
 269                                                  <STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */
 270                                                  <STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */
 271                                                  <STM32_PINMUX('G', 9, AF12)>; /* FMC_NE2_FMC_NCE */
 272                                         bias-disable;
 273                                         drive-push-pull;
 274                                         slew-rate = <1>;
 275                                 };
 276                                 pins2 {
 277                                         pinmux = <STM32_PINMUX('D', 6, AF12)>; /* FMC_NWAIT */
 278                                         bias-pull-up;
 279                                 };
 280                         };
 281
 282                         fmc_sleep_pins_a: fmc-sleep-0 {
 283                                 pins {
 284                                         pinmux = <STM32_PINMUX('D', 4, ANALOG)>, /* FMC_NOE */
 285                                                  <STM32_PINMUX('D', 5, ANALOG)>, /* FMC_NWE */
 286                                                  <STM32_PINMUX('D', 11, ANALOG)>, /* FMC_A16_FMC_CLE */
 287                                                  <STM32_PINMUX('D', 12, ANALOG)>, /* FMC_A17_FMC_ALE */
 288                                                  <STM32_PINMUX('D', 14, ANALOG)>, /* FMC_D0 */
 289                                                  <STM32_PINMUX('D', 15, ANALOG)>, /* FMC_D1 */
 290                                                  <STM32_PINMUX('D', 0, ANALOG)>, /* FMC_D2 */
 291                                                  <STM32_PINMUX('D', 1, ANALOG)>, /* FMC_D3 */
 292                                                  <STM32_PINMUX('E', 7, ANALOG)>, /* FMC_D4 */
 293                                                  <STM32_PINMUX('E', 8, ANALOG)>, /* FMC_D5 */
 294                                                  <STM32_PINMUX('E', 9, ANALOG)>, /* FMC_D6 */
 295                                                  <STM32_PINMUX('E', 10, ANALOG)>, /* FMC_D7 */
 296                                                  <STM32_PINMUX('D', 6, ANALOG)>, /* FMC_NWAIT */
 297                                                  <STM32_PINMUX('G', 9, ANALOG)>; /* FMC_NE2_FMC_NCE */
 298                                 };
 299                         };
 300
 301                         i2c1_pins_a: i2c1-0 {
 302                                 pins {
 303                                         pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */
 304                                                  <STM32_PINMUX('F', 15, AF5)>; /* I2C1_SDA */
 305                                         bias-disable;
 306                                         drive-open-drain;
 307                                         slew-rate = <0>;
 308                                 };
 309                         };
 310
 311                         i2c1_pins_sleep_a: i2c1-1 {
 312                                 pins {
 313                                         pinmux = <STM32_PINMUX('D', 12, ANALOG)>, /* I2C1_SCL */
 314                                                  <STM32_PINMUX('F', 15, ANALOG)>; /* I2C1_SDA */
 315                                 };
 316                         };
 317
 318                         i2c1_pins_b: i2c1-2 {
 319                                 pins {
 320                                         pinmux = <STM32_PINMUX('F', 14, AF5)>, /* I2C1_SCL */
 321                                                  <STM32_PINMUX('F', 15, AF5)>; /* I2C1_SDA */
 322                                         bias-disable;
 323                                         drive-open-drain;
 324                                         slew-rate = <0>;
 325                                 };
 326                         };
 327
 328                         i2c1_pins_sleep_b: i2c1-3 {
 329                                 pins {
 330                                         pinmux = <STM32_PINMUX('F', 14, ANALOG)>, /* I2C1_SCL */
 331                                                  <STM32_PINMUX('F', 15, ANALOG)>; /* I2C1_SDA */
 332                                 };
 333                         };
 334
 335                         i2c2_pins_a: i2c2-0 {
 336                                 pins {
 337                                         pinmux = <STM32_PINMUX('H', 4, AF4)>, /* I2C2_SCL */
 338                                                  <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
 339                                         bias-disable;
 340                                         drive-open-drain;
 341                                         slew-rate = <0>;
 342                                 };
 343                         };
 344
 345                         i2c2_pins_sleep_a: i2c2-1 {
 346                                 pins {
 347                                         pinmux = <STM32_PINMUX('H', 4, ANALOG)>, /* I2C2_SCL */
 348                                                  <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
 349                                 };
 350                         };
 351
 352                         i2c2_pins_b1: i2c2-2 {
 353                                 pins {
 354                                         pinmux = <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
 355                                         bias-disable;
 356                                         drive-open-drain;
 357                                         slew-rate = <0>;
 358                                 };
 359                         };
 360
 361                         i2c2_pins_sleep_b1: i2c2-3 {
 362                                 pins {
 363                                         pinmux = <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
 364                                 };
 365                         };
 366
 367                         i2c5_pins_a: i2c5-0 {
 368                                 pins {
 369                                         pinmux = <STM32_PINMUX('A', 11, AF4)>, /* I2C5_SCL */
 370                                                  <STM32_PINMUX('A', 12, AF4)>; /* I2C5_SDA */
 371                                         bias-disable;
 372                                         drive-open-drain;
 373                                         slew-rate = <0>;
 374                                 };
 375                         };
 376
 377                         i2c5_pins_sleep_a: i2c5-1 {
 378                                 pins {
 379                                         pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* I2C5_SCL */
 380                                                  <STM32_PINMUX('A', 12, ANALOG)>; /* I2C5_SDA */
 381
 382                                 };
 383                         };
 384
 385                         i2s2_pins_a: i2s2-0 {
 386                                 pins {
 387                                         pinmux = <STM32_PINMUX('I', 3, AF5)>, /* I2S2_SDO */
 388                                                  <STM32_PINMUX('B', 9, AF5)>, /* I2S2_WS */
 389                                                  <STM32_PINMUX('A', 9, AF5)>; /* I2S2_CK */
 390                                         slew-rate = <1>;
 391                                         drive-push-pull;
 392                                         bias-disable;
 393                                 };
 394                         };
 395
 396                         i2s2_pins_sleep_a: i2s2-1 {
 397                                 pins {
 398                                         pinmux = <STM32_PINMUX('I', 3, ANALOG)>, /* I2S2_SDO */
 399                                                  <STM32_PINMUX('B', 9, ANALOG)>, /* I2S2_WS */
 400                                                  <STM32_PINMUX('A', 9, ANALOG)>; /* I2S2_CK */
 401                                 };
 402                         };
 403
 404                         ltdc_pins_a: ltdc-a-0 {
 405                                 pins {
 406                                         pinmux = <STM32_PINMUX('G',  7, AF14)>, /* LCD_CLK */
 407                                                  <STM32_PINMUX('I', 10, AF14)>, /* LCD_HSYNC */
 408                                                  <STM32_PINMUX('I',  9, AF14)>, /* LCD_VSYNC */
 409                                                  <STM32_PINMUX('F', 10, AF14)>, /* LCD_DE */
 410                                                  <STM32_PINMUX('H',  2, AF14)>, /* LCD_R0 */
 411                                                  <STM32_PINMUX('H',  3, AF14)>, /* LCD_R1 */
 412                                                  <STM32_PINMUX('H',  8, AF14)>, /* LCD_R2 */
 413                                                  <STM32_PINMUX('H',  9, AF14)>, /* LCD_R3 */
 414                                                  <STM32_PINMUX('H', 10, AF14)>, /* LCD_R4 */
 415                                                  <STM32_PINMUX('C',  0, AF14)>, /* LCD_R5 */
 416                                                  <STM32_PINMUX('H', 12, AF14)>, /* LCD_R6 */
 417                                                  <STM32_PINMUX('E', 15, AF14)>, /* LCD_R7 */
 418                                                  <STM32_PINMUX('E',  5, AF14)>, /* LCD_G0 */
 419                                                  <STM32_PINMUX('E',  6, AF14)>, /* LCD_G1 */
 420                                                  <STM32_PINMUX('H', 13, AF14)>, /* LCD_G2 */
 421                                                  <STM32_PINMUX('H', 14, AF14)>, /* LCD_G3 */
 422                                                  <STM32_PINMUX('H', 15, AF14)>, /* LCD_G4 */
 423                                                  <STM32_PINMUX('I',  0, AF14)>, /* LCD_G5 */
 424                                                  <STM32_PINMUX('I',  1, AF14)>, /* LCD_G6 */
 425                                                  <STM32_PINMUX('I',  2, AF14)>, /* LCD_G7 */
 426                                                  <STM32_PINMUX('D',  9, AF14)>, /* LCD_B0 */
 427                                                  <STM32_PINMUX('G', 12, AF14)>, /* LCD_B1 */
 428                                                  <STM32_PINMUX('G', 10, AF14)>, /* LCD_B2 */
 429                                                  <STM32_PINMUX('D', 10, AF14)>, /* LCD_B3 */
 430                                                  <STM32_PINMUX('I',  4, AF14)>, /* LCD_B4 */
 431                                                  <STM32_PINMUX('A',  3, AF14)>, /* LCD_B5 */
 432                                                  <STM32_PINMUX('B',  8, AF14)>, /* LCD_B6 */
 433                                                  <STM32_PINMUX('D',  8, AF14)>; /* LCD_B7 */
 434                                         bias-disable;
 435                                         drive-push-pull;
 436                                         slew-rate = <1>;
 437                                 };
 438                         };
 439
 440                         ltdc_pins_sleep_a: ltdc-a-1 {
 441                                 pins {
 442                                         pinmux = <STM32_PINMUX('G',  7, ANALOG)>, /* LCD_CLK */
 443                                                  <STM32_PINMUX('I', 10, ANALOG)>, /* LCD_HSYNC */
 444                                                  <STM32_PINMUX('I',  9, ANALOG)>, /* LCD_VSYNC */
 445                                                  <STM32_PINMUX('F', 10, ANALOG)>, /* LCD_DE */
 446                                                  <STM32_PINMUX('H',  2, ANALOG)>, /* LCD_R0 */
 447                                                  <STM32_PINMUX('H',  3, ANALOG)>, /* LCD_R1 */
 448                                                  <STM32_PINMUX('H',  8, ANALOG)>, /* LCD_R2 */
 449                                                  <STM32_PINMUX('H',  9, ANALOG)>, /* LCD_R3 */
 450                                                  <STM32_PINMUX('H', 10, ANALOG)>, /* LCD_R4 */
 451                                                  <STM32_PINMUX('C',  0, ANALOG)>, /* LCD_R5 */
 452                                                  <STM32_PINMUX('H', 12, ANALOG)>, /* LCD_R6 */
 453                                                  <STM32_PINMUX('E', 15, ANALOG)>, /* LCD_R7 */
 454                                                  <STM32_PINMUX('E',  5, ANALOG)>, /* LCD_G0 */
 455                                                  <STM32_PINMUX('E',  6, ANALOG)>, /* LCD_G1 */
 456                                                  <STM32_PINMUX('H', 13, ANALOG)>, /* LCD_G2 */
 457                                                  <STM32_PINMUX('H', 14, ANALOG)>, /* LCD_G3 */
 458                                                  <STM32_PINMUX('H', 15, ANALOG)>, /* LCD_G4 */
 459                                                  <STM32_PINMUX('I',  0, ANALOG)>, /* LCD_G5 */
 460                                                  <STM32_PINMUX('I',  1, ANALOG)>, /* LCD_G6 */
 461                                                  <STM32_PINMUX('I',  2, ANALOG)>, /* LCD_G7 */
 462                                                  <STM32_PINMUX('D',  9, ANALOG)>, /* LCD_B0 */
 463                                                  <STM32_PINMUX('G', 12, ANALOG)>, /* LCD_B1 */
 464                                                  <STM32_PINMUX('G', 10, ANALOG)>, /* LCD_B2 */
 465                                                  <STM32_PINMUX('D', 10, ANALOG)>, /* LCD_B3 */
 466                                                  <STM32_PINMUX('I',  4, ANALOG)>, /* LCD_B4 */
 467                                                  <STM32_PINMUX('A',  3, ANALOG)>, /* LCD_B5 */
 468                                                  <STM32_PINMUX('B',  8, ANALOG)>, /* LCD_B6 */
 469                                                  <STM32_PINMUX('D',  8, ANALOG)>; /* LCD_B7 */
 470                                 };
 471                         };
 472
 473                         ltdc_pins_b: ltdc-b-0 {
 474                                 pins {
 475                                         pinmux = <STM32_PINMUX('I', 14, AF14)>, /* LCD_CLK */
 476                                                  <STM32_PINMUX('I', 12, AF14)>, /* LCD_HSYNC */
 477                                                  <STM32_PINMUX('I', 13, AF14)>, /* LCD_VSYNC */
 478                                                  <STM32_PINMUX('K',  7, AF14)>, /* LCD_DE */
 479                                                  <STM32_PINMUX('I', 15, AF14)>, /* LCD_R0 */
 480                                                  <STM32_PINMUX('J',  0, AF14)>, /* LCD_R1 */
 481                                                  <STM32_PINMUX('J',  1, AF14)>, /* LCD_R2 */
 482                                                  <STM32_PINMUX('J',  2, AF14)>, /* LCD_R3 */
 483                                                  <STM32_PINMUX('J',  3, AF14)>, /* LCD_R4 */
 484                                                  <STM32_PINMUX('J',  4, AF14)>, /* LCD_R5 */
 485                                                  <STM32_PINMUX('J',  5, AF14)>, /* LCD_R6 */
 486                                                  <STM32_PINMUX('J',  6, AF14)>, /* LCD_R7 */
 487                                                  <STM32_PINMUX('J',  7, AF14)>, /* LCD_G0 */
 488                                                  <STM32_PINMUX('J',  8, AF14)>, /* LCD_G1 */
 489                                                  <STM32_PINMUX('J',  9, AF14)>, /* LCD_G2 */
 490                                                  <STM32_PINMUX('J', 10, AF14)>, /* LCD_G3 */
 491                                                  <STM32_PINMUX('J', 11, AF14)>, /* LCD_G4 */
 492                                                  <STM32_PINMUX('K',  0, AF14)>, /* LCD_G5 */
 493                                                  <STM32_PINMUX('K',  1, AF14)>, /* LCD_G6 */
 494                                                  <STM32_PINMUX('K',  2, AF14)>, /* LCD_G7 */
 495                                                  <STM32_PINMUX('J', 12, AF14)>, /* LCD_B0 */
 496                                                  <STM32_PINMUX('J', 13, AF14)>, /* LCD_B1 */
 497                                                  <STM32_PINMUX('J', 14, AF14)>, /* LCD_B2 */
 498                                                  <STM32_PINMUX('J', 15, AF14)>, /* LCD_B3 */
 499                                                  <STM32_PINMUX('K',  3, AF14)>, /* LCD_B4 */
 500                                                  <STM32_PINMUX('K',  4, AF14)>, /* LCD_B5 */
 501                                                  <STM32_PINMUX('K',  5, AF14)>, /* LCD_B6 */
 502                                                  <STM32_PINMUX('K',  6, AF14)>; /* LCD_B7 */
 503                                         bias-disable;
 504                                         drive-push-pull;
 505                                         slew-rate = <1>;
 506                                 };
 507                         };
 508
 509                         ltdc_pins_sleep_b: ltdc-b-1 {
 510                                 pins {
 511                                         pinmux = <STM32_PINMUX('I', 14, ANALOG)>, /* LCD_CLK */
 512                                                  <STM32_PINMUX('I', 12, ANALOG)>, /* LCD_HSYNC */
 513                                                  <STM32_PINMUX('I', 13, ANALOG)>, /* LCD_VSYNC */
 514                                                  <STM32_PINMUX('K',  7, ANALOG)>, /* LCD_DE */
 515                                                  <STM32_PINMUX('I', 15, ANALOG)>, /* LCD_R0 */
 516                                                  <STM32_PINMUX('J',  0, ANALOG)>, /* LCD_R1 */
 517                                                  <STM32_PINMUX('J',  1, ANALOG)>, /* LCD_R2 */
 518                                                  <STM32_PINMUX('J',  2, ANALOG)>, /* LCD_R3 */
 519                                                  <STM32_PINMUX('J',  3, ANALOG)>, /* LCD_R4 */
 520                                                  <STM32_PINMUX('J',  4, ANALOG)>, /* LCD_R5 */
 521                                                  <STM32_PINMUX('J',  5, ANALOG)>, /* LCD_R6 */
 522                                                  <STM32_PINMUX('J',  6, ANALOG)>, /* LCD_R7 */
 523                                                  <STM32_PINMUX('J',  7, ANALOG)>, /* LCD_G0 */
 524                                                  <STM32_PINMUX('J',  8, ANALOG)>, /* LCD_G1 */
 525                                                  <STM32_PINMUX('J',  9, ANALOG)>, /* LCD_G2 */
 526                                                  <STM32_PINMUX('J', 10, ANALOG)>, /* LCD_G3 */
 527                                                  <STM32_PINMUX('J', 11, ANALOG)>, /* LCD_G4 */
 528                                                  <STM32_PINMUX('K',  0, ANALOG)>, /* LCD_G5 */
 529                                                  <STM32_PINMUX('K',  1, ANALOG)>, /* LCD_G6 */
 530                                                  <STM32_PINMUX('K',  2, ANALOG)>, /* LCD_G7 */
 531                                                  <STM32_PINMUX('J', 12, ANALOG)>, /* LCD_B0 */
 532                                                  <STM32_PINMUX('J', 13, ANALOG)>, /* LCD_B1 */
 533                                                  <STM32_PINMUX('J', 14, ANALOG)>, /* LCD_B2 */
 534                                                  <STM32_PINMUX('J', 15, ANALOG)>, /* LCD_B3 */
 535                                                  <STM32_PINMUX('K',  3, ANALOG)>, /* LCD_B4 */
 536                                                  <STM32_PINMUX('K',  4, ANALOG)>, /* LCD_B5 */
 537                                                  <STM32_PINMUX('K',  5, ANALOG)>, /* LCD_B6 */
 538                                                  <STM32_PINMUX('K',  6, ANALOG)>; /* LCD_B7 */
 539                                 };
 540                         };
 541
 542                         m_can1_pins_a: m-can1-0 {
 543                                 pins1 {
 544                                         pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */
 545                                         slew-rate = <1>;
 546                                         drive-push-pull;
 547                                         bias-disable;
 548                                 };
 549                                 pins2 {
 550                                         pinmux = <STM32_PINMUX('I', 9, AF9)>; /* CAN1_RX */
 551                                         bias-disable;
 552                                 };
 553                         };
 554
 555                         m_can1_sleep_pins_a: m_can1-sleep-0 {
 556                                 pins {
 557                                         pinmux = <STM32_PINMUX('H', 13, ANALOG)>, /* CAN1_TX */
 558                                                  <STM32_PINMUX('I', 9, ANALOG)>; /* CAN1_RX */
 559                                 };
 560                         };
 561
 562                         pwm2_pins_a: pwm2-0 {
 563                                 pins {
 564                                         pinmux = <STM32_PINMUX('A', 3, AF1)>; /* TIM2_CH4 */
 565                                         bias-pull-down;
 566                                         drive-push-pull;
 567                                         slew-rate = <0>;
 568                                 };
 569                         };
 570
 571                         pwm8_pins_a: pwm8-0 {
 572                                 pins {
 573                                         pinmux = <STM32_PINMUX('I', 2, AF3)>; /* TIM8_CH4 */
 574                                         bias-pull-down;
 575                                         drive-push-pull;
 576                                         slew-rate = <0>;
 577                                 };
 578                         };
 579
 580                         pwm12_pins_a: pwm12-0 {
 581                                 pins {
 582                                         pinmux = <STM32_PINMUX('H', 6, AF2)>; /* TIM12_CH1 */
 583                                         bias-pull-down;
 584                                         drive-push-pull;
 585                                         slew-rate = <0>;
 586                                 };
 587                         };
 588
 589                         qspi_clk_pins_a: qspi-clk-0 {
 590                                 pins {
 591                                         pinmux = <STM32_PINMUX('F', 10, AF9)>; /* QSPI_CLK */
 592                                         bias-disable;
 593                                         drive-push-pull;
 594                                         slew-rate = <3>;
 595                                 };
 596                         };
 597
 598                         qspi_clk_sleep_pins_a: qspi-clk-sleep-0 {
 599                                 pins {
 600                                         pinmux = <STM32_PINMUX('F', 10, ANALOG)>; /* QSPI_CLK */
 601                                 };
 602                         };
 603
 604                         qspi_bk1_pins_a: qspi-bk1-0 {
 605                                 pins1 {
 606                                         pinmux = <STM32_PINMUX('F', 8, AF10)>, /* QSPI_BK1_IO0 */
 607                                                  <STM32_PINMUX('F', 9, AF10)>, /* QSPI_BK1_IO1 */
 608                                                  <STM32_PINMUX('F', 7, AF9)>, /* QSPI_BK1_IO2 */
 609                                                  <STM32_PINMUX('F', 6, AF9)>; /* QSPI_BK1_IO3 */
 610                                         bias-disable;
 611                                         drive-push-pull;
 612                                         slew-rate = <3>;
 613                                 };
 614                                 pins2 {
 615                                         pinmux = <STM32_PINMUX('B', 6, AF10)>; /* QSPI_BK1_NCS */
 616                                         bias-pull-up;
 617                                         drive-push-pull;
 618                                         slew-rate = <3>;
 619                                 };
 620                         };
 621
 622                         qspi_bk1_sleep_pins_a: qspi-bk1-sleep-0 {
 623                                 pins {
 624                                         pinmux = <STM32_PINMUX('F', 8, ANALOG)>, /* QSPI_BK1_IO0 */
 625                                                  <STM32_PINMUX('F', 9, ANALOG)>, /* QSPI_BK1_IO1 */
 626                                                  <STM32_PINMUX('F', 7, ANALOG)>, /* QSPI_BK1_IO2 */
 627                                                  <STM32_PINMUX('F', 6, ANALOG)>, /* QSPI_BK1_IO3 */
 628                                                  <STM32_PINMUX('B', 6, ANALOG)>; /* QSPI_BK1_NCS */
 629                                 };
 630                         };
 631
 632                         qspi_bk2_pins_a: qspi-bk2-0 {
 633                                 pins1 {
 634                                         pinmux = <STM32_PINMUX('H', 2, AF9)>, /* QSPI_BK2_IO0 */
 635                                                  <STM32_PINMUX('H', 3, AF9)>, /* QSPI_BK2_IO1 */
 636                                                  <STM32_PINMUX('G', 10, AF11)>, /* QSPI_BK2_IO2 */
 637                                                  <STM32_PINMUX('G', 7, AF11)>; /* QSPI_BK2_IO3 */
 638                                         bias-disable;
 639                                         drive-push-pull;
 640                                         slew-rate = <3>;
 641                                 };
 642                                 pins2 {
 643                                         pinmux = <STM32_PINMUX('C', 0, AF10)>; /* QSPI_BK2_NCS */
 644                                         bias-pull-up;
 645                                         drive-push-pull;
 646                                         slew-rate = <3>;
 647                                 };
 648                         };
 649
 650                         qspi_bk2_sleep_pins_a: qspi-bk2-sleep-0 {
 651                                 pins {
 652                                         pinmux = <STM32_PINMUX('H', 2, ANALOG)>, /* QSPI_BK2_IO0 */
 653                                                  <STM32_PINMUX('H', 3, ANALOG)>, /* QSPI_BK2_IO1 */
 654                                                  <STM32_PINMUX('G', 10, ANALOG)>, /* QSPI_BK2_IO2 */
 655                                                  <STM32_PINMUX('G', 7, ANALOG)>, /* QSPI_BK2_IO3 */
 656                                                  <STM32_PINMUX('C', 0, ANALOG)>; /* QSPI_BK2_NCS */
 657                                 };
 658                         };
 659
 660                         sai2a_pins_a: sai2a-0 {
 661                                 pins {
 662                                         pinmux = <STM32_PINMUX('I', 5, AF10)>, /* SAI2_SCK_A */
 663                                                  <STM32_PINMUX('I', 6, AF10)>, /* SAI2_SD_A */
 664                                                  <STM32_PINMUX('I', 7, AF10)>, /* SAI2_FS_A */
 665                                                  <STM32_PINMUX('E', 0, AF10)>; /* SAI2_MCLK_A */
 666                                         slew-rate = <0>;
 667                                         drive-push-pull;
 668                                         bias-disable;
 669                                 };
 670                         };
 671
 672                         sai2a_sleep_pins_a: sai2a-1 {
 673                                 pins {
 674                                         pinmux = <STM32_PINMUX('I', 5, ANALOG)>, /* SAI2_SCK_A */
 675                                                  <STM32_PINMUX('I', 6, ANALOG)>, /* SAI2_SD_A */
 676                                                  <STM32_PINMUX('I', 7, ANALOG)>, /* SAI2_FS_A */
 677                                                  <STM32_PINMUX('E', 0, ANALOG)>; /* SAI2_MCLK_A */
 678                                 };
 679                         };
 680
 681                         sai2b_pins_a: sai2b-0 {
 682                                 pins1 {
 683                                         pinmux = <STM32_PINMUX('E', 12, AF10)>, /* SAI2_SCK_B */
 684                                                  <STM32_PINMUX('E', 13, AF10)>, /* SAI2_FS_B */
 685                                                  <STM32_PINMUX('E', 14, AF10)>; /* SAI2_MCLK_B */
 686                                         slew-rate = <0>;
 687                                         drive-push-pull;
 688                                         bias-disable;
 689                                 };
 690                                 pins2 {
 691                                         pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
 692                                         bias-disable;
 693                                 };
 694                         };
 695
 696                         sai2b_sleep_pins_a: sai2b-1 {
 697                                 pins {
 698                                         pinmux = <STM32_PINMUX('F', 11, ANALOG)>, /* SAI2_SD_B */
 699                                                  <STM32_PINMUX('E', 12, ANALOG)>, /* SAI2_SCK_B */
 700                                                  <STM32_PINMUX('E', 13, ANALOG)>, /* SAI2_FS_B */
 701                                                  <STM32_PINMUX('E', 14, ANALOG)>; /* SAI2_MCLK_B */
 702                                 };
 703                         };
 704
 705                         sai2b_pins_b: sai2b-2 {
 706                                 pins {
 707                                         pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
 708                                         bias-disable;
 709                                 };
 710                         };
 711
 712                         sai2b_sleep_pins_b: sai2b-3 {
 713                                 pins {
 714                                         pinmux = <STM32_PINMUX('F', 11, ANALOG)>; /* SAI2_SD_B */
 715                                 };
 716                         };
 717
 718                         sai4a_pins_a: sai4a-0 {
 719                                 pins {
 720                                         pinmux = <STM32_PINMUX('B', 5, AF10)>; /* SAI4_SD_A */
 721                                         slew-rate = <0>;
 722                                         drive-push-pull;
 723                                         bias-disable;
 724                                 };
 725                         };
 726
 727                         sai4a_sleep_pins_a: sai4a-1 {
 728                                 pins {
 729                                         pinmux = <STM32_PINMUX('B', 5, ANALOG)>; /* SAI4_SD_A */
 730                                 };
 731                         };
 732
 733                         sdmmc1_b4_pins_a: sdmmc1-b4-0 {
 734                                 pins {
 735                                         pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
 736                                                  <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
 737                                                  <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
 738                                                  <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
 739                                                  <STM32_PINMUX('C', 12, AF12)>, /* SDMMC1_CK */
 740                                                  <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
 741                                         slew-rate = <3>;
 742                                         drive-push-pull;
 743                                         bias-disable;
 744                                 };
 745                         };
 746
 747                         sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
 748                                 pins1 {
 749                                         pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
 750                                                  <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
 751                                                  <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
 752                                                  <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
 753                                                  <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
 754                                         slew-rate = <3>;
 755                                         drive-push-pull;
 756                                         bias-disable;
 757                                 };
 758                                 pins2{
 759                                         pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
 760                                         slew-rate = <3>;
 761                                         drive-open-drain;
 762                                         bias-disable;
 763                                 };
 764                         };
 765
 766                         sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
 767                                 pins {
 768                                         pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */
 769                                                  <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */
 770                                                  <STM32_PINMUX('C', 10, ANALOG)>, /* SDMMC1_D2 */
 771                                                  <STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */
 772                                                  <STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */
 773                                                  <STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */
 774                                 };
 775                         };
 776
 777                         sdmmc1_dir_pins_a: sdmmc1-dir-0 {
 778                                 pins1 {
 779                                         pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
 780                                                  <STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */
 781                                                  <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
 782                                         slew-rate = <3>;
 783                                         drive-push-pull;
 784                                         bias-pull-up;
 785                                 };
 786                                 pins2{
 787                                         pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
 788                                         bias-pull-up;
 789                                 };
 790                         };
 791
 792                         sdmmc1_dir_sleep_pins_a: sdmmc1-dir-sleep-0 {
 793                                 pins {
 794                                         pinmux = <STM32_PINMUX('F', 2, ANALOG)>, /* SDMMC1_D0DIR */
 795                                                  <STM32_PINMUX('C', 7, ANALOG)>, /* SDMMC1_D123DIR */
 796                                                  <STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC1_CDIR */
 797                                                  <STM32_PINMUX('E', 4, ANALOG)>; /* SDMMC1_CKIN */
 798                                 };
 799                         };
 800
 801                         spdifrx_pins_a: spdifrx-0 {
 802                                 pins {
 803                                         pinmux = <STM32_PINMUX('G', 12, AF8)>; /* SPDIF_IN1 */
 804                                         bias-disable;
 805                                 };
 806                         };
 807
 808                         spdifrx_sleep_pins_a: spdifrx-1 {
 809                                 pins {
 810                                         pinmux = <STM32_PINMUX('G', 12, ANALOG)>; /* SPDIF_IN1 */
 811                                 };
 812                         };
 813
 814                         uart4_pins_a: uart4-0 {
 815                                 pins1 {
 816                                         pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
 817                                         bias-disable;
 818                                         drive-push-pull;
 819                                         slew-rate = <0>;
 820                                 };
 821                                 pins2 {
 822                                         pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
 823                                         bias-disable;
 824                                 };
 825                         };
 826
 827                         uart4_pins_b: uart4-1 {
 828                                 pins1 {
 829                                         pinmux = <STM32_PINMUX('D', 1, AF8)>; /* UART4_TX */
 830                                         bias-disable;
 831                                         drive-push-pull;
 832                                         slew-rate = <0>;
 833                                 };
 834                                 pins2 {
 835                                         pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
 836                                         bias-disable;
 837                                 };
 838                         };
 839
 840                         uart7_pins_a: uart7-0 {
 841                                 pins1 {
 842                                         pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART4_TX */
 843                                         bias-disable;
 844                                         drive-push-pull;
 845                                         slew-rate = <0>;
 846                                 };
 847                                 pins2 {
 848                                         pinmux = <STM32_PINMUX('E', 7, AF7)>, /* UART4_RX */
 849                                                  <STM32_PINMUX('E', 10, AF7)>, /* UART4_CTS */
 850                                                  <STM32_PINMUX('E', 9, AF7)>; /* UART4_RTS */
 851                                         bias-disable;
 852                                 };
 853                         };
 854                 };
 855
 856                 pinctrl_z: pin-controller-z@54004000 {
 857                         #address-cells = <1>;
 858                         #size-cells = <1>;
 859                         compatible = "st,stm32mp157-z-pinctrl";
 860                         ranges = <0 0x54004000 0x400>;
 861                         pins-are-numbered;
 862                         interrupt-parent = <&exti>;
 863                         st,syscfg = <&exti 0x60 0xff>;
 864
 865                         gpioz: gpio@54004000 {
 866                                 gpio-controller;
 867                                 #gpio-cells = <2>;
 868                                 interrupt-controller;
 869                                 #interrupt-cells = <2>;
 870                                 reg = <0 0x400>;
 871                                 clocks = <&rcc GPIOZ>;
 872                                 st,bank-name = "GPIOZ";
 873                                 st,bank-ioport = <11>;
 874                                 status = "disabled";
 875                         };
 876
 877                         i2c2_pins_b2: i2c2-0 {
 878                                 pins {
 879                                         pinmux = <STM32_PINMUX('Z', 0, AF3)>; /* I2C2_SCL */
 880                                         bias-disable;
 881                                         drive-open-drain;
 882                                         slew-rate = <0>;
 883                                 };
 884                         };
 885
 886                         i2c2_pins_sleep_b2: i2c2-1 {
 887                                 pins {
 888                                         pinmux = <STM32_PINMUX('Z', 0, ANALOG)>; /* I2C2_SCL */
 889                                 };
 890                         };
 891
 892                         i2c4_pins_a: i2c4-0 {
 893                                 pins {
 894                                         pinmux = <STM32_PINMUX('Z', 4, AF6)>, /* I2C4_SCL */
 895                                                  <STM32_PINMUX('Z', 5, AF6)>; /* I2C4_SDA */
 896                                         bias-disable;
 897                                         drive-open-drain;
 898                                         slew-rate = <0>;
 899                                 };
 900                         };
 901
 902                         i2c4_pins_sleep_a: i2c4-1 {
 903                                 pins {
 904                                         pinmux = <STM32_PINMUX('Z', 4, ANALOG)>, /* I2C4_SCL */
 905                                                  <STM32_PINMUX('Z', 5, ANALOG)>; /* I2C4_SDA */
 906                                 };
 907                         };
 908
 909                         spi1_pins_a: spi1-0 {
 910                                 pins1 {
 911                                         pinmux = <STM32_PINMUX('Z', 0, AF5)>, /* SPI1_SCK */
 912                                                  <STM32_PINMUX('Z', 2, AF5)>; /* SPI1_MOSI */
 913                                         bias-disable;
 914                                         drive-push-pull;
 915                                         slew-rate = <1>;
 916                                 };
 917
 918                                 pins2 {
 919                                         pinmux = <STM32_PINMUX('Z', 1, AF5)>; /* SPI1_MISO */
 920                                         bias-disable;
 921                                 };
 922                         };
 923                 };
 924         };
 925 };