arch/arm/boot/dts/stm32h743.dtsi

   1 /*
   2  * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This file is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License as
  11  *     published by the Free Software Foundation; either version 2 of the
  12  *     License, or (at your option) any later version.
  13  *
  14  *     This file is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  * Or, alternatively,
  20  *
  21  *  b) Permission is hereby granted, free of charge, to any person
  22  *     obtaining a copy of this software and associated documentation
  23  *     files (the "Software"), to deal in the Software without
  24  *     restriction, including without limitation the rights to use,
  25  *     copy, modify, merge, publish, distribute, sublicense, and/or
  26  *     sell copies of the Software, and to permit persons to whom the
  27  *     Software is furnished to do so, subject to the following
  28  *     conditions:
  29  *
  30  *     The above copyright notice and this permission notice shall be
  31  *     included in all copies or substantial portions of the Software.
  32  *
  33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  40  *     OTHER DEALINGS IN THE SOFTWARE.
  41  */
  42
  43 #include "skeleton.dtsi"
  44 #include "armv7-m.dtsi"
  45
  46 / {
  47         clocks {
  48                 clk_hse: clk-hse {
  49                         #clock-cells = <0>;
  50                         compatible = "fixed-clock";
  51                         clock-frequency = <0>;
  52                 };
  53
  54                 timer_clk: timer-clk {
  55                         #clock-cells = <0>;
  56                         compatible = "fixed-clock";
  57                         clock-frequency = <125000000>;
  58                 };
  59         };
  60
  61         soc {
  62                 timer5: timer@40000c00 {
  63                         compatible = "st,stm32-timer";
  64                         reg = <0x40000c00 0x400>;
  65                         interrupts = <50>;
  66                         clocks = <&timer_clk>;
  67                 };
  68
  69                 usart2: serial@40004400 {
  70                         compatible = "st,stm32f7-usart", "st,stm32f7-uart";
  71                         reg = <0x40004400 0x400>;
  72                         interrupts = <38>;
  73                         status = "disabled";
  74                         clocks = <&timer_clk>;
  75                 };
  76
  77                 dac: dac@40007400 {
  78                         compatible = "st,stm32h7-dac-core";
  79                         reg = <0x40007400 0x400>;
  80                         clocks = <&timer_clk>;
  81                         clock-names = "pclk";
  82                         #address-cells = <1>;
  83                         #size-cells = <0>;
  84                         status = "disabled";
  85
  86                         dac1: dac@1 {
  87                                 compatible = "st,stm32-dac";
  88                                 #io-channels-cells = <1>;
  89                                 reg = <1>;
  90                                 status = "disabled";
  91                         };
  92
  93                         dac2: dac@2 {
  94                                 compatible = "st,stm32-dac";
  95                                 #io-channels-cells = <1>;
  96                                 reg = <2>;
  97                                 status = "disabled";
  98                         };
  99                 };
 100
 101                 usart1: serial@40011000 {
 102                         compatible = "st,stm32f7-usart", "st,stm32f7-uart";
 103                         reg = <0x40011000 0x400>;
 104                         interrupts = <37>;
 105                         status = "disabled";
 106                         clocks = <&timer_clk>;
 107
 108                 };
 109
 110                 dma1: dma@40020000 {
 111                         compatible = "st,stm32-dma";
 112                         reg = <0x40020000 0x400>;
 113                         interrupts = <11>,
 114                                      <12>,
 115                                      <13>,
 116                                      <14>,
 117                                      <15>,
 118                                      <16>,
 119                                      <17>,
 120                                      <47>;
 121                         clocks = <&timer_clk>;
 122                         #dma-cells = <4>;
 123                         st,mem2mem;
 124                         status = "disabled";
 125                 };
 126
 127                 dma2: dma@40020400 {
 128                         compatible = "st,stm32-dma";
 129                         reg = <0x40020400 0x400>;
 130                         interrupts = <56>,
 131                                      <57>,
 132                                      <58>,
 133                                      <59>,
 134                                      <60>,
 135                                      <68>,
 136                                      <69>,
 137                                      <70>;
 138                         clocks = <&timer_clk>;
 139                         #dma-cells = <4>;
 140                         st,mem2mem;
 141                         status = "disabled";
 142                 };
 143
 144                 adc_12: adc@40022000 {
 145                         compatible = "st,stm32h7-adc-core";
 146                         reg = <0x40022000 0x400>;
 147                         interrupts = <18>;
 148                         clocks = <&timer_clk>;
 149                         clock-names = "bus";
 150                         interrupt-controller;
 151                         #interrupt-cells = <1>;
 152                         #address-cells = <1>;
 153                         #size-cells = <0>;
 154                         status = "disabled";
 155
 156                         adc1: adc@0 {
 157                                 compatible = "st,stm32h7-adc";
 158                                 #io-channel-cells = <1>;
 159                                 reg = <0x0>;
 160                                 interrupt-parent = <&adc_12>;
 161                                 interrupts = <0>;
 162                                 status = "disabled";
 163                         };
 164
 165                         adc2: adc@100 {
 166                                 compatible = "st,stm32h7-adc";
 167                                 #io-channel-cells = <1>;
 168                                 reg = <0x100>;
 169                                 interrupt-parent = <&adc_12>;
 170                                 interrupts = <1>;
 171                                 status = "disabled";
 172                         };
 173                 };
 174
 175                 adc_3: adc@58026000 {
 176                         compatible = "st,stm32h7-adc-core";
 177                         reg = <0x58026000 0x400>;
 178                         interrupts = <127>;
 179                         clocks = <&timer_clk>;
 180                         clock-names = "bus";
 181                         interrupt-controller;
 182                         #interrupt-cells = <1>;
 183                         #address-cells = <1>;
 184                         #size-cells = <0>;
 185                         status = "disabled";
 186
 187                         adc3: adc@0 {
 188                                 compatible = "st,stm32h7-adc";
 189                                 #io-channel-cells = <1>;
 190                                 reg = <0x0>;
 191                                 interrupt-parent = <&adc_3>;
 192                                 interrupts = <0>;
 193                                 status = "disabled";
 194                         };
 195                 };
 196         };
 197 };
 198
 199 &systick {
 200         clock-frequency = <250000000>;
 201         status = "okay";
 202 };