Merge tag 'for-4.21/libata-20190102' of git://git.kernel.dk/linux-block
[sfrench/cifs-2.6.git] / arch / arm / boot / dts / sama5d4.dtsi
1 /*
2  * sama5d4.dtsi - Device Tree Include file for SAMA5D4 family SoC
3  *
4  *  Copyright (C) 2014 Atmel,
5  *                2014 Nicolas Ferre <nicolas.ferre@atmel.com>
6  *
7  * This file is dual-licensed: you can use it either under the terms
8  * of the GPL or the X11 license, at your option. Note that this dual
9  * licensing only applies to this file, and not this project as a
10  * whole.
11  *
12  *  a) This file is free software; you can redistribute it and/or
13  *     modify it under the terms of the GNU General Public License as
14  *     published by the Free Software Foundation; either version 2 of the
15  *     License, or (at your option) any later version.
16  *
17  *     This file is distributed in the hope that it will be useful,
18  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
19  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
20  *     GNU General Public License for more details.
21  *
22  * Or, alternatively,
23  *
24  *  b) Permission is hereby granted, free of charge, to any person
25  *     obtaining a copy of this software and associated documentation
26  *     files (the "Software"), to deal in the Software without
27  *     restriction, including without limitation the rights to use,
28  *     copy, modify, merge, publish, distribute, sublicense, and/or
29  *     sell copies of the Software, and to permit persons to whom the
30  *     Software is furnished to do so, subject to the following
31  *     conditions:
32  *
33  *     The above copyright notice and this permission notice shall be
34  *     included in all copies or substantial portions of the Software.
35  *
36  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
37  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
38  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
39  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
40  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
41  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
42  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
43  *     OTHER DEALINGS IN THE SOFTWARE.
44  */
45
46 #include "skeleton.dtsi"
47 #include <dt-bindings/clock/at91.h>
48 #include <dt-bindings/dma/at91.h>
49 #include <dt-bindings/pinctrl/at91.h>
50 #include <dt-bindings/interrupt-controller/irq.h>
51 #include <dt-bindings/gpio/gpio.h>
52
53 / {
54         model = "Atmel SAMA5D4 family SoC";
55         compatible = "atmel,sama5d4";
56         interrupt-parent = <&aic>;
57
58         aliases {
59                 serial0 = &usart3;
60                 serial1 = &usart4;
61                 serial2 = &usart2;
62                 serial3 = &usart0;
63                 serial4 = &usart1;
64                 serial5 = &uart0;
65                 serial6 = &uart1;
66                 gpio0 = &pioA;
67                 gpio1 = &pioB;
68                 gpio2 = &pioC;
69                 gpio3 = &pioD;
70                 gpio4 = &pioE;
71                 pwm0 = &pwm0;
72                 ssc0 = &ssc0;
73                 ssc1 = &ssc1;
74                 tcb0 = &tcb0;
75                 tcb1 = &tcb1;
76                 i2c0 = &i2c0;
77                 i2c1 = &i2c1;
78                 i2c2 = &i2c2;
79         };
80         cpus {
81                 #address-cells = <1>;
82                 #size-cells = <0>;
83
84                 cpu@0 {
85                         device_type = "cpu";
86                         compatible = "arm,cortex-a5";
87                         reg = <0>;
88                         next-level-cache = <&L2>;
89                 };
90         };
91
92         memory {
93                 reg = <0x20000000 0x20000000>;
94         };
95
96         clocks {
97                 slow_xtal: slow_xtal {
98                         compatible = "fixed-clock";
99                         #clock-cells = <0>;
100                         clock-frequency = <0>;
101                 };
102
103                 main_xtal: main_xtal {
104                         compatible = "fixed-clock";
105                         #clock-cells = <0>;
106                         clock-frequency = <0>;
107                 };
108
109                 adc_op_clk: adc_op_clk{
110                         compatible = "fixed-clock";
111                         #clock-cells = <0>;
112                         clock-frequency = <1000000>;
113                 };
114         };
115
116         ns_sram: sram@210000 {
117                 compatible = "mmio-sram";
118                 reg = <0x00210000 0x10000>;
119         };
120
121         ahb {
122                 compatible = "simple-bus";
123                 #address-cells = <1>;
124                 #size-cells = <1>;
125                 ranges;
126
127                 nfc_sram: sram@100000 {
128                         compatible = "mmio-sram";
129                         no-memory-wc;
130                         reg = <0x100000 0x2400>;
131                 };
132
133                 usb0: gadget@400000 {
134                         #address-cells = <1>;
135                         #size-cells = <0>;
136                         compatible = "atmel,sama5d3-udc";
137                         reg = <0x00400000 0x100000
138                                0xfc02c000 0x4000>;
139                         interrupts = <47 IRQ_TYPE_LEVEL_HIGH 2>;
140                         clocks = <&pmc PMC_TYPE_PERIPHERAL 47>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
141                         clock-names = "pclk", "hclk";
142                         status = "disabled";
143
144                         ep@0 {
145                                 reg = <0>;
146                                 atmel,fifo-size = <64>;
147                                 atmel,nb-banks = <1>;
148                         };
149
150                         ep@1 {
151                                 reg = <1>;
152                                 atmel,fifo-size = <1024>;
153                                 atmel,nb-banks = <3>;
154                                 atmel,can-dma;
155                                 atmel,can-isoc;
156                         };
157
158                         ep@2 {
159                                 reg = <2>;
160                                 atmel,fifo-size = <1024>;
161                                 atmel,nb-banks = <3>;
162                                 atmel,can-dma;
163                                 atmel,can-isoc;
164                         };
165
166                         ep@3 {
167                                 reg = <3>;
168                                 atmel,fifo-size = <1024>;
169                                 atmel,nb-banks = <2>;
170                                 atmel,can-dma;
171                                 atmel,can-isoc;
172                         };
173
174                         ep@4 {
175                                 reg = <4>;
176                                 atmel,fifo-size = <1024>;
177                                 atmel,nb-banks = <2>;
178                                 atmel,can-dma;
179                                 atmel,can-isoc;
180                         };
181
182                         ep@5 {
183                                 reg = <5>;
184                                 atmel,fifo-size = <1024>;
185                                 atmel,nb-banks = <2>;
186                                 atmel,can-dma;
187                                 atmel,can-isoc;
188                         };
189
190                         ep@6 {
191                                 reg = <6>;
192                                 atmel,fifo-size = <1024>;
193                                 atmel,nb-banks = <2>;
194                                 atmel,can-dma;
195                                 atmel,can-isoc;
196                         };
197
198                         ep@7 {
199                                 reg = <7>;
200                                 atmel,fifo-size = <1024>;
201                                 atmel,nb-banks = <2>;
202                                 atmel,can-dma;
203                                 atmel,can-isoc;
204                         };
205
206                         ep@8 {
207                                 reg = <8>;
208                                 atmel,fifo-size = <1024>;
209                                 atmel,nb-banks = <2>;
210                                 atmel,can-isoc;
211                         };
212
213                         ep@9 {
214                                 reg = <9>;
215                                 atmel,fifo-size = <1024>;
216                                 atmel,nb-banks = <2>;
217                                 atmel,can-isoc;
218                         };
219
220                         ep@10 {
221                                 reg = <10>;
222                                 atmel,fifo-size = <1024>;
223                                 atmel,nb-banks = <2>;
224                                 atmel,can-isoc;
225                         };
226
227                         ep@11 {
228                                 reg = <11>;
229                                 atmel,fifo-size = <1024>;
230                                 atmel,nb-banks = <2>;
231                                 atmel,can-isoc;
232                         };
233
234                         ep@12 {
235                                 reg = <12>;
236                                 atmel,fifo-size = <1024>;
237                                 atmel,nb-banks = <2>;
238                                 atmel,can-isoc;
239                         };
240
241                         ep@13 {
242                                 reg = <13>;
243                                 atmel,fifo-size = <1024>;
244                                 atmel,nb-banks = <2>;
245                                 atmel,can-isoc;
246                         };
247
248                         ep@14 {
249                                 reg = <14>;
250                                 atmel,fifo-size = <1024>;
251                                 atmel,nb-banks = <2>;
252                                 atmel,can-isoc;
253                         };
254
255                         ep@15 {
256                                 reg = <15>;
257                                 atmel,fifo-size = <1024>;
258                                 atmel,nb-banks = <2>;
259                                 atmel,can-isoc;
260                         };
261                 };
262
263                 usb1: ohci@500000 {
264                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
265                         reg = <0x00500000 0x100000>;
266                         interrupts = <46 IRQ_TYPE_LEVEL_HIGH 2>;
267                         clocks = <&pmc PMC_TYPE_PERIPHERAL 46>, <&pmc PMC_TYPE_PERIPHERAL 46>, <&pmc PMC_TYPE_SYSTEM 6>;
268                         clock-names = "ohci_clk", "hclk", "uhpck";
269                         status = "disabled";
270                 };
271
272                 usb2: ehci@600000 {
273                         compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
274                         reg = <0x00600000 0x100000>;
275                         interrupts = <46 IRQ_TYPE_LEVEL_HIGH 2>;
276                         clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 46>;
277                         clock-names = "usb_clk", "ehci_clk";
278                         status = "disabled";
279                 };
280
281                 L2: cache-controller@a00000 {
282                         compatible = "arm,pl310-cache";
283                         reg = <0x00a00000 0x1000>;
284                         interrupts = <67 IRQ_TYPE_LEVEL_HIGH 4>;
285                         cache-unified;
286                         cache-level = <2>;
287                 };
288
289                 ebi: ebi@10000000 {
290                         compatible = "atmel,sama5d3-ebi";
291                         #address-cells = <2>;
292                         #size-cells = <1>;
293                         atmel,smc = <&hsmc>;
294                         reg = <0x10000000 0x10000000
295                                0x60000000 0x28000000>;
296                         ranges = <0x0 0x0 0x10000000 0x10000000
297                                   0x1 0x0 0x60000000 0x10000000
298                                   0x2 0x0 0x70000000 0x10000000
299                                   0x3 0x0 0x80000000 0x8000000>;
300                         clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
301                         status = "disabled";
302
303                         nand_controller: nand-controller {
304                                 compatible = "atmel,sama5d3-nand-controller";
305                                 atmel,nfc-sram = <&nfc_sram>;
306                                 atmel,nfc-io = <&nfc_io>;
307                                 ecc-engine = <&pmecc>;
308                                 #address-cells = <2>;
309                                 #size-cells = <1>;
310                                 ranges;
311                                 status = "disabled";
312                         };
313                 };
314
315                 nfc_io: nfc-io@90000000 {
316                         compatible = "atmel,sama5d3-nfc-io", "syscon";
317                         reg = <0x90000000 0x8000000>;
318                 };
319
320                 apb {
321                         compatible = "simple-bus";
322                         #address-cells = <1>;
323                         #size-cells = <1>;
324                         ranges;
325
326                         hlcdc: hlcdc@f0000000 {
327                                 compatible = "atmel,sama5d4-hlcdc";
328                                 reg = <0xf0000000 0x4000>;
329                                 interrupts = <51 IRQ_TYPE_LEVEL_HIGH 0>;
330                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 51>, <&pmc PMC_TYPE_SYSTEM 3>, <&clk32k>;
331                                 clock-names = "periph_clk","sys_clk", "slow_clk";
332                                 status = "disabled";
333
334                                 hlcdc-display-controller {
335                                         compatible = "atmel,hlcdc-display-controller";
336                                         #address-cells = <1>;
337                                         #size-cells = <0>;
338
339                                         port@0 {
340                                                 #address-cells = <1>;
341                                                 #size-cells = <0>;
342                                                 reg = <0>;
343                                         };
344                                 };
345
346                                 hlcdc_pwm: hlcdc-pwm {
347                                         compatible = "atmel,hlcdc-pwm";
348                                         pinctrl-names = "default";
349                                         pinctrl-0 = <&pinctrl_lcd_pwm>;
350                                         #pwm-cells = <3>;
351                                 };
352                         };
353
354                         dma1: dma-controller@f0004000 {
355                                 compatible = "atmel,sama5d4-dma";
356                                 reg = <0xf0004000 0x200>;
357                                 interrupts = <50 IRQ_TYPE_LEVEL_HIGH 0>;
358                                 #dma-cells = <1>;
359                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 50>;
360                                 clock-names = "dma_clk";
361                         };
362
363                         isi: isi@f0008000 {
364                                 compatible = "atmel,at91sam9g45-isi";
365                                 reg = <0xf0008000 0x4000>;
366                                 interrupts = <52 IRQ_TYPE_LEVEL_HIGH 5>;
367                                 pinctrl-names = "default";
368                                 pinctrl-0 = <&pinctrl_isi_data_0_7>;
369                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 52>;
370                                 clock-names = "isi_clk";
371                                 status = "disabled";
372                                 port {
373                                         #address-cells = <1>;
374                                         #size-cells = <0>;
375                                 };
376                         };
377
378                         ramc0: ramc@f0010000 {
379                                 compatible = "atmel,sama5d3-ddramc";
380                                 reg = <0xf0010000 0x200>;
381                                 clocks = <&pmc PMC_TYPE_SYSTEM 2>, <&pmc PMC_TYPE_PERIPHERAL 16>;
382                                 clock-names = "ddrck", "mpddr";
383                         };
384
385                         dma0: dma-controller@f0014000 {
386                                 compatible = "atmel,sama5d4-dma";
387                                 reg = <0xf0014000 0x200>;
388                                 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 0>;
389                                 #dma-cells = <1>;
390                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
391                                 clock-names = "dma_clk";
392                         };
393
394                         pmc: pmc@f0018000 {
395                                 compatible = "atmel,sama5d4-pmc", "syscon";
396                                 reg = <0xf0018000 0x120>;
397                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
398                                 #clock-cells = <2>;
399                                 clocks = <&clk32k>, <&main_xtal>;
400                                 clock-names = "slow_clk", "main_xtal";
401                         };
402
403                         mmc0: mmc@f8000000 {
404                                 compatible = "atmel,hsmci";
405                                 reg = <0xf8000000 0x600>;
406                                 interrupts = <35 IRQ_TYPE_LEVEL_HIGH 0>;
407                                 dmas = <&dma1
408                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
409                                         | AT91_XDMAC_DT_PERID(0))>;
410                                 dma-names = "rxtx";
411                                 pinctrl-names = "default";
412                                 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3>;
413                                 status = "disabled";
414                                 #address-cells = <1>;
415                                 #size-cells = <0>;
416                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 35>;
417                                 clock-names = "mci_clk";
418                         };
419
420                         uart0: serial@f8004000 {
421                                 compatible = "atmel,at91sam9260-usart";
422                                 reg = <0xf8004000 0x100>;
423                                 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 5>;
424                                 dmas = <&dma0
425                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
426                                         | AT91_XDMAC_DT_PERID(22))>,
427                                        <&dma0
428                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
429                                         | AT91_XDMAC_DT_PERID(23))>;
430                                 dma-names = "tx", "rx";
431                                 pinctrl-names = "default";
432                                 pinctrl-0 = <&pinctrl_uart0>;
433                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 27>;
434                                 clock-names = "usart";
435                                 status = "disabled";
436                         };
437
438                         ssc0: ssc@f8008000 {
439                                 compatible = "atmel,at91sam9g45-ssc";
440                                 reg = <0xf8008000 0x4000>;
441                                 interrupts = <48 IRQ_TYPE_LEVEL_HIGH 0>;
442                                 pinctrl-names = "default";
443                                 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
444                                 dmas = <&dma1
445                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
446                                         | AT91_XDMAC_DT_PERID(26))>,
447                                        <&dma1
448                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
449                                         | AT91_XDMAC_DT_PERID(27))>;
450                                 dma-names = "tx", "rx";
451                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 48>;
452                                 clock-names = "pclk";
453                                 status = "disabled";
454                         };
455
456                         pwm0: pwm@f800c000 {
457                                 compatible = "atmel,sama5d3-pwm";
458                                 reg = <0xf800c000 0x300>;
459                                 interrupts = <43 IRQ_TYPE_LEVEL_HIGH 4>;
460                                 #pwm-cells = <3>;
461                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 43>;
462                                 status = "disabled";
463                         };
464
465                         spi0: spi@f8010000 {
466                                 #address-cells = <1>;
467                                 #size-cells = <0>;
468                                 compatible = "atmel,at91rm9200-spi";
469                                 reg = <0xf8010000 0x100>;
470                                 interrupts = <37 IRQ_TYPE_LEVEL_HIGH 3>;
471                                 dmas = <&dma1
472                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
473                                         | AT91_XDMAC_DT_PERID(10))>,
474                                        <&dma1
475                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
476                                         | AT91_XDMAC_DT_PERID(11))>;
477                                 dma-names = "tx", "rx";
478                                 pinctrl-names = "default";
479                                 pinctrl-0 = <&pinctrl_spi0>;
480                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 37>;
481                                 clock-names = "spi_clk";
482                                 status = "disabled";
483                         };
484
485                         i2c0: i2c@f8014000 {
486                                 compatible = "atmel,sama5d4-i2c";
487                                 reg = <0xf8014000 0x4000>;
488                                 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 6>;
489                                 dmas = <&dma1
490                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
491                                         | AT91_XDMAC_DT_PERID(2))>,
492                                        <&dma1
493                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
494                                         | AT91_XDMAC_DT_PERID(3))>;
495                                 dma-names = "tx", "rx";
496                                 pinctrl-names = "default";
497                                 pinctrl-0 = <&pinctrl_i2c0>;
498                                 #address-cells = <1>;
499                                 #size-cells = <0>;
500                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 32>;
501                                 status = "disabled";
502                         };
503
504                         i2c1: i2c@f8018000 {
505                                 compatible = "atmel,sama5d4-i2c";
506                                 reg = <0xf8018000 0x4000>;
507                                 interrupts = <33 IRQ_TYPE_LEVEL_HIGH 6>;
508                                 dmas = <&dma0
509                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
510                                         | AT91_XDMAC_DT_PERID(4))>,
511                                        <&dma0
512                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
513                                         | AT91_XDMAC_DT_PERID(5))>;
514                                 dma-names = "tx", "rx";
515                                 pinctrl-names = "default";
516                                 pinctrl-0 = <&pinctrl_i2c1>;
517                                 #address-cells = <1>;
518                                 #size-cells = <0>;
519                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 33>;
520                                 status = "disabled";
521                         };
522
523                         tcb0: timer@f801c000 {
524                                 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
525                                 #address-cells = <1>;
526                                 #size-cells = <0>;
527                                 reg = <0xf801c000 0x100>;
528                                 interrupts = <40 IRQ_TYPE_LEVEL_HIGH 0>;
529                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 40>, <&clk32k>;
530                                 clock-names = "t0_clk", "slow_clk";
531                         };
532
533                         macb0: ethernet@f8020000 {
534                                 compatible = "atmel,sama5d4-gem";
535                                 reg = <0xf8020000 0x100>;
536                                 interrupts = <54 IRQ_TYPE_LEVEL_HIGH 3>;
537                                 pinctrl-names = "default";
538                                 pinctrl-0 = <&pinctrl_macb0_rmii>;
539                                 #address-cells = <1>;
540                                 #size-cells = <0>;
541                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 54>, <&pmc PMC_TYPE_PERIPHERAL 54>;
542                                 clock-names = "hclk", "pclk";
543                                 status = "disabled";
544                         };
545
546                         i2c2: i2c@f8024000 {
547                                 compatible = "atmel,sama5d4-i2c";
548                                 reg = <0xf8024000 0x4000>;
549                                 interrupts = <34 IRQ_TYPE_LEVEL_HIGH 6>;
550                                 dmas = <&dma1
551                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
552                                         | AT91_XDMAC_DT_PERID(6))>,
553                                        <&dma1
554                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
555                                         | AT91_XDMAC_DT_PERID(7))>;
556                                 dma-names = "tx", "rx";
557                                 pinctrl-names = "default";
558                                 pinctrl-0 = <&pinctrl_i2c2>;
559                                 #address-cells = <1>;
560                                 #size-cells = <0>;
561                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 34>;
562                                 status = "disabled";
563                         };
564
565                         sfr: sfr@f8028000 {
566                                 compatible = "atmel,sama5d4-sfr", "syscon";
567                                 reg = <0xf8028000 0x60>;
568                         };
569
570                         usart0: serial@f802c000 {
571                                 compatible = "atmel,at91sam9260-usart";
572                                 reg = <0xf802c000 0x100>;
573                                 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
574                                 dmas = <&dma0
575                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
576                                         | AT91_XDMAC_DT_PERID(36))>,
577                                        <&dma0
578                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
579                                         | AT91_XDMAC_DT_PERID(37))>;
580                                 dma-names = "tx", "rx";
581                                 pinctrl-names = "default";
582                                 pinctrl-0 = <&pinctrl_usart0 &pinctrl_usart0_rts &pinctrl_usart0_cts>;
583                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
584                                 clock-names = "usart";
585                                 status = "disabled";
586                         };
587
588                         usart1: serial@f8030000 {
589                                 compatible = "atmel,at91sam9260-usart";
590                                 reg = <0xf8030000 0x100>;
591                                 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
592                                 dmas = <&dma0
593                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
594                                         | AT91_XDMAC_DT_PERID(38))>,
595                                        <&dma0
596                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
597                                         | AT91_XDMAC_DT_PERID(39))>;
598                                 dma-names = "tx", "rx";
599                                 pinctrl-names = "default";
600                                 pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts &pinctrl_usart1_cts>;
601                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
602                                 clock-names = "usart";
603                                 status = "disabled";
604                         };
605
606                         mmc1: mmc@fc000000 {
607                                 compatible = "atmel,hsmci";
608                                 reg = <0xfc000000 0x600>;
609                                 interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>;
610                                 dmas = <&dma1
611                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
612                                         | AT91_XDMAC_DT_PERID(1))>;
613                                 dma-names = "rxtx";
614                                 pinctrl-names = "default";
615                                 pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
616                                 status = "disabled";
617                                 #address-cells = <1>;
618                                 #size-cells = <0>;
619                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 36>;
620                                 clock-names = "mci_clk";
621                         };
622
623                         uart1: serial@fc004000 {
624                                 compatible = "atmel,at91sam9260-usart";
625                                 reg = <0xfc004000 0x100>;
626                                 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
627                                 dmas = <&dma0
628                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
629                                         | AT91_XDMAC_DT_PERID(24))>,
630                                        <&dma0
631                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
632                                         | AT91_XDMAC_DT_PERID(25))>;
633                                 dma-names = "tx", "rx";
634                                 pinctrl-names = "default";
635                                 pinctrl-0 = <&pinctrl_uart1>;
636                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 28>;
637                                 clock-names = "usart";
638                                 status = "disabled";
639                         };
640
641                         usart2: serial@fc008000 {
642                                 compatible = "atmel,at91sam9260-usart";
643                                 reg = <0xfc008000 0x100>;
644                                 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
645                                 dmas = <&dma1
646                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
647                                         | AT91_XDMAC_DT_PERID(16))>,
648                                        <&dma1
649                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
650                                         | AT91_XDMAC_DT_PERID(17))>;
651                                 dma-names = "tx", "rx";
652                                 pinctrl-names = "default";
653                                 pinctrl-0 = <&pinctrl_usart2 &pinctrl_usart2_rts &pinctrl_usart2_cts>;
654                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 29>;
655                                 clock-names = "usart";
656                                 status = "disabled";
657                         };
658
659                         usart3: serial@fc00c000 {
660                                 compatible = "atmel,at91sam9260-usart";
661                                 reg = <0xfc00c000 0x100>;
662                                 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 5>;
663                                 dmas = <&dma1
664                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
665                                         | AT91_XDMAC_DT_PERID(18))>,
666                                        <&dma1
667                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
668                                         | AT91_XDMAC_DT_PERID(19))>;
669                                 dma-names = "tx", "rx";
670                                 pinctrl-names = "default";
671                                 pinctrl-0 = <&pinctrl_usart3>;
672                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 30>;
673                                 clock-names = "usart";
674                                 status = "disabled";
675                         };
676
677                         usart4: serial@fc010000 {
678                                 compatible = "atmel,at91sam9260-usart";
679                                 reg = <0xfc010000 0x100>;
680                                 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 5>;
681                                 dmas = <&dma1
682                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
683                                         | AT91_XDMAC_DT_PERID(20))>,
684                                        <&dma1
685                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
686                                         | AT91_XDMAC_DT_PERID(21))>;
687                                 dma-names = "tx", "rx";
688                                 pinctrl-names = "default";
689                                 pinctrl-0 = <&pinctrl_usart4>;
690                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 31>;
691                                 clock-names = "usart";
692                                 status = "disabled";
693                         };
694
695                         ssc1: ssc@fc014000 {
696                                 compatible = "atmel,at91sam9g45-ssc";
697                                 reg = <0xfc014000 0x4000>;
698                                 interrupts = <49 IRQ_TYPE_LEVEL_HIGH 0>;
699                                 pinctrl-names = "default";
700                                 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
701                                 dmas = <&dma1
702                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
703                                         | AT91_XDMAC_DT_PERID(28))>,
704                                        <&dma1
705                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
706                                         | AT91_XDMAC_DT_PERID(29))>;
707                                 dma-names = "tx", "rx";
708                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 49>;
709                                 clock-names = "pclk";
710                                 status = "disabled";
711                         };
712
713                         spi1: spi@fc018000 {
714                                 #address-cells = <1>;
715                                 #size-cells = <0>;
716                                 compatible = "atmel,at91rm9200-spi";
717                                 reg = <0xfc018000 0x100>;
718                                 interrupts = <38 IRQ_TYPE_LEVEL_HIGH 3>;
719                                 dmas = <&dma1
720                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
721                                         | AT91_XDMAC_DT_PERID(12))>,
722                                        <&dma1
723                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
724                                         | AT91_XDMAC_DT_PERID(13))>;
725                                 dma-names = "tx", "rx";
726                                 pinctrl-names = "default";
727                                 pinctrl-0 = <&pinctrl_spi1>;
728                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 38>;
729                                 clock-names = "spi_clk";
730                                 status = "disabled";
731                         };
732
733                         spi2: spi@fc01c000 {
734                                 #address-cells = <1>;
735                                 #size-cells = <0>;
736                                 compatible = "atmel,at91rm9200-spi";
737                                 reg = <0xfc01c000 0x100>;
738                                 interrupts = <39 IRQ_TYPE_LEVEL_HIGH 3>;
739                                 dmas = <&dma0
740                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
741                                         | AT91_XDMAC_DT_PERID(14))>,
742                                        <&dma0
743                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
744                                         | AT91_XDMAC_DT_PERID(15))>;
745                                 dma-names = "tx", "rx";
746                                 pinctrl-names = "default";
747                                 pinctrl-0 = <&pinctrl_spi2>;
748                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 39>;
749                                 clock-names = "spi_clk";
750                                 status = "disabled";
751                         };
752
753                         tcb1: timer@fc020000 {
754                                 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
755                                 #address-cells = <1>;
756                                 #size-cells = <0>;
757                                 reg = <0xfc020000 0x100>;
758                                 interrupts = <41 IRQ_TYPE_LEVEL_HIGH 0>;
759                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 41>, <&clk32k>;
760                                 clock-names = "t0_clk", "slow_clk";
761                         };
762
763                         tcb2: timer@fc024000 {
764                                 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
765                                 #address-cells = <1>;
766                                 #size-cells = <0>;
767                                 reg = <0xfc024000 0x100>;
768                                 interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>;
769                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 42>, <&clk32k>;
770                                 clock-names = "t0_clk", "slow_clk";
771                         };
772
773                         macb1: ethernet@fc028000 {
774                                 compatible = "atmel,sama5d4-gem";
775                                 reg = <0xfc028000 0x100>;
776                                 interrupts = <55 IRQ_TYPE_LEVEL_HIGH 3>;
777                                 pinctrl-names = "default";
778                                 pinctrl-0 = <&pinctrl_macb1_rmii>;
779                                 #address-cells = <1>;
780                                 #size-cells = <0>;
781                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 55>, <&pmc PMC_TYPE_PERIPHERAL 55>;
782                                 clock-names = "hclk", "pclk";
783                                 status = "disabled";
784                         };
785
786                         trng@fc030000 {
787                                 compatible = "atmel,at91sam9g45-trng";
788                                 reg = <0xfc030000 0x100>;
789                                 interrupts = <53 IRQ_TYPE_LEVEL_HIGH 0>;
790                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 53>;
791                         };
792
793                         adc0: adc@fc034000 {
794                                 compatible = "atmel,at91sam9x5-adc";
795                                 reg = <0xfc034000 0x100>;
796                                 interrupts = <44 IRQ_TYPE_LEVEL_HIGH 5>;
797                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 44>,
798                                          <&adc_op_clk>;
799                                 clock-names = "adc_clk", "adc_op_clk";
800                                 atmel,adc-channels-used = <0x01f>;
801                                 atmel,adc-startup-time = <40>;
802                                 atmel,adc-use-external-triggers;
803                                 atmel,adc-vref = <3000>;
804                                 atmel,adc-res = <8 10>;
805                                 atmel,adc-sample-hold-time = <11>;
806                                 atmel,adc-res-names = "lowres", "highres";
807                                 atmel,adc-ts-pressure-threshold = <10000>;
808                                 status = "disabled";
809
810                                 trigger0 {
811                                         trigger-name = "external-rising";
812                                         trigger-value = <0x1>;
813                                         trigger-external;
814                                 };
815                                 trigger1 {
816                                         trigger-name = "external-falling";
817                                         trigger-value = <0x2>;
818                                         trigger-external;
819                                 };
820                                 trigger2 {
821                                         trigger-name = "external-any";
822                                         trigger-value = <0x3>;
823                                         trigger-external;
824                                 };
825                                 trigger3 {
826                                         trigger-name = "continuous";
827                                         trigger-value = <0x6>;
828                                 };
829                         };
830
831                         aes@fc044000 {
832                                 compatible = "atmel,at91sam9g46-aes";
833                                 reg = <0xfc044000 0x100>;
834                                 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
835                                 dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
836                                         | AT91_XDMAC_DT_PERID(41))>,
837                                        <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
838                                         | AT91_XDMAC_DT_PERID(40))>;
839                                 dma-names = "tx", "rx";
840                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
841                                 clock-names = "aes_clk";
842                                 status = "okay";
843                         };
844
845                         tdes@fc04c000 {
846                                 compatible = "atmel,at91sam9g46-tdes";
847                                 reg = <0xfc04c000 0x100>;
848                                 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 0>;
849                                 dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
850                                         | AT91_XDMAC_DT_PERID(42))>,
851                                        <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
852                                         | AT91_XDMAC_DT_PERID(43))>;
853                                 dma-names = "tx", "rx";
854                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
855                                 clock-names = "tdes_clk";
856                                 status = "okay";
857                         };
858
859                         sha@fc050000 {
860                                 compatible = "atmel,at91sam9g46-sha";
861                                 reg = <0xfc050000 0x100>;
862                                 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 0>;
863                                 dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
864                                         | AT91_XDMAC_DT_PERID(44))>;
865                                 dma-names = "tx";
866                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
867                                 clock-names = "sha_clk";
868                                 status = "okay";
869                         };
870
871                         hsmc: smc@fc05c000 {
872                                 compatible = "atmel,sama5d3-smc", "syscon", "simple-mfd";
873                                 reg = <0xfc05c000 0x1000>;
874                                 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 6>;
875                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 22>;
876                                 #address-cells = <1>;
877                                 #size-cells = <1>;
878                                 ranges;
879
880                                 pmecc: ecc-engine@ffffc070 {
881                                         compatible = "atmel,sama5d4-pmecc";
882                                         reg = <0xfc05c070 0x490>,
883                                               <0xfc05c500 0x100>;
884                                 };
885                         };
886
887                         reset_controller: rstc@fc068600 {
888                                 compatible = "atmel,sama5d3-rstc", "atmel,at91sam9g45-rstc";
889                                 reg = <0xfc068600 0x10>;
890                                 clocks = <&clk32k>;
891                         };
892
893                         shutdown_controller: shdwc@fc068610 {
894                                 compatible = "atmel,at91sam9x5-shdwc";
895                                 reg = <0xfc068610 0x10>;
896                                 clocks = <&clk32k>;
897                         };
898
899                         pit: timer@fc068630 {
900                                 compatible = "atmel,at91sam9260-pit";
901                                 reg = <0xfc068630 0x10>;
902                                 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
903                                 clocks = <&pmc PMC_TYPE_CORE PMC_MCK2>;
904                         };
905
906                         watchdog: watchdog@fc068640 {
907                                 compatible = "atmel,sama5d4-wdt";
908                                 reg = <0xfc068640 0x10>;
909                                 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 7>;
910                                 clocks = <&clk32k>;
911                                 status = "disabled";
912                         };
913
914                         clk32k: sckc@fc068650 {
915                                 compatible = "atmel,sama5d4-sckc";
916                                 reg = <0xfc068650 0x4>;
917                                 #clock-cells = <0>;
918                                 clocks = <&slow_xtal>;
919                         };
920
921                         rtc@fc0686b0 {
922                                 compatible = "atmel,at91rm9200-rtc";
923                                 reg = <0xfc0686b0 0x30>;
924                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
925                                 clocks = <&clk32k>;
926                         };
927
928                         dbgu: serial@fc069000 {
929                                 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
930                                 reg = <0xfc069000 0x200>;
931                                 interrupts = <45 IRQ_TYPE_LEVEL_HIGH 7>;
932                                 pinctrl-names = "default";
933                                 pinctrl-0 = <&pinctrl_dbgu>;
934                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 45>;
935                                 clock-names = "usart";
936                                 status = "disabled";
937                         };
938
939
940                         pinctrl: pinctrl@fc06a000 {
941                                 #address-cells = <1>;
942                                 #size-cells = <1>;
943                                 compatible = "atmel,sama5d3-pinctrl", "atmel,at91sam9x5-pinctrl", "simple-bus";
944                                 ranges = <0xfc068000 0xfc068000 0x100
945                                           0xfc06a000 0xfc06a000 0x4000>;
946                                 /* WARNING: revisit as pin spec has changed */
947                                 atmel,mux-mask = <
948                                         /*   A          B          C  */
949                                         0xffffffff 0x3ffcfe7c 0x1c010101        /* pioA */
950                                         0x7fffffff 0xfffccc3a 0x3f00cc3a        /* pioB */
951                                         0xffffffff 0x3ff83fff 0xff00ffff        /* pioC */
952                                         0x0003ff00 0x8002a800 0x00000000        /* pioD */
953                                         0xffffffff 0x7fffffff 0x76fff1bf        /* pioE */
954                                         >;
955
956                                 pioA: gpio@fc06a000 {
957                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
958                                         reg = <0xfc06a000 0x100>;
959                                         interrupts = <23 IRQ_TYPE_LEVEL_HIGH 1>;
960                                         #gpio-cells = <2>;
961                                         gpio-controller;
962                                         interrupt-controller;
963                                         #interrupt-cells = <2>;
964                                         clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
965                                 };
966
967                                 pioB: gpio@fc06b000 {
968                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
969                                         reg = <0xfc06b000 0x100>;
970                                         interrupts = <24 IRQ_TYPE_LEVEL_HIGH 1>;
971                                         #gpio-cells = <2>;
972                                         gpio-controller;
973                                         interrupt-controller;
974                                         #interrupt-cells = <2>;
975                                         clocks = <&pmc PMC_TYPE_PERIPHERAL 24>;
976                                 };
977
978                                 pioC: gpio@fc06c000 {
979                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
980                                         reg = <0xfc06c000 0x100>;
981                                         interrupts = <25 IRQ_TYPE_LEVEL_HIGH 1>;
982                                         #gpio-cells = <2>;
983                                         gpio-controller;
984                                         interrupt-controller;
985                                         #interrupt-cells = <2>;
986                                         clocks = <&pmc PMC_TYPE_PERIPHERAL 25>;
987                                 };
988
989                                 pioD: gpio@fc068000 {
990                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
991                                         reg = <0xfc068000 0x100>;
992                                         interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
993                                         #gpio-cells = <2>;
994                                         gpio-controller;
995                                         interrupt-controller;
996                                         #interrupt-cells = <2>;
997                                         clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
998                                 };
999
1000                                 pioE: gpio@fc06d000 {
1001                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
1002                                         reg = <0xfc06d000 0x100>;
1003                                         interrupts = <26 IRQ_TYPE_LEVEL_HIGH 1>;
1004                                         #gpio-cells = <2>;
1005                                         gpio-controller;
1006                                         interrupt-controller;
1007                                         #interrupt-cells = <2>;
1008                                         clocks = <&pmc PMC_TYPE_PERIPHERAL 26>;
1009                                 };
1010
1011                                 /* pinctrl pin settings */
1012                                 adc0 {
1013                                         pinctrl_adc0_adtrg: adc0_adtrg {
1014                                                 atmel,pins =
1015                                                         <AT91_PIOE 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* conflicts with USBA_VBUS */
1016                                         };
1017                                         pinctrl_adc0_ad0: adc0_ad0 {
1018                                                 atmel,pins =
1019                                                         <AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1020                                         };
1021                                         pinctrl_adc0_ad1: adc0_ad1 {
1022                                                 atmel,pins =
1023                                                         <AT91_PIOC 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1024                                         };
1025                                         pinctrl_adc0_ad2: adc0_ad2 {
1026                                                 atmel,pins =
1027                                                         <AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1028                                         };
1029                                         pinctrl_adc0_ad3: adc0_ad3 {
1030                                                 atmel,pins =
1031                                                         <AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1032                                         };
1033                                         pinctrl_adc0_ad4: adc0_ad4 {
1034                                                 atmel,pins =
1035                                                         <AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1036                                         };
1037                                 };
1038
1039                                 dbgu {
1040                                         pinctrl_dbgu: dbgu-0 {
1041                                                 atmel,pins =
1042                                                         <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* conflicts with D14 and TDI */
1043                                                          AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;         /* conflicts with D15 and TDO */
1044                                         };
1045                                 };
1046
1047                                 ebi {
1048                                         pinctrl_ebi_addr: ebi-addr-0 {
1049                                                 atmel,pins =
1050                                                         <AT91_PIOE 0 AT91_PERIPH_A AT91_PINCTRL_NONE
1051                                                          AT91_PIOE 1 AT91_PERIPH_A AT91_PINCTRL_NONE
1052                                                          AT91_PIOE 2 AT91_PERIPH_A AT91_PINCTRL_NONE
1053                                                          AT91_PIOE 3 AT91_PERIPH_A AT91_PINCTRL_NONE
1054                                                          AT91_PIOE 4 AT91_PERIPH_A AT91_PINCTRL_NONE
1055                                                          AT91_PIOE 5 AT91_PERIPH_A AT91_PINCTRL_NONE
1056                                                          AT91_PIOE 6 AT91_PERIPH_A AT91_PINCTRL_NONE
1057                                                          AT91_PIOE 7 AT91_PERIPH_A AT91_PINCTRL_NONE
1058                                                          AT91_PIOE 8 AT91_PERIPH_A AT91_PINCTRL_NONE
1059                                                          AT91_PIOE 9 AT91_PERIPH_A AT91_PINCTRL_NONE
1060                                                          AT91_PIOE 10 AT91_PERIPH_A AT91_PINCTRL_NONE
1061                                                          AT91_PIOE 11 AT91_PERIPH_A AT91_PINCTRL_NONE
1062                                                          AT91_PIOE 12 AT91_PERIPH_A AT91_PINCTRL_NONE
1063                                                          AT91_PIOE 13 AT91_PERIPH_A AT91_PINCTRL_NONE
1064                                                          AT91_PIOE 14 AT91_PERIPH_A AT91_PINCTRL_NONE
1065                                                          AT91_PIOE 15 AT91_PERIPH_A AT91_PINCTRL_NONE
1066                                                          AT91_PIOE 16 AT91_PERIPH_A AT91_PINCTRL_NONE
1067                                                          AT91_PIOE 17 AT91_PERIPH_A AT91_PINCTRL_NONE
1068                                                          AT91_PIOE 18 AT91_PERIPH_A AT91_PINCTRL_NONE
1069                                                          AT91_PIOE 19 AT91_PERIPH_A AT91_PINCTRL_NONE
1070                                                          AT91_PIOE 20 AT91_PERIPH_A AT91_PINCTRL_NONE
1071                                                          AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE
1072                                                          AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE
1073                                                          AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE
1074                                                          AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE
1075                                                          AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1076                                         };
1077
1078                                         pinctrl_ebi_nand_addr: ebi-addr-1 {
1079                                                 atmel,pins =
1080                                                         <AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE
1081                                                          AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1082                                         };
1083
1084                                         pinctrl_ebi_cs0: ebi-cs0-0 {
1085                                                 atmel,pins =
1086                                                         <AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1087                                         };
1088
1089                                         pinctrl_ebi_cs1: ebi-cs1-0 {
1090                                                 atmel,pins =
1091                                                         <AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1092                                         };
1093
1094                                         pinctrl_ebi_cs2: ebi-cs2-0 {
1095                                                 atmel,pins =
1096                                                         <AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1097                                         };
1098
1099                                         pinctrl_ebi_cs3: ebi-cs3-0 {
1100                                                 atmel,pins =
1101                                                         <AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1102                                         };
1103
1104                                         pinctrl_ebi_data_0_7: ebi-data-lsb-0 {
1105                                                 atmel,pins =
1106                                                         <AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE
1107                                                          AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE
1108                                                          AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE
1109                                                          AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE
1110                                                          AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE
1111                                                          AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE
1112                                                          AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE
1113                                                          AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1114                                         };
1115
1116                                         pinctrl_ebi_data_8_15: ebi-data-msb-0 {
1117                                                 atmel,pins =
1118                                                         <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE
1119                                                          AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE
1120                                                          AT91_PIOB 20 AT91_PERIPH_B AT91_PINCTRL_NONE
1121                                                          AT91_PIOB 21 AT91_PERIPH_B AT91_PINCTRL_NONE
1122                                                          AT91_PIOB 22 AT91_PERIPH_B AT91_PINCTRL_NONE
1123                                                          AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE
1124                                                          AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE
1125                                                          AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE>;
1126                                         };
1127
1128                                         pinctrl_ebi_nandrdy: ebi-nandrdy-0 {
1129                                                 atmel,pins =
1130                                                         <AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1131                                         };
1132
1133                                         pinctrl_ebi_nrd_nandoe: ebi-nrd-nandoe-0 {
1134                                                 atmel,pins =
1135                                                         <AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1136                                         };
1137
1138                                         pinctrl_ebi_nwait: ebi-nwait-0 {
1139                                                 atmel,pins =
1140                                                         <AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1141                                         };
1142
1143                                         pinctrl_ebi_nwe_nandwe: ebi-nwe-nandwe-0 {
1144                                                 atmel,pins =
1145                                                         <AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1146                                         };
1147
1148                                         pinctrl_ebi_nwr1_nbs1: ebi-nwr1-nbs1-0 {
1149                                                 atmel,pins =
1150                                                         <AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1151                                         };
1152                                 };
1153
1154                                 i2c0 {
1155                                         pinctrl_i2c0: i2c0-0 {
1156                                                 atmel,pins =
1157                                                         <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE
1158                                                          AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1159                                         };
1160                                 };
1161
1162                                 i2c1 {
1163                                         pinctrl_i2c1: i2c1-0 {
1164                                                 atmel,pins =
1165                                                         <AT91_PIOE 29 AT91_PERIPH_C AT91_PINCTRL_NONE   /* TWD1, conflicts with UART0 RX and DIBP */
1166                                                          AT91_PIOE 30 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* TWCK1, conflicts with UART0 TX and DIBN */
1167                                         };
1168                                 };
1169
1170                                 i2c2 {
1171                                         pinctrl_i2c2: i2c2-0 {
1172                                                 atmel,pins =
1173                                                         <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE   /* TWD2, conflicts with RD0 and PWML1 */
1174                                                          AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* TWCK2, conflicts with RF0 */
1175                                         };
1176                                 };
1177
1178                                 isi {
1179                                         pinctrl_isi_data_0_7: isi-0-data-0-7 {
1180                                                 atmel,pins =
1181                                                         <AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE   /* ISI_D0 */
1182                                                          AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE   /* ISI_D1 */
1183                                                          AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE   /* ISI_D2 */
1184                                                          AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE   /* ISI_D3 */
1185                                                          AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE   /* ISI_D4 */
1186                                                          AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE   /* ISI_D5 */
1187                                                          AT91_PIOC 25 AT91_PERIPH_A AT91_PINCTRL_NONE   /* ISI_D6 */
1188                                                          AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE   /* ISI_D7 */
1189                                                          AT91_PIOB  1 AT91_PERIPH_C AT91_PINCTRL_NONE   /* ISI_PCK, conflict with G0_RXCK */
1190                                                          AT91_PIOB  3 AT91_PERIPH_C AT91_PINCTRL_NONE   /* ISI_VSYNC */
1191                                                          AT91_PIOB  4 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* ISI_HSYNC */
1192                                         };
1193                                         pinctrl_isi_data_8_9: isi-0-data-8-9 {
1194                                                 atmel,pins =
1195                                                         <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE    /* ISI_D8, conflicts with SPI0_MISO, PWMH2 */
1196                                                          AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>;  /* ISI_D9, conflicts with SPI0_MOSI, PWML2 */
1197                                         };
1198                                         pinctrl_isi_data_10_11: isi-0-data-10-11 {
1199                                                 atmel,pins =
1200                                                         <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE    /* ISI_D10, conflicts with SPI0_SPCK, PWMH3 */
1201                                                          AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>;  /* ISI_D11, conflicts with SPI0_NPCS0, PWML3 */
1202                                         };
1203                                 };
1204
1205                                 lcd {
1206                                         pinctrl_lcd_base: lcd-base-0 {
1207                                                 atmel,pins =
1208                                                         <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDVSYNC */
1209                                                          AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDHSYNC */
1210                                                          AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDDEN */
1211                                                          AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDPCK */
1212                                         };
1213                                         pinctrl_lcd_pwm: lcd-pwm-0 {
1214                                                 atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;    /* LCDPWM */
1215                                         };
1216                                         pinctrl_lcd_rgb444: lcd-rgb-0 {
1217                                                 atmel,pins =
1218                                                         <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD0 pin */
1219                                                          AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD1 pin */
1220                                                          AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD2 pin */
1221                                                          AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD3 pin */
1222                                                          AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD4 pin */
1223                                                          AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD5 pin */
1224                                                          AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD6 pin */
1225                                                          AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD7 pin */
1226                                                          AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD8 pin */
1227                                                          AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD9 pin */
1228                                                          AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD10 pin */
1229                                                          AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD11 pin */
1230                                         };
1231                                         pinctrl_lcd_rgb565: lcd-rgb-1 {
1232                                                 atmel,pins =
1233                                                         <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD0 pin */
1234                                                          AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD1 pin */
1235                                                          AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD2 pin */
1236                                                          AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD3 pin */
1237                                                          AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD4 pin */
1238                                                          AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD5 pin */
1239                                                          AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD6 pin */
1240                                                          AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD7 pin */
1241                                                          AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD8 pin */
1242                                                          AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD9 pin */
1243                                                          AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD10 pin */
1244                                                          AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD11 pin */
1245                                                          AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD12 pin */
1246                                                          AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD13 pin */
1247                                                          AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD14 pin */
1248                                                          AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD15 pin */
1249                                         };
1250                                         pinctrl_lcd_rgb666: lcd-rgb-2 {
1251                                                 atmel,pins =
1252                                                         <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD2 pin */
1253                                                          AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD3 pin */
1254                                                          AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD4 pin */
1255                                                          AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD5 pin */
1256                                                          AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD6 pin */
1257                                                          AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD7 pin */
1258                                                          AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD10 pin */
1259                                                          AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD11 pin */
1260                                                          AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD12 pin */
1261                                                          AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD13 pin */
1262                                                          AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD14 pin */
1263                                                          AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD15 pin */
1264                                                          AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD18 pin */
1265                                                          AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD19 pin */
1266                                                          AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD20 pin */
1267                                                          AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD21 pin */
1268                                                          AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD22 pin */
1269                                                          AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */
1270                                         };
1271                                         pinctrl_lcd_rgb777: lcd-rgb-3 {
1272                                                 atmel,pins =
1273                                                          /* LCDDAT0 conflicts with TMS */
1274                                                         <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD1 pin */
1275                                                          AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD2 pin */
1276                                                          AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD3 pin */
1277                                                          AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD4 pin */
1278                                                          AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD5 pin */
1279                                                          AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD6 pin */
1280                                                          AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD7 pin */
1281                                                          /* LCDDAT8 conflicts with TCK */
1282                                                          AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD9 pin */
1283                                                          AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD10 pin */
1284                                                          AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD11 pin */
1285                                                          AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD12 pin */
1286                                                          AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD13 pin */
1287                                                          AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD14 pin */
1288                                                          AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD15 pin */
1289                                                          /* LCDDAT16 conflicts with NTRST */
1290                                                          AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD17 pin */
1291                                                          AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD18 pin */
1292                                                          AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD19 pin */
1293                                                          AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD20 pin */
1294                                                          AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD21 pin */
1295                                                          AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD22 pin */
1296                                                          AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */
1297                                         };
1298                                         pinctrl_lcd_rgb888: lcd-rgb-4 {
1299                                                 atmel,pins =
1300                                                         <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD0 pin */
1301                                                          AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD1 pin */
1302                                                          AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD2 pin */
1303                                                          AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD3 pin */
1304                                                          AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD4 pin */
1305                                                          AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD5 pin */
1306                                                          AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD6 pin */
1307                                                          AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD7 pin */
1308                                                          AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD8 pin */
1309                                                          AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD9 pin */
1310                                                          AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD10 pin */
1311                                                          AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD11 pin */
1312                                                          AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD12 pin */
1313                                                          AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD13 pin */
1314                                                          AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD14 pin */
1315                                                          AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD15 pin */
1316                                                          AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD16 pin */
1317                                                          AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD17 pin */
1318                                                          AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD18 pin */
1319                                                          AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD19 pin */
1320                                                          AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD20 pin */
1321                                                          AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD21 pin */
1322                                                          AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD22 pin */
1323                                                          AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */
1324                                         };
1325                                 };
1326
1327                                 macb0 {
1328                                         pinctrl_macb0_rmii: macb0_rmii-0 {
1329                                                 atmel,pins =
1330                                                         <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* G0_TX0 */
1331                                                          AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* G0_TX1 */
1332                                                          AT91_PIOB  8 AT91_PERIPH_A AT91_PINCTRL_NONE   /* G0_RX0 */
1333                                                          AT91_PIOB  9 AT91_PERIPH_A AT91_PINCTRL_NONE   /* G0_RX1 */
1334                                                          AT91_PIOB  6 AT91_PERIPH_A AT91_PINCTRL_NONE   /* G0_RXDV */
1335                                                          AT91_PIOB  7 AT91_PERIPH_A AT91_PINCTRL_NONE   /* G0_RXER */
1336                                                          AT91_PIOB  2 AT91_PERIPH_A AT91_PINCTRL_NONE   /* G0_TXEN */
1337                                                          AT91_PIOB  0 AT91_PERIPH_A AT91_PINCTRL_NONE   /* G0_TXCK */
1338                                                          AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE   /* G0_MDC */
1339                                                          AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* G0_MDIO */
1340                                                         >;
1341                                         };
1342                                 };
1343
1344                                 macb1 {
1345                                         pinctrl_macb1_rmii: macb1_rmii-0 {
1346                                                 atmel,pins =
1347                                                         <AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE   /* G1_TX0 */
1348                                                          AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE   /* G1_TX1 */
1349                                                          AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_NONE   /* G1_RX0 */
1350                                                          AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE   /* G1_RX1 */
1351                                                          AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE   /* G1_RXDV */
1352                                                          AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_NONE   /* G1_RXER */
1353                                                          AT91_PIOA  4 AT91_PERIPH_B AT91_PINCTRL_NONE   /* G1_TXEN */
1354                                                          AT91_PIOA  2 AT91_PERIPH_B AT91_PINCTRL_NONE   /* G1_TXCK */
1355                                                          AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE   /* G1_MDC */
1356                                                          AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE   /* G1_MDIO */
1357                                                         >;
1358                                         };
1359                                 };
1360
1361                                 mmc0 {
1362                                         pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 {
1363                                                 atmel,pins =
1364                                                         <AT91_PIOC 4 AT91_PERIPH_B AT91_PINCTRL_NONE    /* MCI0_CK, conflict with PCK1(ISI_MCK) */
1365                                                          AT91_PIOC 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_CDA, conflict with NAND_D0 */
1366                                                          AT91_PIOC 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA0, conflict with NAND_D1 */
1367                                                         >;
1368                                         };
1369                                         pinctrl_mmc0_dat1_3: mmc0_dat1_3 {
1370                                                 atmel,pins =
1371                                                         <AT91_PIOC 7 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA1, conflict with NAND_D2 */
1372                                                          AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA2, conflict with NAND_D3 */
1373                                                          AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA3, conflict with NAND_D4 */
1374                                                         >;
1375                                         };
1376                                         pinctrl_mmc0_dat4_7: mmc0_dat4_7 {
1377                                                 atmel,pins =
1378                                                         <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* MCI0_DA4, conflict with NAND_D5 */
1379                                                          AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* MCI0_DA5, conflict with NAND_D6 */
1380                                                          AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* MCI0_DA6, conflict with NAND_D7 */
1381                                                          AT91_PIOC 13 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* MCI0_DA7, conflict with NAND_OE */
1382                                                         >;
1383                                         };
1384                                 };
1385
1386                                 mmc1 {
1387                                         pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 {
1388                                                 atmel,pins =
1389                                                         <AT91_PIOE 18 AT91_PERIPH_C AT91_PINCTRL_NONE           /* MCI1_CK */
1390                                                          AT91_PIOE 19 AT91_PERIPH_C AT91_PINCTRL_PULL_UP        /* MCI1_CDA */
1391                                                          AT91_PIOE 20 AT91_PERIPH_C AT91_PINCTRL_PULL_UP        /* MCI1_DA0 */
1392                                                         >;
1393                                         };
1394                                         pinctrl_mmc1_dat1_3: mmc1_dat1_3 {
1395                                                 atmel,pins =
1396                                                         <AT91_PIOE 21 AT91_PERIPH_C AT91_PINCTRL_PULL_UP        /* MCI1_DA1 */
1397                                                          AT91_PIOE 22 AT91_PERIPH_C AT91_PINCTRL_PULL_UP        /* MCI1_DA2 */
1398                                                          AT91_PIOE 23 AT91_PERIPH_C AT91_PINCTRL_PULL_UP        /* MCI1_DA3 */
1399                                                         >;
1400                                         };
1401                                 };
1402
1403                                 nand0 {
1404                                         pinctrl_nand: nand-0 {
1405                                                 atmel,pins =
1406                                                         <AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC13 periph A Read Enable */
1407                                                          AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC14 periph A Write Enable */
1408
1409                                                          AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PC17 ALE */
1410                                                          AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PC18 CLE */
1411
1412                                                          AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PC15 NCS3/Chip Enable */
1413                                                          AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PC16 NANDRDY */
1414                                                          AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC5 Data bit 0 */
1415                                                          AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC6 Data bit 1 */
1416                                                          AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC7 Data bit 2 */
1417                                                          AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC8 Data bit 3 */
1418                                                          AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC9 Data bit 4 */
1419                                                          AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC10 Data bit 5 */
1420                                                          AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC11 periph A Data bit 6 */
1421                                                          AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC12 periph A Data bit 7 */
1422                                         };
1423                                 };
1424
1425                                 spi0 {
1426                                         pinctrl_spi0: spi0-0 {
1427                                                 atmel,pins =
1428                                                         <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* SPI0_MISO */
1429                                                          AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* SPI0_MOSI */
1430                                                          AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE    /* SPI0_SPCK */
1431                                                         >;
1432                                         };
1433                                 };
1434
1435                                 ssc0 {
1436                                         pinctrl_ssc0_tx: ssc0_tx {
1437                                                 atmel,pins =
1438                                                         <AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE   /* TK0 */
1439                                                          AT91_PIOB 31 AT91_PERIPH_B AT91_PINCTRL_NONE   /* TF0 */
1440                                                          AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TD0 */
1441                                         };
1442
1443                                         pinctrl_ssc0_rx: ssc0_rx {
1444                                                 atmel,pins =
1445                                                         <AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE   /* RK0 */
1446                                                          AT91_PIOB 30 AT91_PERIPH_B AT91_PINCTRL_NONE   /* RF0 */
1447                                                          AT91_PIOB 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* RD0 */
1448                                         };
1449                                 };
1450
1451                                 ssc1 {
1452                                         pinctrl_ssc1_tx: ssc1_tx {
1453                                                 atmel,pins =
1454                                                         <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE   /* TK1 */
1455                                                          AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE   /* TF1 */
1456                                                          AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TD1 */
1457                                         };
1458
1459                                         pinctrl_ssc1_rx: ssc1_rx {
1460                                                 atmel,pins =
1461                                                         <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE   /* RK1 */
1462                                                          AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE   /* RF1 */
1463                                                          AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* RD1 */
1464                                         };
1465                                 };
1466
1467                                 spi1 {
1468                                         pinctrl_spi1: spi1-0 {
1469                                                 atmel,pins =
1470                                                         <AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE   /* SPI1_MISO */
1471                                                          AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE   /* SPI1_MOSI */
1472                                                          AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE   /* SPI1_SPCK */
1473                                                         >;
1474                                         };
1475                                 };
1476
1477                                 spi2 {
1478                                         pinctrl_spi2: spi2-0 {
1479                                                 atmel,pins =
1480                                                         <AT91_PIOD 11 AT91_PERIPH_B AT91_PINCTRL_NONE   /* SPI2_MISO conflicts with RTS0 */
1481                                                          AT91_PIOD 13 AT91_PERIPH_B AT91_PINCTRL_NONE   /* SPI2_MOSI conflicts with TXD0 */
1482                                                          AT91_PIOD 15 AT91_PERIPH_B AT91_PINCTRL_NONE   /* SPI2_SPCK conflicts with RTS1 */
1483                                                         >;
1484                                         };
1485                                 };
1486
1487                                 uart0 {
1488                                         pinctrl_uart0: uart0-0 {
1489                                                 atmel,pins =
1490                                                         <AT91_PIOE 29 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* RXD */
1491                                                          AT91_PIOE 30 AT91_PERIPH_B AT91_PINCTRL_NONE           /* TXD */
1492                                                         >;
1493                                         };
1494                                 };
1495
1496                                 uart1 {
1497                                         pinctrl_uart1: uart1-0 {
1498                                                 atmel,pins =
1499                                                         <AT91_PIOC 25 AT91_PERIPH_C AT91_PINCTRL_PULL_UP        /* RXD */
1500                                                          AT91_PIOC 26 AT91_PERIPH_C AT91_PINCTRL_NONE           /* TXD */
1501                                                         >;
1502                                         };
1503                                 };
1504
1505                                 usart0 {
1506                                         pinctrl_usart0: usart0-0 {
1507                                                 atmel,pins =
1508                                                         <AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* RXD */
1509                                                          AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE           /* TXD */
1510                                                         >;
1511                                         };
1512                                         pinctrl_usart0_rts: usart0_rts-0 {
1513                                                 atmel,pins = <AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1514                                         };
1515                                         pinctrl_usart0_cts: usart0_cts-0 {
1516                                                 atmel,pins = <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1517                                         };
1518                                 };
1519
1520                                 usart1 {
1521                                         pinctrl_usart1: usart1-0 {
1522                                                 atmel,pins =
1523                                                         <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* RXD */
1524                                                          AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE           /* TXD */
1525                                                         >;
1526                                         };
1527                                         pinctrl_usart1_rts: usart1_rts-0 {
1528                                                 atmel,pins = <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1529                                         };
1530                                         pinctrl_usart1_cts: usart1_cts-0 {
1531                                                 atmel,pins = <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1532                                         };
1533                                 };
1534
1535                                 usart2 {
1536                                         pinctrl_usart2: usart2-0 {
1537                                                 atmel,pins =
1538                                                         <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP         /* RXD - conflicts with G0_CRS, ISI_HSYNC */
1539                                                          AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE            /* TXD - conflicts with G0_COL, PCK2 */
1540                                                         >;
1541                                         };
1542                                         pinctrl_usart2_rts: usart2_rts-0 {
1543                                                 atmel,pins = <AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;    /* conflicts with G0_RX3, PWMH1 */
1544                                         };
1545                                         pinctrl_usart2_cts: usart2_cts-0 {
1546                                                 atmel,pins = <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;     /* conflicts with G0_TXER, ISI_VSYNC */
1547                                         };
1548                                 };
1549
1550                                 usart3 {
1551                                         pinctrl_usart3: usart3-0 {
1552                                                 atmel,pins =
1553                                                         <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* RXD */
1554                                                          AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_NONE           /* TXD */
1555                                                         >;
1556                                         };
1557                                 };
1558
1559                                 usart4 {
1560                                         pinctrl_usart4: usart4-0 {
1561                                                 atmel,pins =
1562                                                         <AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* RXD */
1563                                                          AT91_PIOE 27 AT91_PERIPH_B AT91_PINCTRL_NONE           /* TXD */
1564                                                         >;
1565                                         };
1566                                         pinctrl_usart4_rts: usart4_rts-0 {
1567                                                 atmel,pins = <AT91_PIOE 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;    /* conflicts with NWAIT, A19 */
1568                                         };
1569                                         pinctrl_usart4_cts: usart4_cts-0 {
1570                                                 atmel,pins = <AT91_PIOE 0 AT91_PERIPH_C AT91_PINCTRL_NONE>;     /* conflicts with A0/NBS0, MCI0_CDB */
1571                                         };
1572                                 };
1573                         };
1574
1575                         aic: interrupt-controller@fc06e000 {
1576                                 #interrupt-cells = <3>;
1577                                 compatible = "atmel,sama5d4-aic";
1578                                 interrupt-controller;
1579                                 reg = <0xfc06e000 0x200>;
1580                                 atmel,external-irqs = <56>;
1581                         };
1582                 };
1583         };
1584 };