arch/arm/boot/dts/r8a7794-alt.dts

   1 /*
   2  * Device Tree Source for the Alt board
   3  *
   4  * Copyright (C) 2014 Renesas Electronics Corporation
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 /dts-v1/;
  12 #include "r8a7794.dtsi"
  13 #include <dt-bindings/gpio/gpio.h>
  14
  15 / {
  16         model = "Alt";
  17         compatible = "renesas,alt", "renesas,r8a7794";
  18
  19         aliases {
  20                 serial0 = &scif2;
  21                 i2c9 = &gpioi2c1;
  22                 i2c10 = &gpioi2c4;
  23                 i2c11 = &i2chdmi;
  24                 i2c12 = &i2cexio4;
  25         };
  26
  27         chosen {
  28                 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
  29                 stdout-path = "serial0:115200n8";
  30         };
  31
  32         memory@40000000 {
  33                 device_type = "memory";
  34                 reg = <0 0x40000000 0 0x40000000>;
  35         };
  36
  37         d3_3v: regulator-d3-3v {
  38                 compatible = "regulator-fixed";
  39                 regulator-name = "D3.3V";
  40                 regulator-min-microvolt = <3300000>;
  41                 regulator-max-microvolt = <3300000>;
  42                 regulator-boot-on;
  43                 regulator-always-on;
  44         };
  45
  46         vcc_sdhi0: regulator-vcc-sdhi0 {
  47                 compatible = "regulator-fixed";
  48
  49                 regulator-name = "SDHI0 Vcc";
  50                 regulator-min-microvolt = <3300000>;
  51                 regulator-max-microvolt = <3300000>;
  52
  53                 gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>;
  54                 enable-active-high;
  55         };
  56
  57         vccq_sdhi0: regulator-vccq-sdhi0 {
  58                 compatible = "regulator-gpio";
  59
  60                 regulator-name = "SDHI0 VccQ";
  61                 regulator-min-microvolt = <1800000>;
  62                 regulator-max-microvolt = <3300000>;
  63
  64                 gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>;
  65                 gpios-states = <1>;
  66                 states = <3300000 1
  67                           1800000 0>;
  68         };
  69
  70         vcc_sdhi1: regulator-vcc-sdhi1 {
  71                 compatible = "regulator-fixed";
  72
  73                 regulator-name = "SDHI1 Vcc";
  74                 regulator-min-microvolt = <3300000>;
  75                 regulator-max-microvolt = <3300000>;
  76
  77                 gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>;
  78                 enable-active-high;
  79         };
  80
  81         vccq_sdhi1: regulator-vccq-sdhi1 {
  82                 compatible = "regulator-gpio";
  83
  84                 regulator-name = "SDHI1 VccQ";
  85                 regulator-min-microvolt = <1800000>;
  86                 regulator-max-microvolt = <3300000>;
  87
  88                 gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
  89                 gpios-states = <1>;
  90                 states = <3300000 1
  91                           1800000 0>;
  92         };
  93
  94         lbsc {
  95                 #address-cells = <1>;
  96                 #size-cells = <1>;
  97         };
  98
  99         vga-encoder {
 100                 compatible = "adi,adv7123";
 101
 102                 ports {
 103                         #address-cells = <1>;
 104                         #size-cells = <0>;
 105
 106                         port@0 {
 107                                 reg = <0>;
 108                                 adv7123_in: endpoint {
 109                                         remote-endpoint = <&du_out_rgb1>;
 110                                 };
 111                         };
 112                         port@1 {
 113                                 reg = <1>;
 114                                 adv7123_out: endpoint {
 115                                         remote-endpoint = <&vga_in>;
 116                                 };
 117                         };
 118                 };
 119         };
 120
 121         vga {
 122                 compatible = "vga-connector";
 123
 124                 port {
 125                         vga_in: endpoint {
 126                                 remote-endpoint = <&adv7123_out>;
 127                         };
 128                 };
 129         };
 130
 131         x2_clk: x2-clock {
 132                 compatible = "fixed-clock";
 133                 #clock-cells = <0>;
 134                 clock-frequency = <74250000>;
 135         };
 136
 137         x13_clk: x13-clock {
 138                 compatible = "fixed-clock";
 139                 #clock-cells = <0>;
 140                 clock-frequency = <148500000>;
 141         };
 142
 143         gpioi2c1: i2c-9 {
 144                 #address-cells = <1>;
 145                 #size-cells = <0>;
 146                 compatible = "i2c-gpio";
 147                 status = "disabled";
 148                 scl-gpios = <&gpio4 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
 149                 sda-gpios = <&gpio4 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
 150         };
 151
 152         gpioi2c4: i2c-10 {
 153                 #address-cells = <1>;
 154                 #size-cells = <0>;
 155                 compatible = "i2c-gpio";
 156                 status = "disabled";
 157                 scl-gpios = <&gpio4 8 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
 158                 sda-gpios = <&gpio4 9 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
 159                 i2c-gpio,delay-us = <5>;
 160         };
 161
 162         /*
 163          * A fallback to GPIO is provided for I2C1.
 164          */
 165         i2chdmi: i2c-11 {
 166                 compatible = "i2c-demux-pinctrl";
 167                 i2c-parent = <&i2c1>, <&gpioi2c1>;
 168                 i2c-bus-name = "i2c-hdmi";
 169                 #address-cells = <1>;
 170                 #size-cells = <0>;
 171
 172                 composite-in@20 {
 173                         compatible = "adi,adv7180";
 174                         reg = <0x20>;
 175                         remote = <&vin0>;
 176
 177                         port {
 178                                 adv7180: endpoint {
 179                                         bus-width = <8>;
 180                                         remote-endpoint = <&vin0ep>;
 181                                 };
 182                         };
 183                 };
 184         };
 185
 186         /*
 187          * I2C4 is routed to EXIO connector B, pins 73 (SCL) + 74 (SDA).
 188          * A fallback to GPIO is provided.
 189          */
 190         i2cexio4: i2c-14 {
 191                 compatible = "i2c-demux-pinctrl";
 192                 i2c-parent = <&i2c4>, <&gpioi2c4>;
 193                 i2c-bus-name = "i2c-exio4";
 194                 #address-cells = <1>;
 195                 #size-cells = <0>;
 196         };
 197 };
 198
 199 &du {
 200         pinctrl-0 = <&du_pins>;
 201         pinctrl-names = "default";
 202         status = "okay";
 203
 204         clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
 205                  <&x13_clk>, <&x2_clk>;
 206         clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
 207
 208         ports {
 209                 port@1 {
 210                         endpoint {
 211                                 remote-endpoint = <&adv7123_in>;
 212                         };
 213                 };
 214         };
 215 };
 216
 217 &extal_clk {
 218         clock-frequency = <20000000>;
 219 };
 220
 221 &pfc {
 222         pinctrl-0 = <&scif_clk_pins>;
 223         pinctrl-names = "default";
 224
 225         du_pins: du {
 226                 groups = "du1_rgb666", "du1_sync", "du1_disp", "du1_clk0_out";
 227                 function = "du1";
 228         };
 229
 230         scif2_pins: scif2 {
 231                 groups = "scif2_data";
 232                 function = "scif2";
 233         };
 234
 235         scif_clk_pins: scif_clk {
 236                 groups = "scif_clk";
 237                 function = "scif_clk";
 238         };
 239
 240         ether_pins: ether {
 241                 groups = "eth_link", "eth_mdio", "eth_rmii";
 242                 function = "eth";
 243         };
 244
 245         phy1_pins: phy1 {
 246                 groups = "intc_irq8";
 247                 function = "intc";
 248         };
 249
 250         i2c1_pins: i2c1 {
 251                 groups = "i2c1";
 252                 function = "i2c1";
 253         };
 254
 255         i2c4_pins: i2c4 {
 256                 groups = "i2c4";
 257                 function = "i2c4";
 258         };
 259
 260         vin0_pins: vin0 {
 261                 groups = "vin0_data8", "vin0_clk";
 262                 function = "vin0";
 263         };
 264
 265         mmcif0_pins: mmcif0 {
 266                 groups = "mmc_data8", "mmc_ctrl";
 267                 function = "mmc";
 268         };
 269
 270         sdhi0_pins: sd0 {
 271                 groups = "sdhi0_data4", "sdhi0_ctrl";
 272                 function = "sdhi0";
 273                 power-source = <3300>;
 274         };
 275
 276         sdhi0_pins_uhs: sd0_uhs {
 277                 groups = "sdhi0_data4", "sdhi0_ctrl";
 278                 function = "sdhi0";
 279                 power-source = <1800>;
 280         };
 281
 282         sdhi1_pins: sd1 {
 283                 groups = "sdhi1_data4", "sdhi1_ctrl";
 284                 function = "sdhi1";
 285                 power-source = <3300>;
 286         };
 287
 288         sdhi1_pins_uhs: sd1_uhs {
 289                 groups = "sdhi1_data4", "sdhi1_ctrl";
 290                 function = "sdhi1";
 291                 power-source = <1800>;
 292         };
 293 };
 294
 295 &cmt0 {
 296         status = "okay";
 297 };
 298
 299 &pfc {
 300         qspi_pins: qspi {
 301                 groups = "qspi_ctrl", "qspi_data4";
 302                 function = "qspi";
 303         };
 304 };
 305
 306 &ether {
 307         pinctrl-0 = <&ether_pins &phy1_pins>;
 308         pinctrl-names = "default";
 309
 310         phy-handle = <&phy1>;
 311         renesas,ether-link-active-low;
 312         status = "okay";
 313
 314         phy1: ethernet-phy@1 {
 315                 reg = <1>;
 316                 interrupt-parent = <&irqc0>;
 317                 interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
 318                 micrel,led-mode = <1>;
 319         };
 320 };
 321
 322 &mmcif0 {
 323         pinctrl-0 = <&mmcif0_pins>;
 324         pinctrl-names = "default";
 325
 326         vmmc-supply = <&d3_3v>;
 327         vqmmc-supply = <&d3_3v>;
 328         bus-width = <8>;
 329         non-removable;
 330         status = "okay";
 331 };
 332
 333 &sdhi0 {
 334         pinctrl-0 = <&sdhi0_pins>;
 335         pinctrl-1 = <&sdhi0_pins_uhs>;
 336         pinctrl-names = "default", "state_uhs";
 337
 338         vmmc-supply = <&vcc_sdhi0>;
 339         vqmmc-supply = <&vccq_sdhi0>;
 340         cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
 341         wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
 342         sd-uhs-sdr50;
 343         sd-uhs-sdr104;
 344         status = "okay";
 345 };
 346
 347 &sdhi1 {
 348         pinctrl-0 = <&sdhi1_pins>;
 349         pinctrl-1 = <&sdhi1_pins_uhs>;
 350         pinctrl-names = "default", "state_uhs";
 351
 352         vmmc-supply = <&vcc_sdhi1>;
 353         vqmmc-supply = <&vccq_sdhi1>;
 354         cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
 355         wp-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>;
 356         sd-uhs-sdr50;
 357         status = "okay";
 358 };
 359
 360 &i2c1 {
 361         pinctrl-0 = <&i2c1_pins>;
 362         pinctrl-names = "i2c-hdmi";
 363
 364         clock-frequency = <400000>;
 365 };
 366
 367 &i2c4 {
 368         pinctrl-0 = <&i2c4_pins>;
 369         pinctrl-names = "i2c-exio4";
 370 };
 371
 372 &vin0 {
 373         status = "okay";
 374         pinctrl-0 = <&vin0_pins>;
 375         pinctrl-names = "default";
 376
 377         port {
 378                 #address-cells = <1>;
 379                 #size-cells = <0>;
 380
 381                 vin0ep: endpoint {
 382                         remote-endpoint = <&adv7180>;
 383                         bus-width = <8>;
 384                 };
 385         };
 386 };
 387
 388 &scif2 {
 389         pinctrl-0 = <&scif2_pins>;
 390         pinctrl-names = "default";
 391
 392         status = "okay";
 393 };
 394
 395 &scif_clk {
 396         clock-frequency = <14745600>;
 397 };
 398
 399 &qspi {
 400         pinctrl-0 = <&qspi_pins>;
 401         pinctrl-names = "default";
 402
 403         status = "okay";
 404
 405         flash@0 {
 406                 compatible = "spansion,s25fl512s", "jedec,spi-nor";
 407                 reg = <0>;
 408                 spi-max-frequency = <30000000>;
 409                 spi-tx-bus-width = <4>;
 410                 spi-rx-bus-width = <4>;
 411                 spi-cpol;
 412                 spi-cpha;
 413                 m25p,fast-read;
 414
 415                 partitions {
 416                         compatible = "fixed-partitions";
 417                         #address-cells = <1>;
 418                         #size-cells = <1>;
 419
 420                         partition@0 {
 421                                 label = "loader";
 422                                 reg = <0x00000000 0x00040000>;
 423                                 read-only;
 424                         };
 425                         partition@40000 {
 426                                 label = "system";
 427                                 reg = <0x00040000 0x00040000>;
 428                                 read-only;
 429                         };
 430                         partition@80000 {
 431                                 label = "user";
 432                                 reg = <0x00080000 0x03f80000>;
 433                         };
 434                 };
 435         };
 436 };