arch/arm/boot/dts/r8a7794-alt.dts

   1 /*
   2  * Device Tree Source for the Alt board
   3  *
   4  * Copyright (C) 2014 Renesas Electronics Corporation
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 /dts-v1/;
  12 #include "r8a7794.dtsi"
  13
  14 / {
  15         model = "Alt";
  16         compatible = "renesas,alt", "renesas,r8a7794";
  17
  18         aliases {
  19                 serial0 = &scif2;
  20         };
  21
  22         chosen {
  23                 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
  24                 stdout-path = "serial0:115200n8";
  25         };
  26
  27         memory@40000000 {
  28                 device_type = "memory";
  29                 reg = <0 0x40000000 0 0x40000000>;
  30         };
  31
  32         lbsc {
  33                 #address-cells = <1>;
  34                 #size-cells = <1>;
  35         };
  36
  37         vga-encoder {
  38                 compatible = "adi,adv7123";
  39
  40                 ports {
  41                         #address-cells = <1>;
  42                         #size-cells = <0>;
  43
  44                         port@0 {
  45                                 reg = <0>;
  46                                 adv7123_in: endpoint {
  47                                         remote-endpoint = <&du_out_rgb1>;
  48                                 };
  49                         };
  50                         port@1 {
  51                                 reg = <1>;
  52                                 adv7123_out: endpoint {
  53                                         remote-endpoint = <&vga_in>;
  54                                 };
  55                         };
  56                 };
  57         };
  58
  59         vga {
  60                 compatible = "vga-connector";
  61
  62                 port {
  63                         vga_in: endpoint {
  64                                 remote-endpoint = <&adv7123_out>;
  65                         };
  66                 };
  67         };
  68
  69         x2_clk: x2-clock {
  70                 compatible = "fixed-clock";
  71                 #clock-cells = <0>;
  72                 clock-frequency = <74250000>;
  73         };
  74
  75         x13_clk: x13-clock {
  76                 compatible = "fixed-clock";
  77                 #clock-cells = <0>;
  78                 clock-frequency = <148500000>;
  79         };
  80 };
  81
  82 &du {
  83         pinctrl-0 = <&du_pins>;
  84         pinctrl-names = "default";
  85         status = "okay";
  86
  87         clocks = <&mstp7_clks R8A7794_CLK_DU0>,
  88                  <&mstp7_clks R8A7794_CLK_DU0>,
  89                  <&x13_clk>, <&x2_clk>;
  90         clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
  91
  92         ports {
  93                 port@1 {
  94                         endpoint {
  95                                 remote-endpoint = <&adv7123_in>;
  96                         };
  97                 };
  98         };
  99 };
 100
 101 &extal_clk {
 102         clock-frequency = <20000000>;
 103 };
 104
 105 &pfc {
 106         du_pins: du {
 107                 renesas,groups = "du1_rgb666", "du1_sync", "du1_disp", "du1_dotclkout0";
 108                 renesas,function = "du";
 109         };
 110
 111         scif2_pins: serial2 {
 112                 renesas,groups = "scif2_data";
 113                 renesas,function = "scif2";
 114         };
 115
 116         ether_pins: ether {
 117                 renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
 118                 renesas,function = "eth";
 119         };
 120
 121         phy1_pins: phy1 {
 122                 renesas,groups = "intc_irq8";
 123                 renesas,function = "intc";
 124         };
 125
 126         i2c1_pins: i2c1 {
 127                 renesas,groups = "i2c1";
 128                 renesas,function = "i2c1";
 129         };
 130
 131         vin0_pins: vin0 {
 132                 renesas,groups = "vin0_data8", "vin0_clk";
 133                 renesas,function = "vin0";
 134         };
 135 };
 136
 137 &cmt0 {
 138         status = "okay";
 139 };
 140
 141 &ether {
 142         pinctrl-0 = <&ether_pins &phy1_pins>;
 143         pinctrl-names = "default";
 144
 145         phy-handle = <&phy1>;
 146         renesas,ether-link-active-low;
 147         status = "okay";
 148
 149         phy1: ethernet-phy@1 {
 150                 reg = <1>;
 151                 interrupt-parent = <&irqc0>;
 152                 interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
 153                 micrel,led-mode = <1>;
 154         };
 155 };
 156
 157 &i2c1 {
 158         pinctrl-0 = <&i2c1_pins>;
 159         pinctrl-names = "default";
 160
 161         status = "okay";
 162         clock-frequency = <400000>;
 163
 164         composite-in@20 {
 165                 compatible = "adi,adv7180";
 166                 reg = <0x20>;
 167                 remote = <&vin0>;
 168
 169                 port {
 170                         adv7180: endpoint {
 171                                 bus-width = <8>;
 172                                 remote-endpoint = <&vin0ep>;
 173                         };
 174                 };
 175         };
 176 };
 177
 178 &vin0 {
 179         status = "okay";
 180         pinctrl-0 = <&vin0_pins>;
 181         pinctrl-names = "default";
 182
 183         port {
 184                 #address-cells = <1>;
 185                 #size-cells = <0>;
 186
 187                 vin0ep: endpoint {
 188                         remote-endpoint = <&adv7180>;
 189                         bus-width = <8>;
 190                 };
 191         };
 192 };
 193
 194 &scif2 {
 195         pinctrl-0 = <&scif2_pins>;
 196         pinctrl-names = "default";
 197
 198         status = "okay";
 199 };