Merge branch 'x86-pti-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[sfrench/cifs-2.6.git] / arch / arm / boot / dts / r8a7791.dtsi
1 /*
2  * Device Tree Source for the r8a7791 SoC
3  *
4  * Copyright (C) 2013-2015 Renesas Electronics Corporation
5  * Copyright (C) 2013-2014 Renesas Solutions Corp.
6  * Copyright (C) 2014 Cogent Embedded Inc.
7  *
8  * This file is licensed under the terms of the GNU General Public License
9  * version 2.  This program is licensed "as is" without any warranty of any
10  * kind, whether express or implied.
11  */
12
13 #include <dt-bindings/clock/r8a7791-cpg-mssr.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
16 #include <dt-bindings/power/r8a7791-sysc.h>
17
18 / {
19         compatible = "renesas,r8a7791";
20         interrupt-parent = <&gic>;
21         #address-cells = <2>;
22         #size-cells = <2>;
23
24         aliases {
25                 i2c0 = &i2c0;
26                 i2c1 = &i2c1;
27                 i2c2 = &i2c2;
28                 i2c3 = &i2c3;
29                 i2c4 = &i2c4;
30                 i2c5 = &i2c5;
31                 i2c6 = &i2c6;
32                 i2c7 = &i2c7;
33                 i2c8 = &i2c8;
34                 spi0 = &qspi;
35                 spi1 = &msiof0;
36                 spi2 = &msiof1;
37                 spi3 = &msiof2;
38                 vin0 = &vin0;
39                 vin1 = &vin1;
40                 vin2 = &vin2;
41         };
42
43         cpus {
44                 #address-cells = <1>;
45                 #size-cells = <0>;
46                 enable-method = "renesas,apmu";
47
48                 cpu0: cpu@0 {
49                         device_type = "cpu";
50                         compatible = "arm,cortex-a15";
51                         reg = <0>;
52                         clock-frequency = <1500000000>;
53                         voltage-tolerance = <1>; /* 1% */
54                         clocks = <&cpg CPG_CORE R8A7791_CLK_Z>;
55                         clock-latency = <300000>; /* 300 us */
56                         power-domains = <&sysc R8A7791_PD_CA15_CPU0>;
57                         next-level-cache = <&L2_CA15>;
58
59                         /* kHz - uV - OPPs unknown yet */
60                         operating-points = <1500000 1000000>,
61                                            <1312500 1000000>,
62                                            <1125000 1000000>,
63                                            < 937500 1000000>,
64                                            < 750000 1000000>,
65                                            < 375000 1000000>;
66                 };
67
68                 cpu1: cpu@1 {
69                         device_type = "cpu";
70                         compatible = "arm,cortex-a15";
71                         reg = <1>;
72                         clock-frequency = <1500000000>;
73                         clocks = <&cpg CPG_CORE R8A7791_CLK_Z>;
74                         power-domains = <&sysc R8A7791_PD_CA15_CPU1>;
75                         next-level-cache = <&L2_CA15>;
76                 };
77
78                 L2_CA15: cache-controller-0 {
79                         compatible = "cache";
80                         power-domains = <&sysc R8A7791_PD_CA15_SCU>;
81                         cache-unified;
82                         cache-level = <2>;
83                 };
84         };
85
86         thermal-zones {
87                 cpu_thermal: cpu-thermal {
88                         polling-delay-passive   = <0>;
89                         polling-delay           = <0>;
90
91                         thermal-sensors = <&thermal>;
92
93                         trips {
94                                 cpu-crit {
95                                         temperature     = <115000>;
96                                         hysteresis      = <0>;
97                                         type            = "critical";
98                                 };
99                         };
100                         cooling-maps {
101                         };
102                 };
103         };
104
105         apmu@e6152000 {
106                 compatible = "renesas,r8a7791-apmu", "renesas,apmu";
107                 reg = <0 0xe6152000 0 0x188>;
108                 cpus = <&cpu0 &cpu1>;
109         };
110
111         gic: interrupt-controller@f1001000 {
112                 compatible = "arm,gic-400";
113                 #interrupt-cells = <3>;
114                 #address-cells = <0>;
115                 interrupt-controller;
116                 reg = <0 0xf1001000 0 0x1000>,
117                         <0 0xf1002000 0 0x2000>,
118                         <0 0xf1004000 0 0x2000>,
119                         <0 0xf1006000 0 0x2000>;
120                 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
121                 clocks = <&cpg CPG_MOD 408>;
122                 clock-names = "clk";
123                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
124                 resets = <&cpg 408>;
125         };
126
127         gpio0: gpio@e6050000 {
128                 compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
129                 reg = <0 0xe6050000 0 0x50>;
130                 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
131                 #gpio-cells = <2>;
132                 gpio-controller;
133                 gpio-ranges = <&pfc 0 0 32>;
134                 #interrupt-cells = <2>;
135                 interrupt-controller;
136                 clocks = <&cpg CPG_MOD 912>;
137                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
138                 resets = <&cpg 912>;
139         };
140
141         gpio1: gpio@e6051000 {
142                 compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
143                 reg = <0 0xe6051000 0 0x50>;
144                 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
145                 #gpio-cells = <2>;
146                 gpio-controller;
147                 gpio-ranges = <&pfc 0 32 26>;
148                 #interrupt-cells = <2>;
149                 interrupt-controller;
150                 clocks = <&cpg CPG_MOD 911>;
151                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
152                 resets = <&cpg 911>;
153         };
154
155         gpio2: gpio@e6052000 {
156                 compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
157                 reg = <0 0xe6052000 0 0x50>;
158                 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
159                 #gpio-cells = <2>;
160                 gpio-controller;
161                 gpio-ranges = <&pfc 0 64 32>;
162                 #interrupt-cells = <2>;
163                 interrupt-controller;
164                 clocks = <&cpg CPG_MOD 910>;
165                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
166                 resets = <&cpg 910>;
167         };
168
169         gpio3: gpio@e6053000 {
170                 compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
171                 reg = <0 0xe6053000 0 0x50>;
172                 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
173                 #gpio-cells = <2>;
174                 gpio-controller;
175                 gpio-ranges = <&pfc 0 96 32>;
176                 #interrupt-cells = <2>;
177                 interrupt-controller;
178                 clocks = <&cpg CPG_MOD 909>;
179                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
180                 resets = <&cpg 909>;
181         };
182
183         gpio4: gpio@e6054000 {
184                 compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
185                 reg = <0 0xe6054000 0 0x50>;
186                 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
187                 #gpio-cells = <2>;
188                 gpio-controller;
189                 gpio-ranges = <&pfc 0 128 32>;
190                 #interrupt-cells = <2>;
191                 interrupt-controller;
192                 clocks = <&cpg CPG_MOD 908>;
193                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
194                 resets = <&cpg 908>;
195         };
196
197         gpio5: gpio@e6055000 {
198                 compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
199                 reg = <0 0xe6055000 0 0x50>;
200                 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
201                 #gpio-cells = <2>;
202                 gpio-controller;
203                 gpio-ranges = <&pfc 0 160 32>;
204                 #interrupt-cells = <2>;
205                 interrupt-controller;
206                 clocks = <&cpg CPG_MOD 907>;
207                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
208                 resets = <&cpg 907>;
209         };
210
211         gpio6: gpio@e6055400 {
212                 compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
213                 reg = <0 0xe6055400 0 0x50>;
214                 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
215                 #gpio-cells = <2>;
216                 gpio-controller;
217                 gpio-ranges = <&pfc 0 192 32>;
218                 #interrupt-cells = <2>;
219                 interrupt-controller;
220                 clocks = <&cpg CPG_MOD 905>;
221                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
222                 resets = <&cpg 905>;
223         };
224
225         gpio7: gpio@e6055800 {
226                 compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
227                 reg = <0 0xe6055800 0 0x50>;
228                 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
229                 #gpio-cells = <2>;
230                 gpio-controller;
231                 gpio-ranges = <&pfc 0 224 26>;
232                 #interrupt-cells = <2>;
233                 interrupt-controller;
234                 clocks = <&cpg CPG_MOD 904>;
235                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
236                 resets = <&cpg 904>;
237         };
238
239         thermal: thermal@e61f0000 {
240                 compatible =    "renesas,thermal-r8a7791",
241                                 "renesas,rcar-gen2-thermal",
242                                 "renesas,rcar-thermal";
243                 reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>;
244                 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
245                 clocks = <&cpg CPG_MOD 522>;
246                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
247                 resets = <&cpg 522>;
248                 #thermal-sensor-cells = <0>;
249         };
250
251         timer {
252                 compatible = "arm,armv7-timer";
253                 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
254                              <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
255                              <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
256                              <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
257         };
258
259         cmt0: timer@ffca0000 {
260                 compatible = "renesas,cmt-48-r8a7791", "renesas,cmt-48-gen2";
261                 reg = <0 0xffca0000 0 0x1004>;
262                 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
263                              <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
264                 clocks = <&cpg CPG_MOD 124>;
265                 clock-names = "fck";
266                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
267                 resets = <&cpg 124>;
268
269                 renesas,channels-mask = <0x60>;
270
271                 status = "disabled";
272         };
273
274         cmt1: timer@e6130000 {
275                 compatible = "renesas,cmt-48-r8a7791", "renesas,cmt-48-gen2";
276                 reg = <0 0xe6130000 0 0x1004>;
277                 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
278                              <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
279                              <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
280                              <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
281                              <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
282                              <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
283                              <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
284                              <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
285                 clocks = <&cpg CPG_MOD 329>;
286                 clock-names = "fck";
287                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
288                 resets = <&cpg 329>;
289
290                 renesas,channels-mask = <0xff>;
291
292                 status = "disabled";
293         };
294
295         irqc0: interrupt-controller@e61c0000 {
296                 compatible = "renesas,irqc-r8a7791", "renesas,irqc";
297                 #interrupt-cells = <2>;
298                 interrupt-controller;
299                 reg = <0 0xe61c0000 0 0x200>;
300                 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
301                              <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
302                              <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
303                              <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
304                              <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
305                              <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
306                              <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
307                              <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
308                              <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
309                              <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
310                 clocks = <&cpg CPG_MOD 407>;
311                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
312                 resets = <&cpg 407>;
313         };
314
315         dmac0: dma-controller@e6700000 {
316                 compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac";
317                 reg = <0 0xe6700000 0 0x20000>;
318                 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
319                               GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
320                               GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
321                               GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
322                               GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
323                               GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
324                               GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
325                               GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
326                               GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
327                               GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
328                               GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
329                               GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
330                               GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
331                               GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
332                               GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
333                               GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
334                 interrupt-names = "error",
335                                 "ch0", "ch1", "ch2", "ch3",
336                                 "ch4", "ch5", "ch6", "ch7",
337                                 "ch8", "ch9", "ch10", "ch11",
338                                 "ch12", "ch13", "ch14";
339                 clocks = <&cpg CPG_MOD 219>;
340                 clock-names = "fck";
341                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
342                 resets = <&cpg 219>;
343                 #dma-cells = <1>;
344                 dma-channels = <15>;
345         };
346
347         dmac1: dma-controller@e6720000 {
348                 compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac";
349                 reg = <0 0xe6720000 0 0x20000>;
350                 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
351                               GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
352                               GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
353                               GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
354                               GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
355                               GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
356                               GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
357                               GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
358                               GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
359                               GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
360                               GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
361                               GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
362                               GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
363                               GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
364                               GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
365                               GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
366                 interrupt-names = "error",
367                                 "ch0", "ch1", "ch2", "ch3",
368                                 "ch4", "ch5", "ch6", "ch7",
369                                 "ch8", "ch9", "ch10", "ch11",
370                                 "ch12", "ch13", "ch14";
371                 clocks = <&cpg CPG_MOD 218>;
372                 clock-names = "fck";
373                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
374                 resets = <&cpg 218>;
375                 #dma-cells = <1>;
376                 dma-channels = <15>;
377         };
378
379         audma0: dma-controller@ec700000 {
380                 compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac";
381                 reg = <0 0xec700000 0 0x10000>;
382                 interrupts =    <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
383                                  GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
384                                  GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
385                                  GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
386                                  GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
387                                  GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
388                                  GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
389                                  GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
390                                  GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
391                                  GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
392                                  GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
393                                  GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
394                                  GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
395                                  GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
396                 interrupt-names = "error",
397                                 "ch0", "ch1", "ch2", "ch3",
398                                 "ch4", "ch5", "ch6", "ch7",
399                                 "ch8", "ch9", "ch10", "ch11",
400                                 "ch12";
401                 clocks = <&cpg CPG_MOD 502>;
402                 clock-names = "fck";
403                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
404                 resets = <&cpg 502>;
405                 #dma-cells = <1>;
406                 dma-channels = <13>;
407         };
408
409         audma1: dma-controller@ec720000 {
410                 compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac";
411                 reg = <0 0xec720000 0 0x10000>;
412                 interrupts =    <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
413                                  GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
414                                  GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
415                                  GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
416                                  GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
417                                  GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
418                                  GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
419                                  GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
420                                  GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
421                                  GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
422                                  GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
423                                  GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
424                                  GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
425                                  GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
426                 interrupt-names = "error",
427                                 "ch0", "ch1", "ch2", "ch3",
428                                 "ch4", "ch5", "ch6", "ch7",
429                                 "ch8", "ch9", "ch10", "ch11",
430                                 "ch12";
431                 clocks = <&cpg CPG_MOD 501>;
432                 clock-names = "fck";
433                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
434                 resets = <&cpg 501>;
435                 #dma-cells = <1>;
436                 dma-channels = <13>;
437         };
438
439         usb_dmac0: dma-controller@e65a0000 {
440                 compatible = "renesas,r8a7791-usb-dmac", "renesas,usb-dmac";
441                 reg = <0 0xe65a0000 0 0x100>;
442                 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
443                               GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
444                 interrupt-names = "ch0", "ch1";
445                 clocks = <&cpg CPG_MOD 330>;
446                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
447                 resets = <&cpg 330>;
448                 #dma-cells = <1>;
449                 dma-channels = <2>;
450         };
451
452         usb_dmac1: dma-controller@e65b0000 {
453                 compatible = "renesas,r8a7791-usb-dmac", "renesas,usb-dmac";
454                 reg = <0 0xe65b0000 0 0x100>;
455                 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
456                               GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
457                 interrupt-names = "ch0", "ch1";
458                 clocks = <&cpg CPG_MOD 331>;
459                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
460                 resets = <&cpg 331>;
461                 #dma-cells = <1>;
462                 dma-channels = <2>;
463         };
464
465         /* The memory map in the User's Manual maps the cores to bus numbers */
466         i2c0: i2c@e6508000 {
467                 #address-cells = <1>;
468                 #size-cells = <0>;
469                 compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
470                 reg = <0 0xe6508000 0 0x40>;
471                 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
472                 clocks = <&cpg CPG_MOD 931>;
473                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
474                 resets = <&cpg 931>;
475                 i2c-scl-internal-delay-ns = <6>;
476                 status = "disabled";
477         };
478
479         i2c1: i2c@e6518000 {
480                 #address-cells = <1>;
481                 #size-cells = <0>;
482                 compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
483                 reg = <0 0xe6518000 0 0x40>;
484                 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
485                 clocks = <&cpg CPG_MOD 930>;
486                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
487                 resets = <&cpg 930>;
488                 i2c-scl-internal-delay-ns = <6>;
489                 status = "disabled";
490         };
491
492         i2c2: i2c@e6530000 {
493                 #address-cells = <1>;
494                 #size-cells = <0>;
495                 compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
496                 reg = <0 0xe6530000 0 0x40>;
497                 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
498                 clocks = <&cpg CPG_MOD 929>;
499                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
500                 resets = <&cpg 929>;
501                 i2c-scl-internal-delay-ns = <6>;
502                 status = "disabled";
503         };
504
505         i2c3: i2c@e6540000 {
506                 #address-cells = <1>;
507                 #size-cells = <0>;
508                 compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
509                 reg = <0 0xe6540000 0 0x40>;
510                 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
511                 clocks = <&cpg CPG_MOD 928>;
512                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
513                 resets = <&cpg 928>;
514                 i2c-scl-internal-delay-ns = <6>;
515                 status = "disabled";
516         };
517
518         i2c4: i2c@e6520000 {
519                 #address-cells = <1>;
520                 #size-cells = <0>;
521                 compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
522                 reg = <0 0xe6520000 0 0x40>;
523                 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
524                 clocks = <&cpg CPG_MOD 927>;
525                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
526                 resets = <&cpg 927>;
527                 i2c-scl-internal-delay-ns = <6>;
528                 status = "disabled";
529         };
530
531         i2c5: i2c@e6528000 {
532                 /* doesn't need pinmux */
533                 #address-cells = <1>;
534                 #size-cells = <0>;
535                 compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
536                 reg = <0 0xe6528000 0 0x40>;
537                 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
538                 clocks = <&cpg CPG_MOD 925>;
539                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
540                 resets = <&cpg 925>;
541                 i2c-scl-internal-delay-ns = <110>;
542                 status = "disabled";
543         };
544
545         i2c6: i2c@e60b0000 {
546                 /* doesn't need pinmux */
547                 #address-cells = <1>;
548                 #size-cells = <0>;
549                 compatible = "renesas,iic-r8a7791", "renesas,rcar-gen2-iic",
550                              "renesas,rmobile-iic";
551                 reg = <0 0xe60b0000 0 0x425>;
552                 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
553                 clocks = <&cpg CPG_MOD 926>;
554                 dmas = <&dmac0 0x77>, <&dmac0 0x78>,
555                        <&dmac1 0x77>, <&dmac1 0x78>;
556                 dma-names = "tx", "rx", "tx", "rx";
557                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
558                 resets = <&cpg 926>;
559                 status = "disabled";
560         };
561
562         i2c7: i2c@e6500000 {
563                 #address-cells = <1>;
564                 #size-cells = <0>;
565                 compatible = "renesas,iic-r8a7791", "renesas,rcar-gen2-iic",
566                              "renesas,rmobile-iic";
567                 reg = <0 0xe6500000 0 0x425>;
568                 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
569                 clocks = <&cpg CPG_MOD 318>;
570                 dmas = <&dmac0 0x61>, <&dmac0 0x62>,
571                        <&dmac1 0x61>, <&dmac1 0x62>;
572                 dma-names = "tx", "rx", "tx", "rx";
573                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
574                 resets = <&cpg 318>;
575                 status = "disabled";
576         };
577
578         i2c8: i2c@e6510000 {
579                 #address-cells = <1>;
580                 #size-cells = <0>;
581                 compatible = "renesas,iic-r8a7791", "renesas,rcar-gen2-iic",
582                              "renesas,rmobile-iic";
583                 reg = <0 0xe6510000 0 0x425>;
584                 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
585                 clocks = <&cpg CPG_MOD 323>;
586                 dmas = <&dmac0 0x65>, <&dmac0 0x66>,
587                        <&dmac1 0x65>, <&dmac1 0x66>;
588                 dma-names = "tx", "rx", "tx", "rx";
589                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
590                 resets = <&cpg 323>;
591                 status = "disabled";
592         };
593
594         pfc: pin-controller@e6060000 {
595                 compatible = "renesas,pfc-r8a7791";
596                 reg = <0 0xe6060000 0 0x250>;
597         };
598
599         mmcif0: mmc@ee200000 {
600                 compatible = "renesas,mmcif-r8a7791", "renesas,sh-mmcif";
601                 reg = <0 0xee200000 0 0x80>;
602                 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
603                 clocks = <&cpg CPG_MOD 315>;
604                 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
605                        <&dmac1 0xd1>, <&dmac1 0xd2>;
606                 dma-names = "tx", "rx", "tx", "rx";
607                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
608                 resets = <&cpg 315>;
609                 reg-io-width = <4>;
610                 status = "disabled";
611                 max-frequency = <97500000>;
612         };
613
614         sdhi0: sd@ee100000 {
615                 compatible = "renesas,sdhi-r8a7791";
616                 reg = <0 0xee100000 0 0x328>;
617                 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
618                 clocks = <&cpg CPG_MOD 314>;
619                 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
620                        <&dmac1 0xcd>, <&dmac1 0xce>;
621                 dma-names = "tx", "rx", "tx", "rx";
622                 max-frequency = <195000000>;
623                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
624                 resets = <&cpg 314>;
625                 status = "disabled";
626         };
627
628         sdhi1: sd@ee140000 {
629                 compatible = "renesas,sdhi-r8a7791";
630                 reg = <0 0xee140000 0 0x100>;
631                 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
632                 clocks = <&cpg CPG_MOD 312>;
633                 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
634                        <&dmac1 0xc1>, <&dmac1 0xc2>;
635                 dma-names = "tx", "rx", "tx", "rx";
636                 max-frequency = <97500000>;
637                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
638                 resets = <&cpg 312>;
639                 status = "disabled";
640         };
641
642         sdhi2: sd@ee160000 {
643                 compatible = "renesas,sdhi-r8a7791";
644                 reg = <0 0xee160000 0 0x100>;
645                 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
646                 clocks = <&cpg CPG_MOD 311>;
647                 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
648                        <&dmac1 0xd3>, <&dmac1 0xd4>;
649                 dma-names = "tx", "rx", "tx", "rx";
650                 max-frequency = <97500000>;
651                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
652                 resets = <&cpg 311>;
653                 status = "disabled";
654         };
655
656         scifa0: serial@e6c40000 {
657                 compatible = "renesas,scifa-r8a7791",
658                              "renesas,rcar-gen2-scifa", "renesas,scifa";
659                 reg = <0 0xe6c40000 0 64>;
660                 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
661                 clocks = <&cpg CPG_MOD 204>;
662                 clock-names = "fck";
663                 dmas = <&dmac0 0x21>, <&dmac0 0x22>,
664                        <&dmac1 0x21>, <&dmac1 0x22>;
665                 dma-names = "tx", "rx", "tx", "rx";
666                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
667                 resets = <&cpg 204>;
668                 status = "disabled";
669         };
670
671         scifa1: serial@e6c50000 {
672                 compatible = "renesas,scifa-r8a7791",
673                              "renesas,rcar-gen2-scifa", "renesas,scifa";
674                 reg = <0 0xe6c50000 0 64>;
675                 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
676                 clocks = <&cpg CPG_MOD 203>;
677                 clock-names = "fck";
678                 dmas = <&dmac0 0x25>, <&dmac0 0x26>,
679                        <&dmac1 0x25>, <&dmac1 0x26>;
680                 dma-names = "tx", "rx", "tx", "rx";
681                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
682                 resets = <&cpg 203>;
683                 status = "disabled";
684         };
685
686         scifa2: serial@e6c60000 {
687                 compatible = "renesas,scifa-r8a7791",
688                              "renesas,rcar-gen2-scifa", "renesas,scifa";
689                 reg = <0 0xe6c60000 0 64>;
690                 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
691                 clocks = <&cpg CPG_MOD 202>;
692                 clock-names = "fck";
693                 dmas = <&dmac0 0x27>, <&dmac0 0x28>,
694                        <&dmac1 0x27>, <&dmac1 0x28>;
695                 dma-names = "tx", "rx", "tx", "rx";
696                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
697                 resets = <&cpg 202>;
698                 status = "disabled";
699         };
700
701         scifa3: serial@e6c70000 {
702                 compatible = "renesas,scifa-r8a7791",
703                              "renesas,rcar-gen2-scifa", "renesas,scifa";
704                 reg = <0 0xe6c70000 0 64>;
705                 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
706                 clocks = <&cpg CPG_MOD 1106>;
707                 clock-names = "fck";
708                 dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
709                        <&dmac1 0x1b>, <&dmac1 0x1c>;
710                 dma-names = "tx", "rx", "tx", "rx";
711                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
712                 resets = <&cpg 1106>;
713                 status = "disabled";
714         };
715
716         scifa4: serial@e6c78000 {
717                 compatible = "renesas,scifa-r8a7791",
718                              "renesas,rcar-gen2-scifa", "renesas,scifa";
719                 reg = <0 0xe6c78000 0 64>;
720                 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
721                 clocks = <&cpg CPG_MOD 1107>;
722                 clock-names = "fck";
723                 dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
724                        <&dmac1 0x1f>, <&dmac1 0x20>;
725                 dma-names = "tx", "rx", "tx", "rx";
726                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
727                 resets = <&cpg 1107>;
728                 status = "disabled";
729         };
730
731         scifa5: serial@e6c80000 {
732                 compatible = "renesas,scifa-r8a7791",
733                              "renesas,rcar-gen2-scifa", "renesas,scifa";
734                 reg = <0 0xe6c80000 0 64>;
735                 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
736                 clocks = <&cpg CPG_MOD 1108>;
737                 clock-names = "fck";
738                 dmas = <&dmac0 0x23>, <&dmac0 0x24>,
739                        <&dmac1 0x23>, <&dmac1 0x24>;
740                 dma-names = "tx", "rx", "tx", "rx";
741                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
742                 resets = <&cpg 1108>;
743                 status = "disabled";
744         };
745
746         scifb0: serial@e6c20000 {
747                 compatible = "renesas,scifb-r8a7791",
748                              "renesas,rcar-gen2-scifb", "renesas,scifb";
749                 reg = <0 0xe6c20000 0 0x100>;
750                 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
751                 clocks = <&cpg CPG_MOD 206>;
752                 clock-names = "fck";
753                 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
754                        <&dmac1 0x3d>, <&dmac1 0x3e>;
755                 dma-names = "tx", "rx", "tx", "rx";
756                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
757                 resets = <&cpg 206>;
758                 status = "disabled";
759         };
760
761         scifb1: serial@e6c30000 {
762                 compatible = "renesas,scifb-r8a7791",
763                              "renesas,rcar-gen2-scifb", "renesas,scifb";
764                 reg = <0 0xe6c30000 0 0x100>;
765                 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
766                 clocks = <&cpg CPG_MOD 207>;
767                 clock-names = "fck";
768                 dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
769                        <&dmac1 0x19>, <&dmac1 0x1a>;
770                 dma-names = "tx", "rx", "tx", "rx";
771                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
772                 resets = <&cpg 207>;
773                 status = "disabled";
774         };
775
776         scifb2: serial@e6ce0000 {
777                 compatible = "renesas,scifb-r8a7791",
778                              "renesas,rcar-gen2-scifb", "renesas,scifb";
779                 reg = <0 0xe6ce0000 0 0x100>;
780                 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
781                 clocks = <&cpg CPG_MOD 216>;
782                 clock-names = "fck";
783                 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
784                        <&dmac1 0x1d>, <&dmac1 0x1e>;
785                 dma-names = "tx", "rx", "tx", "rx";
786                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
787                 resets = <&cpg 216>;
788                 status = "disabled";
789         };
790
791         scif0: serial@e6e60000 {
792                 compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
793                              "renesas,scif";
794                 reg = <0 0xe6e60000 0 64>;
795                 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
796                 clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
797                          <&scif_clk>;
798                 clock-names = "fck", "brg_int", "scif_clk";
799                 dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
800                        <&dmac1 0x29>, <&dmac1 0x2a>;
801                 dma-names = "tx", "rx", "tx", "rx";
802                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
803                 resets = <&cpg 721>;
804                 status = "disabled";
805         };
806
807         scif1: serial@e6e68000 {
808                 compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
809                              "renesas,scif";
810                 reg = <0 0xe6e68000 0 64>;
811                 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
812                 clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
813                          <&scif_clk>;
814                 clock-names = "fck", "brg_int", "scif_clk";
815                 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
816                        <&dmac1 0x2d>, <&dmac1 0x2e>;
817                 dma-names = "tx", "rx", "tx", "rx";
818                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
819                 resets = <&cpg 720>;
820                 status = "disabled";
821         };
822
823         adc: adc@e6e54000 {
824                 compatible = "renesas,r8a7791-gyroadc", "renesas,rcar-gyroadc";
825                 reg = <0 0xe6e54000 0 64>;
826                 clocks = <&cpg CPG_MOD 901>;
827                 clock-names = "fck";
828                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
829                 resets = <&cpg 901>;
830                 status = "disabled";
831         };
832
833         scif2: serial@e6e58000 {
834                 compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
835                              "renesas,scif";
836                 reg = <0 0xe6e58000 0 64>;
837                 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
838                 clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
839                          <&scif_clk>;
840                 clock-names = "fck", "brg_int", "scif_clk";
841                 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
842                        <&dmac1 0x2b>, <&dmac1 0x2c>;
843                 dma-names = "tx", "rx", "tx", "rx";
844                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
845                 resets = <&cpg 719>;
846                 status = "disabled";
847         };
848
849         scif3: serial@e6ea8000 {
850                 compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
851                              "renesas,scif";
852                 reg = <0 0xe6ea8000 0 64>;
853                 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
854                 clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
855                          <&scif_clk>;
856                 clock-names = "fck", "brg_int", "scif_clk";
857                 dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
858                        <&dmac1 0x2f>, <&dmac1 0x30>;
859                 dma-names = "tx", "rx", "tx", "rx";
860                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
861                 resets = <&cpg 718>;
862                 status = "disabled";
863         };
864
865         scif4: serial@e6ee0000 {
866                 compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
867                              "renesas,scif";
868                 reg = <0 0xe6ee0000 0 64>;
869                 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
870                 clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
871                          <&scif_clk>;
872                 clock-names = "fck", "brg_int", "scif_clk";
873                 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
874                        <&dmac1 0xfb>, <&dmac1 0xfc>;
875                 dma-names = "tx", "rx", "tx", "rx";
876                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
877                 resets = <&cpg 715>;
878                 status = "disabled";
879         };
880
881         scif5: serial@e6ee8000 {
882                 compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
883                              "renesas,scif";
884                 reg = <0 0xe6ee8000 0 64>;
885                 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
886                 clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
887                          <&scif_clk>;
888                 clock-names = "fck", "brg_int", "scif_clk";
889                 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
890                        <&dmac1 0xfd>, <&dmac1 0xfe>;
891                 dma-names = "tx", "rx", "tx", "rx";
892                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
893                 resets = <&cpg 714>;
894                 status = "disabled";
895         };
896
897         hscif0: serial@e62c0000 {
898                 compatible = "renesas,hscif-r8a7791",
899                              "renesas,rcar-gen2-hscif", "renesas,hscif";
900                 reg = <0 0xe62c0000 0 96>;
901                 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
902                 clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
903                          <&scif_clk>;
904                 clock-names = "fck", "brg_int", "scif_clk";
905                 dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
906                        <&dmac1 0x39>, <&dmac1 0x3a>;
907                 dma-names = "tx", "rx", "tx", "rx";
908                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
909                 resets = <&cpg 717>;
910                 status = "disabled";
911         };
912
913         hscif1: serial@e62c8000 {
914                 compatible = "renesas,hscif-r8a7791",
915                              "renesas,rcar-gen2-hscif", "renesas,hscif";
916                 reg = <0 0xe62c8000 0 96>;
917                 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
918                 clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
919                          <&scif_clk>;
920                 clock-names = "fck", "brg_int", "scif_clk";
921                 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
922                        <&dmac1 0x4d>, <&dmac1 0x4e>;
923                 dma-names = "tx", "rx", "tx", "rx";
924                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
925                 resets = <&cpg 716>;
926                 status = "disabled";
927         };
928
929         hscif2: serial@e62d0000 {
930                 compatible = "renesas,hscif-r8a7791",
931                              "renesas,rcar-gen2-hscif", "renesas,hscif";
932                 reg = <0 0xe62d0000 0 96>;
933                 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
934                 clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
935                          <&scif_clk>;
936                 clock-names = "fck", "brg_int", "scif_clk";
937                 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
938                        <&dmac1 0x3b>, <&dmac1 0x3c>;
939                 dma-names = "tx", "rx", "tx", "rx";
940                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
941                 resets = <&cpg 713>;
942                 status = "disabled";
943         };
944
945         icram0: sram@e63a0000 {
946                 compatible = "mmio-sram";
947                 reg = <0 0xe63a0000 0 0x12000>;
948         };
949
950         icram1: sram@e63c0000 {
951                 compatible = "mmio-sram";
952                 reg = <0 0xe63c0000 0 0x1000>;
953                 #address-cells = <1>;
954                 #size-cells = <1>;
955                 ranges = <0 0 0xe63c0000 0x1000>;
956
957                 smp-sram@0 {
958                         compatible = "renesas,smp-sram";
959                         reg = <0 0x10>;
960                 };
961         };
962
963         ether: ethernet@ee700000 {
964                 compatible = "renesas,ether-r8a7791";
965                 reg = <0 0xee700000 0 0x400>;
966                 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
967                 clocks = <&cpg CPG_MOD 813>;
968                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
969                 resets = <&cpg 813>;
970                 phy-mode = "rmii";
971                 #address-cells = <1>;
972                 #size-cells = <0>;
973                 status = "disabled";
974         };
975
976         avb: ethernet@e6800000 {
977                 compatible = "renesas,etheravb-r8a7791",
978                              "renesas,etheravb-rcar-gen2";
979                 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
980                 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
981                 clocks = <&cpg CPG_MOD 812>;
982                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
983                 resets = <&cpg 812>;
984                 #address-cells = <1>;
985                 #size-cells = <0>;
986                 status = "disabled";
987         };
988
989         sata0: sata@ee300000 {
990                 compatible = "renesas,sata-r8a7791", "renesas,rcar-gen2-sata";
991                 reg = <0 0xee300000 0 0x2000>;
992                 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
993                 clocks = <&cpg CPG_MOD 815>;
994                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
995                 resets = <&cpg 815>;
996                 status = "disabled";
997         };
998
999         sata1: sata@ee500000 {
1000                 compatible = "renesas,sata-r8a7791", "renesas,rcar-gen2-sata";
1001                 reg = <0 0xee500000 0 0x2000>;
1002                 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
1003                 clocks = <&cpg CPG_MOD 814>;
1004                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1005                 resets = <&cpg 814>;
1006                 status = "disabled";
1007         };
1008
1009         hsusb: usb@e6590000 {
1010                 compatible = "renesas,usbhs-r8a7791", "renesas,rcar-gen2-usbhs";
1011                 reg = <0 0xe6590000 0 0x100>;
1012                 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
1013                 clocks = <&cpg CPG_MOD 704>;
1014                 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
1015                        <&usb_dmac1 0>, <&usb_dmac1 1>;
1016                 dma-names = "ch0", "ch1", "ch2", "ch3";
1017                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1018                 resets = <&cpg 704>;
1019                 renesas,buswait = <4>;
1020                 phys = <&usb0 1>;
1021                 phy-names = "usb";
1022                 status = "disabled";
1023         };
1024
1025         usbphy: usb-phy@e6590100 {
1026                 compatible = "renesas,usb-phy-r8a7791",
1027                              "renesas,rcar-gen2-usb-phy";
1028                 reg = <0 0xe6590100 0 0x100>;
1029                 #address-cells = <1>;
1030                 #size-cells = <0>;
1031                 clocks = <&cpg CPG_MOD 704>;
1032                 clock-names = "usbhs";
1033                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1034                 resets = <&cpg 704>;
1035                 status = "disabled";
1036
1037                 usb0: usb-channel@0 {
1038                         reg = <0>;
1039                         #phy-cells = <1>;
1040                 };
1041                 usb2: usb-channel@2 {
1042                         reg = <2>;
1043                         #phy-cells = <1>;
1044                 };
1045         };
1046
1047         vin0: video@e6ef0000 {
1048                 compatible = "renesas,vin-r8a7791", "renesas,rcar-gen2-vin";
1049                 reg = <0 0xe6ef0000 0 0x1000>;
1050                 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1051                 clocks = <&cpg CPG_MOD 811>;
1052                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1053                 resets = <&cpg 811>;
1054                 status = "disabled";
1055         };
1056
1057         vin1: video@e6ef1000 {
1058                 compatible = "renesas,vin-r8a7791", "renesas,rcar-gen2-vin";
1059                 reg = <0 0xe6ef1000 0 0x1000>;
1060                 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1061                 clocks = <&cpg CPG_MOD 810>;
1062                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1063                 resets = <&cpg 810>;
1064                 status = "disabled";
1065         };
1066
1067         vin2: video@e6ef2000 {
1068                 compatible = "renesas,vin-r8a7791", "renesas,rcar-gen2-vin";
1069                 reg = <0 0xe6ef2000 0 0x1000>;
1070                 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1071                 clocks = <&cpg CPG_MOD 809>;
1072                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1073                 resets = <&cpg 809>;
1074                 status = "disabled";
1075         };
1076
1077         vsp@fe928000 {
1078                 compatible = "renesas,vsp1";
1079                 reg = <0 0xfe928000 0 0x8000>;
1080                 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
1081                 clocks = <&cpg CPG_MOD 131>;
1082                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1083                 resets = <&cpg 131>;
1084         };
1085
1086         vsp@fe930000 {
1087                 compatible = "renesas,vsp1";
1088                 reg = <0 0xfe930000 0 0x8000>;
1089                 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1090                 clocks = <&cpg CPG_MOD 128>;
1091                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1092                 resets = <&cpg 128>;
1093         };
1094
1095         vsp@fe938000 {
1096                 compatible = "renesas,vsp1";
1097                 reg = <0 0xfe938000 0 0x8000>;
1098                 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
1099                 clocks = <&cpg CPG_MOD 127>;
1100                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1101                 resets = <&cpg 127>;
1102         };
1103
1104         du: display@feb00000 {
1105                 compatible = "renesas,du-r8a7791";
1106                 reg = <0 0xfeb00000 0 0x40000>,
1107                       <0 0xfeb90000 0 0x1c>;
1108                 reg-names = "du", "lvds.0";
1109                 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1110                              <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
1111                 clocks = <&cpg CPG_MOD 724>,
1112                          <&cpg CPG_MOD 723>,
1113                          <&cpg CPG_MOD 726>;
1114                 clock-names = "du.0", "du.1", "lvds.0";
1115                 status = "disabled";
1116
1117                 ports {
1118                         #address-cells = <1>;
1119                         #size-cells = <0>;
1120
1121                         port@0 {
1122                                 reg = <0>;
1123                                 du_out_rgb: endpoint {
1124                                 };
1125                         };
1126                         port@1 {
1127                                 reg = <1>;
1128                                 du_out_lvds0: endpoint {
1129                                 };
1130                         };
1131                 };
1132         };
1133
1134         can0: can@e6e80000 {
1135                 compatible = "renesas,can-r8a7791", "renesas,rcar-gen2-can";
1136                 reg = <0 0xe6e80000 0 0x1000>;
1137                 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1138                 clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7791_CLK_RCAN>,
1139                          <&can_clk>;
1140                 clock-names = "clkp1", "clkp2", "can_clk";
1141                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1142                 resets = <&cpg 916>;
1143                 status = "disabled";
1144         };
1145
1146         can1: can@e6e88000 {
1147                 compatible = "renesas,can-r8a7791", "renesas,rcar-gen2-can";
1148                 reg = <0 0xe6e88000 0 0x1000>;
1149                 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1150                 clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7791_CLK_RCAN>,
1151                          <&can_clk>;
1152                 clock-names = "clkp1", "clkp2", "can_clk";
1153                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1154                 resets = <&cpg 915>;
1155                 status = "disabled";
1156         };
1157
1158         jpu: jpeg-codec@fe980000 {
1159                 compatible = "renesas,jpu-r8a7791", "renesas,rcar-gen2-jpu";
1160                 reg = <0 0xfe980000 0 0x10300>;
1161                 interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
1162                 clocks = <&cpg CPG_MOD 106>;
1163                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1164                 resets = <&cpg 106>;
1165         };
1166
1167         /* External root clock */
1168         extal_clk: extal {
1169                 compatible = "fixed-clock";
1170                 #clock-cells = <0>;
1171                 /* This value must be overridden by the board. */
1172                 clock-frequency = <0>;
1173         };
1174
1175         /*
1176          * The external audio clocks are configured as 0 Hz fixed frequency
1177          * clocks by default.
1178          * Boards that provide audio clocks should override them.
1179          */
1180         audio_clk_a: audio_clk_a {
1181                 compatible = "fixed-clock";
1182                 #clock-cells = <0>;
1183                 clock-frequency = <0>;
1184         };
1185         audio_clk_b: audio_clk_b {
1186                 compatible = "fixed-clock";
1187                 #clock-cells = <0>;
1188                 clock-frequency = <0>;
1189         };
1190         audio_clk_c: audio_clk_c {
1191                 compatible = "fixed-clock";
1192                 #clock-cells = <0>;
1193                 clock-frequency = <0>;
1194         };
1195
1196         /* External PCIe clock - can be overridden by the board */
1197         pcie_bus_clk: pcie_bus {
1198                 compatible = "fixed-clock";
1199                 #clock-cells = <0>;
1200                 clock-frequency = <0>;
1201         };
1202
1203         /* External SCIF clock */
1204         scif_clk: scif {
1205                 compatible = "fixed-clock";
1206                 #clock-cells = <0>;
1207                 /* This value must be overridden by the board. */
1208                 clock-frequency = <0>;
1209         };
1210
1211         /* External USB clock - can be overridden by the board */
1212         usb_extal_clk: usb_extal {
1213                 compatible = "fixed-clock";
1214                 #clock-cells = <0>;
1215                 clock-frequency = <48000000>;
1216         };
1217
1218         /* External CAN clock */
1219         can_clk: can {
1220                 compatible = "fixed-clock";
1221                 #clock-cells = <0>;
1222                 /* This value must be overridden by the board. */
1223                 clock-frequency = <0>;
1224         };
1225
1226         cpg: clock-controller@e6150000 {
1227                 compatible = "renesas,r8a7791-cpg-mssr";
1228                 reg = <0 0xe6150000 0 0x1000>;
1229                 clocks = <&extal_clk>, <&usb_extal_clk>;
1230                 clock-names = "extal", "usb_extal";
1231                 #clock-cells = <2>;
1232                 #power-domain-cells = <0>;
1233                 #reset-cells = <1>;
1234         };
1235
1236         rst: reset-controller@e6160000 {
1237                 compatible = "renesas,r8a7791-rst";
1238                 reg = <0 0xe6160000 0 0x0100>;
1239         };
1240
1241         prr: chipid@ff000044 {
1242                 compatible = "renesas,prr";
1243                 reg = <0 0xff000044 0 4>;
1244         };
1245
1246         sysc: system-controller@e6180000 {
1247                 compatible = "renesas,r8a7791-sysc";
1248                 reg = <0 0xe6180000 0 0x0200>;
1249                 #power-domain-cells = <1>;
1250         };
1251
1252         qspi: spi@e6b10000 {
1253                 compatible = "renesas,qspi-r8a7791", "renesas,qspi";
1254                 reg = <0 0xe6b10000 0 0x2c>;
1255                 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
1256                 clocks = <&cpg CPG_MOD 917>;
1257                 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
1258                        <&dmac1 0x17>, <&dmac1 0x18>;
1259                 dma-names = "tx", "rx", "tx", "rx";
1260                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1261                 resets = <&cpg 917>;
1262                 num-cs = <1>;
1263                 #address-cells = <1>;
1264                 #size-cells = <0>;
1265                 status = "disabled";
1266         };
1267
1268         msiof0: spi@e6e20000 {
1269                 compatible = "renesas,msiof-r8a7791",
1270                              "renesas,rcar-gen2-msiof";
1271                 reg = <0 0xe6e20000 0 0x0064>;
1272                 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1273                 clocks = <&cpg CPG_MOD 000>;
1274                 dmas = <&dmac0 0x51>, <&dmac0 0x52>,
1275                        <&dmac1 0x51>, <&dmac1 0x52>;
1276                 dma-names = "tx", "rx", "tx", "rx";
1277                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1278                 resets = <&cpg 0>;
1279                 #address-cells = <1>;
1280                 #size-cells = <0>;
1281                 status = "disabled";
1282         };
1283
1284         msiof1: spi@e6e10000 {
1285                 compatible = "renesas,msiof-r8a7791",
1286                              "renesas,rcar-gen2-msiof";
1287                 reg = <0 0xe6e10000 0 0x0064>;
1288                 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1289                 clocks = <&cpg CPG_MOD 208>;
1290                 dmas = <&dmac0 0x55>, <&dmac0 0x56>,
1291                        <&dmac1 0x55>, <&dmac1 0x56>;
1292                 dma-names = "tx", "rx", "tx", "rx";
1293                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1294                 resets = <&cpg 208>;
1295                 #address-cells = <1>;
1296                 #size-cells = <0>;
1297                 status = "disabled";
1298         };
1299
1300         msiof2: spi@e6e00000 {
1301                 compatible = "renesas,msiof-r8a7791",
1302                              "renesas,rcar-gen2-msiof";
1303                 reg = <0 0xe6e00000 0 0x0064>;
1304                 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1305                 clocks = <&cpg CPG_MOD 205>;
1306                 dmas = <&dmac0 0x41>, <&dmac0 0x42>,
1307                        <&dmac1 0x41>, <&dmac1 0x42>;
1308                 dma-names = "tx", "rx", "tx", "rx";
1309                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1310                 resets = <&cpg 205>;
1311                 #address-cells = <1>;
1312                 #size-cells = <0>;
1313                 status = "disabled";
1314         };
1315
1316         xhci: usb@ee000000 {
1317                 compatible = "renesas,xhci-r8a7791", "renesas,rcar-gen2-xhci";
1318                 reg = <0 0xee000000 0 0xc00>;
1319                 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1320                 clocks = <&cpg CPG_MOD 328>;
1321                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1322                 resets = <&cpg 328>;
1323                 phys = <&usb2 1>;
1324                 phy-names = "usb";
1325                 status = "disabled";
1326         };
1327
1328         pci0: pci@ee090000 {
1329                 compatible = "renesas,pci-r8a7791", "renesas,pci-rcar-gen2";
1330                 device_type = "pci";
1331                 reg = <0 0xee090000 0 0xc00>,
1332                       <0 0xee080000 0 0x1100>;
1333                 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1334                 clocks = <&cpg CPG_MOD 703>;
1335                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1336                 resets = <&cpg 703>;
1337                 status = "disabled";
1338
1339                 bus-range = <0 0>;
1340                 #address-cells = <3>;
1341                 #size-cells = <2>;
1342                 #interrupt-cells = <1>;
1343                 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1344                 interrupt-map-mask = <0xff00 0 0 0x7>;
1345                 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1346                                  0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1347                                  0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1348
1349                 usb@1,0 {
1350                         reg = <0x800 0 0 0 0>;
1351                         phys = <&usb0 0>;
1352                         phy-names = "usb";
1353                 };
1354
1355                 usb@2,0 {
1356                         reg = <0x1000 0 0 0 0>;
1357                         phys = <&usb0 0>;
1358                         phy-names = "usb";
1359                 };
1360         };
1361
1362         pci1: pci@ee0d0000 {
1363                 compatible = "renesas,pci-r8a7791", "renesas,pci-rcar-gen2";
1364                 device_type = "pci";
1365                 reg = <0 0xee0d0000 0 0xc00>,
1366                       <0 0xee0c0000 0 0x1100>;
1367                 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1368                 clocks = <&cpg CPG_MOD 703>;
1369                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1370                 resets = <&cpg 703>;
1371                 status = "disabled";
1372
1373                 bus-range = <1 1>;
1374                 #address-cells = <3>;
1375                 #size-cells = <2>;
1376                 #interrupt-cells = <1>;
1377                 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1378                 interrupt-map-mask = <0xff00 0 0 0x7>;
1379                 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1380                                  0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1381                                  0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1382
1383                 usb@1,0 {
1384                         reg = <0x10800 0 0 0 0>;
1385                         phys = <&usb2 0>;
1386                         phy-names = "usb";
1387                 };
1388
1389                 usb@2,0 {
1390                         reg = <0x11000 0 0 0 0>;
1391                         phys = <&usb2 0>;
1392                         phy-names = "usb";
1393                 };
1394         };
1395
1396         pciec: pcie@fe000000 {
1397                 compatible = "renesas,pcie-r8a7791", "renesas,pcie-rcar-gen2";
1398                 reg = <0 0xfe000000 0 0x80000>;
1399                 #address-cells = <3>;
1400                 #size-cells = <2>;
1401                 bus-range = <0x00 0xff>;
1402                 device_type = "pci";
1403                 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
1404                           0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
1405                           0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
1406                           0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1407                 /* Map all possible DDR as inbound ranges */
1408                 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
1409                               0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>;
1410                 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1411                              <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1412                              <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1413                 #interrupt-cells = <1>;
1414                 interrupt-map-mask = <0 0 0 0>;
1415                 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1416                 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1417                 clock-names = "pcie", "pcie_bus";
1418                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1419                 resets = <&cpg 319>;
1420                 status = "disabled";
1421         };
1422
1423         ipmmu_sy0: mmu@e6280000 {
1424                 compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
1425                 reg = <0 0xe6280000 0 0x1000>;
1426                 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
1427                              <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
1428                 #iommu-cells = <1>;
1429                 status = "disabled";
1430         };
1431
1432         ipmmu_sy1: mmu@e6290000 {
1433                 compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
1434                 reg = <0 0xe6290000 0 0x1000>;
1435                 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
1436                 #iommu-cells = <1>;
1437                 status = "disabled";
1438         };
1439
1440         ipmmu_ds: mmu@e6740000 {
1441                 compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
1442                 reg = <0 0xe6740000 0 0x1000>;
1443                 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
1444                              <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
1445                 #iommu-cells = <1>;
1446                 status = "disabled";
1447         };
1448
1449         ipmmu_mp: mmu@ec680000 {
1450                 compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
1451                 reg = <0 0xec680000 0 0x1000>;
1452                 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
1453                 #iommu-cells = <1>;
1454                 status = "disabled";
1455         };
1456
1457         ipmmu_mx: mmu@fe951000 {
1458                 compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
1459                 reg = <0 0xfe951000 0 0x1000>;
1460                 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
1461                              <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
1462                 #iommu-cells = <1>;
1463                 status = "disabled";
1464         };
1465
1466         ipmmu_rt: mmu@ffc80000 {
1467                 compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
1468                 reg = <0 0xffc80000 0 0x1000>;
1469                 interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
1470                 #iommu-cells = <1>;
1471                 status = "disabled";
1472         };
1473
1474         ipmmu_gp: mmu@e62a0000 {
1475                 compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
1476                 reg = <0 0xe62a0000 0 0x1000>;
1477                 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
1478                              <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
1479                 #iommu-cells = <1>;
1480                 status = "disabled";
1481         };
1482
1483         rcar_sound: sound@ec500000 {
1484                 /*
1485                  * #sound-dai-cells is required
1486                  *
1487                  * Single DAI : #sound-dai-cells = <0>;         <&rcar_sound>;
1488                  * Multi  DAI : #sound-dai-cells = <1>;         <&rcar_sound N>;
1489                  */
1490                 compatible =  "renesas,rcar_sound-r8a7791", "renesas,rcar_sound-gen2";
1491                 reg =   <0 0xec500000 0 0x1000>, /* SCU */
1492                         <0 0xec5a0000 0 0x100>,  /* ADG */
1493                         <0 0xec540000 0 0x1000>, /* SSIU */
1494                         <0 0xec541000 0 0x280>,  /* SSI */
1495                         <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
1496                 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1497
1498                 clocks = <&cpg CPG_MOD 1005>,
1499                          <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1500                          <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1501                          <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1502                          <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1503                          <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1504                          <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1505                          <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1506                          <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1507                          <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1508                          <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1509                          <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1510                          <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1511                          <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1512                          <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
1513                          <&cpg CPG_CORE R8A7791_CLK_M2>;
1514                 clock-names = "ssi-all",
1515                                 "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1516                                 "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
1517                                 "src.9", "src.8", "src.7", "src.6", "src.5",
1518                                 "src.4", "src.3", "src.2", "src.1", "src.0",
1519                                 "ctu.0", "ctu.1",
1520                                 "mix.0", "mix.1",
1521                                 "dvc.0", "dvc.1",
1522                                 "clk_a", "clk_b", "clk_c", "clk_i";
1523                 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1524                 resets = <&cpg 1005>,
1525                          <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
1526                          <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
1527                          <&cpg 1014>, <&cpg 1015>;
1528                 reset-names = "ssi-all",
1529                               "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1530                               "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
1531
1532                 status = "disabled";
1533
1534                 rcar_sound,dvc {
1535                         dvc0: dvc-0 {
1536                                 dmas = <&audma1 0xbc>;
1537                                 dma-names = "tx";
1538                         };
1539                         dvc1: dvc-1 {
1540                                 dmas = <&audma1 0xbe>;
1541                                 dma-names = "tx";
1542                         };
1543                 };
1544
1545                 rcar_sound,mix {
1546                         mix0: mix-0 { };
1547                         mix1: mix-1 { };
1548                 };
1549
1550                 rcar_sound,ctu {
1551                         ctu00: ctu-0 { };
1552                         ctu01: ctu-1 { };
1553                         ctu02: ctu-2 { };
1554                         ctu03: ctu-3 { };
1555                         ctu10: ctu-4 { };
1556                         ctu11: ctu-5 { };
1557                         ctu12: ctu-6 { };
1558                         ctu13: ctu-7 { };
1559                 };
1560
1561                 rcar_sound,src {
1562                         src0: src-0 {
1563                                 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1564                                 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1565                                 dma-names = "rx", "tx";
1566                         };
1567                         src1: src-1 {
1568                                 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1569                                 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1570                                 dma-names = "rx", "tx";
1571                         };
1572                         src2: src-2 {
1573                                 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1574                                 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1575                                 dma-names = "rx", "tx";
1576                         };
1577                         src3: src-3 {
1578                                 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1579                                 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1580                                 dma-names = "rx", "tx";
1581                         };
1582                         src4: src-4 {
1583                                 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1584                                 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1585                                 dma-names = "rx", "tx";
1586                         };
1587                         src5: src-5 {
1588                                 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1589                                 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1590                                 dma-names = "rx", "tx";
1591                         };
1592                         src6: src-6 {
1593                                 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1594                                 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1595                                 dma-names = "rx", "tx";
1596                         };
1597                         src7: src-7 {
1598                                 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1599                                 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1600                                 dma-names = "rx", "tx";
1601                         };
1602                         src8: src-8 {
1603                                 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1604                                 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1605                                 dma-names = "rx", "tx";
1606                         };
1607                         src9: src-9 {
1608                                 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1609                                 dmas = <&audma0 0x97>, <&audma1 0xba>;
1610                                 dma-names = "rx", "tx";
1611                         };
1612                 };
1613
1614                 rcar_sound,ssi {
1615                         ssi0: ssi-0 {
1616                                 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1617                                 dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1618                                 dma-names = "rx", "tx", "rxu", "txu";
1619                         };
1620                         ssi1: ssi-1 {
1621                                  interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1622                                 dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1623                                 dma-names = "rx", "tx", "rxu", "txu";
1624                         };
1625                         ssi2: ssi-2 {
1626                                 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1627                                 dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1628                                 dma-names = "rx", "tx", "rxu", "txu";
1629                         };
1630                         ssi3: ssi-3 {
1631                                 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1632                                 dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1633                                 dma-names = "rx", "tx", "rxu", "txu";
1634                         };
1635                         ssi4: ssi-4 {
1636                                 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1637                                 dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1638                                 dma-names = "rx", "tx", "rxu", "txu";
1639                         };
1640                         ssi5: ssi-5 {
1641                                 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1642                                 dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1643                                 dma-names = "rx", "tx", "rxu", "txu";
1644                         };
1645                         ssi6: ssi-6 {
1646                                 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1647                                 dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1648                                 dma-names = "rx", "tx", "rxu", "txu";
1649                         };
1650                         ssi7: ssi-7 {
1651                                 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1652                                 dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1653                                 dma-names = "rx", "tx", "rxu", "txu";
1654                         };
1655                         ssi8: ssi-8 {
1656                                 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1657                                 dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1658                                 dma-names = "rx", "tx", "rxu", "txu";
1659                         };
1660                         ssi9: ssi-9 {
1661                                 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1662                                 dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1663                                 dma-names = "rx", "tx", "rxu", "txu";
1664                         };
1665                 };
1666         };
1667 };