arch/arm/boot/dts/r8a7779-marzen.dts

   1 /*
   2  * Device Tree Source for the Marzen board
   3  *
   4  * Copyright (C) 2013 Renesas Solutions Corp.
   5  * Copyright (C) 2013 Simon Horman
   6  *
   7  * This file is licensed under the terms of the GNU General Public License
   8  * version 2.  This program is licensed "as is" without any warranty of any
   9  * kind, whether express or implied.
  10  */
  11
  12 /dts-v1/;
  13 #include "r8a7779.dtsi"
  14 #include <dt-bindings/gpio/gpio.h>
  15 #include <dt-bindings/interrupt-controller/irq.h>
  16
  17 / {
  18         model = "marzen";
  19         compatible = "renesas,marzen", "renesas,r8a7779";
  20
  21         aliases {
  22                 serial0 = &scif2;
  23                 serial1 = &scif4;
  24         };
  25
  26         chosen {
  27                 bootargs = "ignore_loglevel root=/dev/nfs ip=on";
  28                 stdout-path = "serial0:115200n8";
  29         };
  30
  31         memory@60000000 {
  32                 device_type = "memory";
  33                 reg = <0x60000000 0x40000000>;
  34         };
  35
  36         fixedregulator3v3: regulator-3v3 {
  37                 compatible = "regulator-fixed";
  38                 regulator-name = "fixed-3.3V";
  39                 regulator-min-microvolt = <3300000>;
  40                 regulator-max-microvolt = <3300000>;
  41                 regulator-boot-on;
  42                 regulator-always-on;
  43         };
  44
  45         vccq_sdhi0: regulator-vccq-sdhi0 {
  46                 compatible = "regulator-gpio";
  47
  48                 regulator-name = "SDHI0 VccQ";
  49                 regulator-min-microvolt = <1800000>;
  50                 regulator-max-microvolt = <3300000>;
  51
  52                 gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
  53                 gpios-states = <1>;
  54                 states = <3300000 1
  55                           1800000 0>;
  56         };
  57
  58         ethernet@18000000 {
  59                 compatible = "smsc,lan9220", "smsc,lan9115";
  60                 reg = <0x18000000 0x100>;
  61                 pinctrl-0 = <&ethernet_pins>;
  62                 pinctrl-names = "default";
  63
  64                 phy-mode = "mii";
  65                 interrupt-parent = <&irqpin0>;
  66                 interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
  67                 smsc,irq-push-pull;
  68                 reg-io-width = <4>;
  69                 vddvario-supply = <&fixedregulator3v3>;
  70                 vdd33a-supply = <&fixedregulator3v3>;
  71         };
  72
  73         leds {
  74                 compatible = "gpio-leds";
  75                 led2 {
  76                         gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
  77                 };
  78                 led3 {
  79                         gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>;
  80                 };
  81                 led4 {
  82                         gpios = <&gpio4 31 GPIO_ACTIVE_HIGH>;
  83                 };
  84         };
  85
  86         vga-encoder {
  87                 compatible = "adi,adv7123";
  88
  89                 ports {
  90                         #address-cells = <1>;
  91                         #size-cells = <0>;
  92
  93                         port@0 {
  94                                 reg = <0>;
  95                                 vga_enc_in: endpoint {
  96                                         remote-endpoint = <&du_out_rgb0>;
  97                                 };
  98                         };
  99                         port@1 {
 100                                 reg = <1>;
 101                                 vga_enc_out: endpoint {
 102                                         remote-endpoint = <&vga_in>;
 103                                 };
 104                         };
 105                 };
 106         };
 107
 108         vga {
 109                 compatible = "vga-connector";
 110
 111                 port {
 112                         vga_in: endpoint {
 113                                 remote-endpoint = <&vga_enc_out>;
 114                         };
 115                 };
 116         };
 117
 118         lvds-encoder {
 119                 compatible = "thine,thc63lvdm83d";
 120
 121                 ports {
 122                         #address-cells = <1>;
 123                         #size-cells = <0>;
 124
 125                         port@0 {
 126                                 reg = <0>;
 127                                 lvds_enc_in: endpoint {
 128                                         remote-endpoint = <&du_out_rgb1>;
 129                                 };
 130                         };
 131                         port@1 {
 132                                 reg = <1>;
 133                                 lvds_connector: endpoint {
 134                                 };
 135                         };
 136                 };
 137         };
 138
 139         x3_clk: x3-clock {
 140                 compatible = "fixed-clock";
 141                 #clock-cells = <0>;
 142                 clock-frequency = <65000000>;
 143         };
 144 };
 145
 146 &du {
 147         pinctrl-0 = <&du_pins>;
 148         pinctrl-names = "default";
 149         status = "okay";
 150
 151         clocks = <&mstp1_clks R8A7779_CLK_DU>, <&x3_clk>;
 152         clock-names = "du", "dclkin.0";
 153
 154         ports {
 155                 port@0 {
 156                         endpoint {
 157                                 remote-endpoint = <&vga_enc_in>;
 158                         };
 159                 };
 160                 port@1 {
 161                         endpoint {
 162                                 remote-endpoint = <&lvds_enc_in>;
 163                         };
 164                 };
 165         };
 166 };
 167
 168 &irqpin0 {
 169         status = "okay";
 170 };
 171
 172 &extal_clk {
 173         clock-frequency = <31250000>;
 174 };
 175
 176 &tmu0 {
 177         status = "okay";
 178 };
 179
 180 &pfc {
 181         pinctrl-0 = <&scif_clk_pins>;
 182         pinctrl-names = "default";
 183
 184         du_pins: du {
 185                 du0 {
 186                         groups = "du0_rgb888", "du0_sync_1", "du0_clk_out_0", "du0_clk_in";
 187                         function = "du0";
 188                 };
 189                 du1 {
 190                         groups = "du1_rgb666", "du1_sync_1", "du1_clk_out";
 191                         function = "du1";
 192                 };
 193         };
 194
 195         scif_clk_pins: scif_clk {
 196                 groups = "scif_clk_b";
 197                 function = "scif_clk";
 198         };
 199
 200         ethernet_pins: ethernet {
 201                 intc {
 202                         groups = "intc_irq1_b";
 203                         function = "intc";
 204                 };
 205                 lbsc {
 206                         groups = "lbsc_ex_cs0";
 207                         function = "lbsc";
 208                 };
 209         };
 210
 211         scif2_pins: scif2 {
 212                 groups = "scif2_data_c";
 213                 function = "scif2";
 214         };
 215
 216         scif4_pins: scif4 {
 217                 groups = "scif4_data";
 218                 function = "scif4";
 219         };
 220
 221         sdhi0_pins: sd0 {
 222                 groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd";
 223                 function = "sdhi0";
 224         };
 225
 226         hspi0_pins: hspi0 {
 227                 groups = "hspi0";
 228                 function = "hspi0";
 229         };
 230 };
 231
 232 &sata {
 233         status = "okay";
 234 };
 235
 236 &scif2 {
 237         pinctrl-0 = <&scif2_pins>;
 238         pinctrl-names = "default";
 239
 240         status = "okay";
 241 };
 242
 243 &scif4 {
 244         pinctrl-0 = <&scif4_pins>;
 245         pinctrl-names = "default";
 246
 247         status = "okay";
 248 };
 249
 250 &scif_clk {
 251         clock-frequency = <14745600>;
 252 };
 253
 254 &sdhi0 {
 255         pinctrl-0 = <&sdhi0_pins>;
 256         pinctrl-names = "default";
 257
 258         vmmc-supply = <&fixedregulator3v3>;
 259         vqmmc-supply = <&vccq_sdhi0>;
 260         bus-width = <4>;
 261         status = "okay";
 262 };
 263
 264 &hspi0 {
 265         pinctrl-0 = <&hspi0_pins>;
 266         pinctrl-names = "default";
 267         status = "okay";
 268 };