arch/arm/boot/dts/r8a7745.dtsi

   1 /*
   2  * Device Tree Source for the r8a7745 SoC
   3  *
   4  * Copyright (C) 2016 Cogent Embedded Inc.
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2. This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 #include <dt-bindings/interrupt-controller/irq.h>
  12 #include <dt-bindings/interrupt-controller/arm-gic.h>
  13 #include <dt-bindings/clock/r8a7745-cpg-mssr.h>
  14 #include <dt-bindings/power/r8a7745-sysc.h>
  15
  16 / {
  17         compatible = "renesas,r8a7745";
  18         #address-cells = <2>;
  19         #size-cells = <2>;
  20
  21         cpus {
  22                 #address-cells = <1>;
  23                 #size-cells = <0>;
  24
  25                 cpu0: cpu@0 {
  26                         device_type = "cpu";
  27                         compatible = "arm,cortex-a7";
  28                         reg = <0>;
  29                         clock-frequency = <1000000000>;
  30                         clocks = <&cpg CPG_CORE R8A7745_CLK_Z2>;
  31                         power-domains = <&sysc R8A7745_PD_CA7_CPU0>;
  32                         next-level-cache = <&L2_CA7>;
  33                 };
  34
  35                 L2_CA7: cache-controller@0 {
  36                         compatible = "cache";
  37                         reg = <0>;
  38                         cache-unified;
  39                         cache-level = <2>;
  40                         power-domains = <&sysc R8A7745_PD_CA7_SCU>;
  41                 };
  42         };
  43
  44         soc {
  45                 compatible = "simple-bus";
  46                 interrupt-parent = <&gic>;
  47
  48                 #address-cells = <2>;
  49                 #size-cells = <2>;
  50                 ranges;
  51
  52                 gic: interrupt-controller@f1001000 {
  53                         compatible = "arm,gic-400";
  54                         #interrupt-cells = <3>;
  55                         #address-cells = <0>;
  56                         interrupt-controller;
  57                         reg = <0 0xf1001000 0 0x1000>,
  58                               <0 0xf1002000 0 0x1000>,
  59                               <0 0xf1004000 0 0x2000>,
  60                               <0 0xf1006000 0 0x2000>;
  61                         interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
  62                                                  IRQ_TYPE_LEVEL_HIGH)>;
  63                 };
  64
  65                 irqc: interrupt-controller@e61c0000 {
  66                         compatible = "renesas,irqc-r8a7745", "renesas,irqc";
  67                         #interrupt-cells = <2>;
  68                         interrupt-controller;
  69                         reg = <0 0xe61c0000 0 0x200>;
  70                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
  71                                      <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
  72                                      <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
  73                                      <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
  74                                      <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
  75                                      <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
  76                                      <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
  77                                      <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
  78                                      <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
  79                                      <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
  80                         clocks = <&cpg CPG_MOD 407>;
  81                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
  82                 };
  83
  84                 timer {
  85                         compatible = "arm,armv7-timer";
  86                         interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
  87                                                   IRQ_TYPE_LEVEL_LOW)>,
  88                                      <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) |
  89                                                   IRQ_TYPE_LEVEL_LOW)>,
  90                                      <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) |
  91                                                   IRQ_TYPE_LEVEL_LOW)>,
  92                                      <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) |
  93                                                   IRQ_TYPE_LEVEL_LOW)>;
  94                 };
  95
  96                 cpg: clock-controller@e6150000 {
  97                         compatible = "renesas,r8a7745-cpg-mssr";
  98                         reg = <0 0xe6150000 0 0x1000>;
  99                         clocks = <&extal_clk>, <&usb_extal_clk>;
 100                         clock-names = "extal", "usb_extal";
 101                         #clock-cells = <2>;
 102                         #power-domain-cells = <0>;
 103                 };
 104
 105                 sysc: system-controller@e6180000 {
 106                         compatible = "renesas,r8a7745-sysc";
 107                         reg = <0 0xe6180000 0 0x200>;
 108                         #power-domain-cells = <1>;
 109                 };
 110
 111                 rst: reset-controller@e6160000 {
 112                         compatible = "renesas,r8a7745-rst";
 113                         reg = <0 0xe6160000 0 0x100>;
 114                 };
 115
 116                 dmac0: dma-controller@e6700000 {
 117                         compatible = "renesas,dmac-r8a7745",
 118                                      "renesas,rcar-dmac";
 119                         reg = <0 0xe6700000 0 0x20000>;
 120                         interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
 121                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 122                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 123                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 124                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 125                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 126                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 127                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 128                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 129                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 130                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 131                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 132                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 133                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 134                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 135                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
 136                         interrupt-names = "error",
 137                                         "ch0", "ch1", "ch2", "ch3",
 138                                         "ch4", "ch5", "ch6", "ch7",
 139                                         "ch8", "ch9", "ch10", "ch11",
 140                                         "ch12", "ch13", "ch14";
 141                         clocks = <&cpg CPG_MOD 219>;
 142                         clock-names = "fck";
 143                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 144                         #dma-cells = <1>;
 145                         dma-channels = <15>;
 146                 };
 147
 148                 dmac1: dma-controller@e6720000 {
 149                         compatible = "renesas,dmac-r8a7745",
 150                                      "renesas,rcar-dmac";
 151                         reg = <0 0xe6720000 0 0x20000>;
 152                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 153                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 154                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 155                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 156                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 157                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 158                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 159                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 160                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 161                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 162                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 163                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 164                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 165                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 166                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 167                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
 168                         interrupt-names = "error",
 169                                         "ch0", "ch1", "ch2", "ch3",
 170                                         "ch4", "ch5", "ch6", "ch7",
 171                                         "ch8", "ch9", "ch10", "ch11",
 172                                         "ch12", "ch13", "ch14";
 173                         clocks = <&cpg CPG_MOD 218>;
 174                         clock-names = "fck";
 175                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 176                         #dma-cells = <1>;
 177                         dma-channels = <15>;
 178                 };
 179
 180                 scifa0: serial@e6c40000 {
 181                         compatible = "renesas,scifa-r8a7745",
 182                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 183                         reg = <0 0xe6c40000 0 0x40>;
 184                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 185                         clocks = <&cpg CPG_MOD 204>;
 186                         clock-names = "fck";
 187                         dmas = <&dmac0 0x21>, <&dmac0 0x22>,
 188                                <&dmac1 0x21>, <&dmac1 0x22>;
 189                         dma-names = "tx", "rx", "tx", "rx";
 190                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 191                         status = "disabled";
 192                 };
 193
 194                 scifa1: serial@e6c50000 {
 195                         compatible = "renesas,scifa-r8a7745",
 196                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 197                         reg = <0 0xe6c50000 0 0x40>;
 198                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 199                         clocks = <&cpg CPG_MOD 203>;
 200                         clock-names = "fck";
 201                         dmas = <&dmac0 0x25>, <&dmac0 0x26>,
 202                                <&dmac1 0x25>, <&dmac1 0x26>;
 203                         dma-names = "tx", "rx", "tx", "rx";
 204                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 205                         status = "disabled";
 206                 };
 207
 208                 scifa2: serial@e6c60000 {
 209                         compatible = "renesas,scifa-r8a7745",
 210                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 211                         reg = <0 0xe6c60000 0 0x40>;
 212                         interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
 213                         clocks = <&cpg CPG_MOD 202>;
 214                         clock-names = "fck";
 215                         dmas = <&dmac0 0x27>, <&dmac0 0x28>,
 216                                <&dmac1 0x27>, <&dmac1 0x28>;
 217                         dma-names = "tx", "rx", "tx", "rx";
 218                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 219                         status = "disabled";
 220                 };
 221
 222                 scifa3: serial@e6c70000 {
 223                         compatible = "renesas,scifa-r8a7745",
 224                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 225                         reg = <0 0xe6c70000 0 0x40>;
 226                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
 227                         clocks = <&cpg CPG_MOD 1106>;
 228                         clock-names = "fck";
 229                         dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
 230                                <&dmac1 0x1b>, <&dmac1 0x1c>;
 231                         dma-names = "tx", "rx", "tx", "rx";
 232                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 233                         status = "disabled";
 234                 };
 235
 236                 scifa4: serial@e6c78000 {
 237                         compatible = "renesas,scifa-r8a7745",
 238                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 239                         reg = <0 0xe6c78000 0 0x40>;
 240                         interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 241                         clocks = <&cpg CPG_MOD 1107>;
 242                         clock-names = "fck";
 243                         dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
 244                                <&dmac1 0x1f>, <&dmac1 0x20>;
 245                         dma-names = "tx", "rx", "tx", "rx";
 246                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 247                         status = "disabled";
 248                 };
 249
 250                 scifa5: serial@e6c80000 {
 251                         compatible = "renesas,scifa-r8a7745",
 252                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 253                         reg = <0 0xe6c80000 0 0x40>;
 254                         interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
 255                         clocks = <&cpg CPG_MOD 1108>;
 256                         clock-names = "fck";
 257                         dmas = <&dmac0 0x23>, <&dmac0 0x24>,
 258                                <&dmac1 0x23>, <&dmac1 0x24>;
 259                         dma-names = "tx", "rx", "tx", "rx";
 260                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 261                         status = "disabled";
 262                 };
 263
 264                 scifb0: serial@e6c20000 {
 265                         compatible = "renesas,scifb-r8a7745",
 266                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 267                         reg = <0 0xe6c20000 0 0x100>;
 268                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
 269                         clocks = <&cpg CPG_MOD 206>;
 270                         clock-names = "fck";
 271                         dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
 272                        <&dmac1 0x3d>, <&dmac1 0x3e>;
 273                         dma-names = "tx", "rx", "tx", "rx";
 274                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 275                         status = "disabled";
 276                 };
 277
 278                 scifb1: serial@e6c30000 {
 279                         compatible = "renesas,scifb-r8a7745",
 280                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 281                         reg = <0 0xe6c30000 0 0x100>;
 282                         interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
 283                         clocks = <&cpg CPG_MOD 207>;
 284                         clock-names = "fck";
 285                         dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
 286                                <&dmac1 0x19>, <&dmac1 0x1a>;
 287                         dma-names = "tx", "rx", "tx", "rx";
 288                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 289                         status = "disabled";
 290                 };
 291
 292                 scifb2: serial@e6ce0000 {
 293                         compatible = "renesas,scifb-r8a7745",
 294                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 295                         reg = <0 0xe6ce0000 0 0x100>;
 296                         interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
 297                         clocks = <&cpg CPG_MOD 216>;
 298                         clock-names = "fck";
 299                         dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
 300                                <&dmac1 0x1d>, <&dmac1 0x1e>;
 301                         dma-names = "tx", "rx", "tx", "rx";
 302                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 303                         status = "disabled";
 304                 };
 305
 306                 scif0: serial@e6e60000 {
 307                         compatible = "renesas,scif-r8a7745",
 308                                      "renesas,rcar-gen2-scif", "renesas,scif";
 309                         reg = <0 0xe6e60000 0 0x40>;
 310                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 311                         clocks = <&cpg CPG_MOD 721>,
 312                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
 313                         clock-names = "fck", "brg_int", "scif_clk";
 314                         dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
 315                                <&dmac1 0x29>, <&dmac1 0x2a>;
 316                         dma-names = "tx", "rx", "tx", "rx";
 317                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 318                         status = "disabled";
 319                 };
 320
 321                 scif1: serial@e6e68000 {
 322                         compatible = "renesas,scif-r8a7745",
 323                                      "renesas,rcar-gen2-scif", "renesas,scif";
 324                         reg = <0 0xe6e68000 0 0x40>;
 325                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 326                         clocks = <&cpg CPG_MOD 720>,
 327                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
 328                         clock-names = "fck", "brg_int", "scif_clk";
 329                         dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
 330                                <&dmac1 0x2d>, <&dmac1 0x2e>;
 331                         dma-names = "tx", "rx", "tx", "rx";
 332                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 333                         status = "disabled";
 334                 };
 335
 336                 scif2: serial@e6e58000 {
 337                         compatible = "renesas,scif-r8a7745",
 338                                      "renesas,rcar-gen2-scif", "renesas,scif";
 339                         reg = <0 0xe6e58000 0 0x40>;
 340                         interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
 341                         clocks = <&cpg CPG_MOD 719>,
 342                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
 343                         clock-names = "fck", "brg_int", "scif_clk";
 344                         dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
 345                                <&dmac1 0x2b>, <&dmac1 0x2c>;
 346                         dma-names = "tx", "rx", "tx", "rx";
 347                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 348                         status = "disabled";
 349                 };
 350
 351                 scif3: serial@e6ea8000 {
 352                         compatible = "renesas,scif-r8a7745",
 353                                      "renesas,rcar-gen2-scif", "renesas,scif";
 354                         reg = <0 0xe6ea8000 0 0x40>;
 355                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 356                         clocks = <&cpg CPG_MOD 718>,
 357                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
 358                         clock-names = "fck", "brg_int", "scif_clk";
 359                         dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
 360                                <&dmac1 0x2f>, <&dmac1 0x30>;
 361                         dma-names = "tx", "rx", "tx", "rx";
 362                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 363                         status = "disabled";
 364                 };
 365
 366                 scif4: serial@e6ee0000 {
 367                         compatible = "renesas,scif-r8a7745",
 368                                      "renesas,rcar-gen2-scif", "renesas,scif";
 369                         reg = <0 0xe6ee0000 0 0x40>;
 370                         interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
 371                         clocks = <&cpg CPG_MOD 715>,
 372                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
 373                         clock-names = "fck", "brg_int", "scif_clk";
 374                         dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
 375                                <&dmac1 0xfb>, <&dmac1 0xfc>;
 376                         dma-names = "tx", "rx", "tx", "rx";
 377                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 378                         status = "disabled";
 379                 };
 380
 381                 scif5: serial@e6ee8000 {
 382                         compatible = "renesas,scif-r8a7745",
 383                                      "renesas,rcar-gen2-scif", "renesas,scif";
 384                         reg = <0 0xe6ee8000 0 0x40>;
 385                         interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
 386                         clocks = <&cpg CPG_MOD 714>,
 387                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
 388                         clock-names = "fck", "brg_int", "scif_clk";
 389                         dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
 390                                <&dmac1 0xfd>, <&dmac1 0xfe>;
 391                         dma-names = "tx", "rx", "tx", "rx";
 392                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 393                         status = "disabled";
 394                 };
 395
 396                 hscif0: serial@e62c0000 {
 397                         compatible = "renesas,hscif-r8a7745",
 398                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
 399                         reg = <0 0xe62c0000 0 0x60>;
 400                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 401                         clocks = <&cpg CPG_MOD 717>,
 402                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
 403                         clock-names = "fck", "brg_int", "scif_clk";
 404                         dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
 405                                <&dmac1 0x39>, <&dmac1 0x3a>;
 406                         dma-names = "tx", "rx", "tx", "rx";
 407                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 408                         status = "disabled";
 409                 };
 410
 411                 hscif1: serial@e62c8000 {
 412                         compatible = "renesas,hscif-r8a7745",
 413                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
 414                         reg = <0 0xe62c8000 0 0x60>;
 415                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 416                         clocks = <&cpg CPG_MOD 716>,
 417                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
 418                         clock-names = "fck", "brg_int", "scif_clk";
 419                         dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
 420                                <&dmac1 0x4d>, <&dmac1 0x4e>;
 421                         dma-names = "tx", "rx", "tx", "rx";
 422                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 423                         status = "disabled";
 424                 };
 425
 426                 hscif2: serial@e62d0000 {
 427                         compatible = "renesas,hscif-r8a7745",
 428                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
 429                         reg = <0 0xe62d0000 0 0x60>;
 430                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 431                         clocks = <&cpg CPG_MOD 713>,
 432                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
 433                         clock-names = "fck", "brg_int", "scif_clk";
 434                         dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
 435                                <&dmac1 0x3b>, <&dmac1 0x3c>;
 436                         dma-names = "tx", "rx", "tx", "rx";
 437                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 438                         status = "disabled";
 439                 };
 440
 441                 ether: ethernet@ee700000 {
 442                         compatible = "renesas,ether-r8a7745";
 443                         reg = <0 0xee700000 0 0x400>;
 444                         interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
 445                         clocks = <&cpg CPG_MOD 813>;
 446                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 447                         phy-mode = "rmii";
 448                         #address-cells = <1>;
 449                         #size-cells = <0>;
 450                         status = "disabled";
 451                 };
 452         };
 453
 454         /* External root clock */
 455         extal_clk: extal {
 456                 compatible = "fixed-clock";
 457                 #clock-cells = <0>;
 458                 /* This value must be overridden by the board. */
 459                 clock-frequency = <0>;
 460         };
 461
 462         /* External USB clock - can be overridden by the board */
 463         usb_extal_clk: usb_extal {
 464                 compatible = "fixed-clock";
 465                 #clock-cells = <0>;
 466                 clock-frequency = <48000000>;
 467         };
 468
 469         /* External SCIF clock */
 470         scif_clk: scif {
 471                 compatible = "fixed-clock";
 472                 #clock-cells = <0>;
 473                 /* This value must be overridden by the board. */
 474                 clock-frequency = <0>;
 475         };
 476 };