arch/arm/boot/dts/r8a7743.dtsi

   1 /*
   2  * Device Tree Source for the r8a7743 SoC
   3  *
   4  * Copyright (C) 2016-2017 Cogent Embedded Inc.
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2. This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 #include <dt-bindings/interrupt-controller/irq.h>
  12 #include <dt-bindings/interrupt-controller/arm-gic.h>
  13 #include <dt-bindings/clock/r8a7743-cpg-mssr.h>
  14 #include <dt-bindings/power/r8a7743-sysc.h>
  15
  16 / {
  17         compatible = "renesas,r8a7743";
  18         #address-cells = <2>;
  19         #size-cells = <2>;
  20
  21         aliases {
  22                 i2c0 = &i2c0;
  23                 i2c1 = &i2c1;
  24                 i2c2 = &i2c2;
  25                 i2c3 = &i2c3;
  26                 i2c4 = &i2c4;
  27                 i2c5 = &i2c5;
  28                 i2c6 = &iic0;
  29                 i2c7 = &iic1;
  30                 i2c8 = &iic3;
  31                 spi0 = &qspi;
  32                 spi1 = &msiof0;
  33                 spi2 = &msiof1;
  34                 spi3 = &msiof2;
  35                 vin0 = &vin0;
  36                 vin1 = &vin1;
  37                 vin2 = &vin2;
  38         };
  39
  40         /*
  41          * The external audio clocks are configured as 0 Hz fixed frequency
  42          * clocks by default.
  43          * Boards that provide audio clocks should override them.
  44          */
  45         audio_clk_a: audio_clk_a {
  46                 compatible = "fixed-clock";
  47                 #clock-cells = <0>;
  48                 clock-frequency = <0>;
  49         };
  50
  51         audio_clk_b: audio_clk_b {
  52                 compatible = "fixed-clock";
  53                 #clock-cells = <0>;
  54                 clock-frequency = <0>;
  55         };
  56
  57         audio_clk_c: audio_clk_c {
  58                 compatible = "fixed-clock";
  59                 #clock-cells = <0>;
  60                 clock-frequency = <0>;
  61         };
  62
  63         /* External CAN clock */
  64         can_clk: can {
  65                 compatible = "fixed-clock";
  66                 #clock-cells = <0>;
  67                 /* This value must be overridden by the board. */
  68                 clock-frequency = <0>;
  69         };
  70
  71         cpus {
  72                 #address-cells = <1>;
  73                 #size-cells = <0>;
  74                 enable-method = "renesas,apmu";
  75
  76                 cpu0: cpu@0 {
  77                         device_type = "cpu";
  78                         compatible = "arm,cortex-a15";
  79                         reg = <0>;
  80                         clock-frequency = <1500000000>;
  81                         clocks = <&cpg CPG_CORE R8A7743_CLK_Z>;
  82                         clock-latency = <300000>; /* 300 us */
  83                         power-domains = <&sysc R8A7743_PD_CA15_CPU0>;
  84                         next-level-cache = <&L2_CA15>;
  85
  86                         /* kHz - uV - OPPs unknown yet */
  87                         operating-points = <1500000 1000000>,
  88                                            <1312500 1000000>,
  89                                            <1125000 1000000>,
  90                                            < 937500 1000000>,
  91                                            < 750000 1000000>,
  92                                            < 375000 1000000>;
  93                 };
  94
  95                 cpu1: cpu@1 {
  96                         device_type = "cpu";
  97                         compatible = "arm,cortex-a15";
  98                         reg = <1>;
  99                         clock-frequency = <1500000000>;
 100                         clocks = <&cpg CPG_CORE R8A7743_CLK_Z>;
 101                         power-domains = <&sysc R8A7743_PD_CA15_CPU1>;
 102                         next-level-cache = <&L2_CA15>;
 103                 };
 104
 105                 L2_CA15: cache-controller-0 {
 106                         compatible = "cache";
 107                         cache-unified;
 108                         cache-level = <2>;
 109                         power-domains = <&sysc R8A7743_PD_CA15_SCU>;
 110                 };
 111         };
 112
 113         /* External root clock */
 114         extal_clk: extal {
 115                 compatible = "fixed-clock";
 116                 #clock-cells = <0>;
 117                 /* This value must be overridden by the board. */
 118                 clock-frequency = <0>;
 119         };
 120
 121         /* External PCIe clock - can be overridden by the board */
 122         pcie_bus_clk: pcie_bus {
 123                 compatible = "fixed-clock";
 124                 #clock-cells = <0>;
 125                 clock-frequency = <0>;
 126         };
 127
 128         pmu {
 129                 compatible = "arm,cortex-a15-pmu";
 130                 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 131                                       <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 132                 interrupt-affinity = <&cpu0>, <&cpu1>;
 133         };
 134
 135         /* External SCIF clock */
 136         scif_clk: scif {
 137                 compatible = "fixed-clock";
 138                 #clock-cells = <0>;
 139                 /* This value must be overridden by the board. */
 140                 clock-frequency = <0>;
 141         };
 142
 143         soc {
 144                 compatible = "simple-bus";
 145                 interrupt-parent = <&gic>;
 146
 147                 #address-cells = <2>;
 148                 #size-cells = <2>;
 149                 ranges;
 150
 151                 gpio0: gpio@e6050000 {
 152                         compatible = "renesas,gpio-r8a7743",
 153                                      "renesas,rcar-gen2-gpio";
 154                         reg = <0 0xe6050000 0 0x50>;
 155                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 156                         #gpio-cells = <2>;
 157                         gpio-controller;
 158                         gpio-ranges = <&pfc 0 0 32>;
 159                         #interrupt-cells = <2>;
 160                         interrupt-controller;
 161                         clocks = <&cpg CPG_MOD 912>;
 162                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 163                         resets = <&cpg 912>;
 164                 };
 165
 166                 gpio1: gpio@e6051000 {
 167                         compatible = "renesas,gpio-r8a7743",
 168                                      "renesas,rcar-gen2-gpio";
 169                         reg = <0 0xe6051000 0 0x50>;
 170                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 171                         #gpio-cells = <2>;
 172                         gpio-controller;
 173                         gpio-ranges = <&pfc 0 32 26>;
 174                         #interrupt-cells = <2>;
 175                         interrupt-controller;
 176                         clocks = <&cpg CPG_MOD 911>;
 177                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 178                         resets = <&cpg 911>;
 179                 };
 180
 181                 gpio2: gpio@e6052000 {
 182                         compatible = "renesas,gpio-r8a7743",
 183                                      "renesas,rcar-gen2-gpio";
 184                         reg = <0 0xe6052000 0 0x50>;
 185                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 186                         #gpio-cells = <2>;
 187                         gpio-controller;
 188                         gpio-ranges = <&pfc 0 64 32>;
 189                         #interrupt-cells = <2>;
 190                         interrupt-controller;
 191                         clocks = <&cpg CPG_MOD 910>;
 192                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 193                         resets = <&cpg 910>;
 194                 };
 195
 196                 gpio3: gpio@e6053000 {
 197                         compatible = "renesas,gpio-r8a7743",
 198                                      "renesas,rcar-gen2-gpio";
 199                         reg = <0 0xe6053000 0 0x50>;
 200                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 201                         #gpio-cells = <2>;
 202                         gpio-controller;
 203                         gpio-ranges = <&pfc 0 96 32>;
 204                         #interrupt-cells = <2>;
 205                         interrupt-controller;
 206                         clocks = <&cpg CPG_MOD 909>;
 207                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 208                         resets = <&cpg 909>;
 209                 };
 210
 211                 gpio4: gpio@e6054000 {
 212                         compatible = "renesas,gpio-r8a7743",
 213                                      "renesas,rcar-gen2-gpio";
 214                         reg = <0 0xe6054000 0 0x50>;
 215                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 216                         #gpio-cells = <2>;
 217                         gpio-controller;
 218                         gpio-ranges = <&pfc 0 128 32>;
 219                         #interrupt-cells = <2>;
 220                         interrupt-controller;
 221                         clocks = <&cpg CPG_MOD 908>;
 222                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 223                         resets = <&cpg 908>;
 224                 };
 225
 226                 gpio5: gpio@e6055000 {
 227                         compatible = "renesas,gpio-r8a7743",
 228                                      "renesas,rcar-gen2-gpio";
 229                         reg = <0 0xe6055000 0 0x50>;
 230                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 231                         #gpio-cells = <2>;
 232                         gpio-controller;
 233                         gpio-ranges = <&pfc 0 160 32>;
 234                         #interrupt-cells = <2>;
 235                         interrupt-controller;
 236                         clocks = <&cpg CPG_MOD 907>;
 237                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 238                         resets = <&cpg 907>;
 239                 };
 240
 241                 gpio6: gpio@e6055400 {
 242                         compatible = "renesas,gpio-r8a7743",
 243                                      "renesas,rcar-gen2-gpio";
 244                         reg = <0 0xe6055400 0 0x50>;
 245                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 246                         #gpio-cells = <2>;
 247                         gpio-controller;
 248                         gpio-ranges = <&pfc 0 192 32>;
 249                         #interrupt-cells = <2>;
 250                         interrupt-controller;
 251                         clocks = <&cpg CPG_MOD 905>;
 252                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 253                         resets = <&cpg 905>;
 254                 };
 255
 256                 gpio7: gpio@e6055800 {
 257                         compatible = "renesas,gpio-r8a7743",
 258                                      "renesas,rcar-gen2-gpio";
 259                         reg = <0 0xe6055800 0 0x50>;
 260                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 261                         #gpio-cells = <2>;
 262                         gpio-controller;
 263                         gpio-ranges = <&pfc 0 224 26>;
 264                         #interrupt-cells = <2>;
 265                         interrupt-controller;
 266                         clocks = <&cpg CPG_MOD 904>;
 267                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 268                         resets = <&cpg 904>;
 269                 };
 270
 271                 pfc: pin-controller@e6060000 {
 272                         compatible = "renesas,pfc-r8a7743";
 273                         reg = <0 0xe6060000 0 0x250>;
 274                 };
 275
 276                 tpu: pwm@e60f0000 {
 277                         compatible = "renesas,tpu-r8a7743", "renesas,tpu";
 278                         reg = <0 0xe60f0000 0 0x148>;
 279                         clocks = <&cpg CPG_MOD 304>;
 280                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 281                         resets = <&cpg 304>;
 282                         #pwm-cells = <3>;
 283                         status = "disabled";
 284                 };
 285
 286                 cpg: clock-controller@e6150000 {
 287                         compatible = "renesas,r8a7743-cpg-mssr";
 288                         reg = <0 0xe6150000 0 0x1000>;
 289                         clocks = <&extal_clk>, <&usb_extal_clk>;
 290                         clock-names = "extal", "usb_extal";
 291                         #clock-cells = <2>;
 292                         #power-domain-cells = <0>;
 293                         #reset-cells = <1>;
 294                 };
 295
 296                 apmu@e6152000 {
 297                         compatible = "renesas,r8a7743-apmu", "renesas,apmu";
 298                         reg = <0 0xe6152000 0 0x188>;
 299                         cpus = <&cpu0 &cpu1>;
 300                 };
 301
 302                 rst: reset-controller@e6160000 {
 303                         compatible = "renesas,r8a7743-rst";
 304                         reg = <0 0xe6160000 0 0x100>;
 305                 };
 306
 307                 rwdt: watchdog@e6020000 {
 308                         compatible = "renesas,r8a7743-wdt",
 309                                      "renesas,rcar-gen2-wdt";
 310                         reg = <0 0xe6020000 0 0x0c>;
 311                         clocks = <&cpg CPG_MOD 402>;
 312                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 313                         resets = <&cpg 402>;
 314                         status = "disabled";
 315                 };
 316
 317                 sysc: system-controller@e6180000 {
 318                         compatible = "renesas,r8a7743-sysc";
 319                         reg = <0 0xe6180000 0 0x200>;
 320                         #power-domain-cells = <1>;
 321                 };
 322
 323                 irqc: interrupt-controller@e61c0000 {
 324                         compatible = "renesas,irqc-r8a7743", "renesas,irqc";
 325                         #interrupt-cells = <2>;
 326                         interrupt-controller;
 327                         reg = <0 0xe61c0000 0 0x200>;
 328                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
 329                                      <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
 330                                      <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
 331                                      <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
 332                                      <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
 333                                      <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
 334                                      <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
 335                                      <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
 336                                      <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
 337                                      <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 338                         clocks = <&cpg CPG_MOD 407>;
 339                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 340                         resets = <&cpg 407>;
 341                 };
 342
 343                 thermal: thermal@e61f0000 {
 344                         compatible = "renesas,thermal-r8a7743",
 345                                      "renesas,rcar-gen2-thermal",
 346                                      "renesas,rcar-thermal";
 347                         reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
 348                         interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 349                         clocks = <&cpg CPG_MOD 522>;
 350                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 351                         resets = <&cpg 522>;
 352                         #thermal-sensor-cells = <0>;
 353                 };
 354
 355                 ipmmu_sy0: mmu@e6280000 {
 356                         compatible = "renesas,ipmmu-r8a7743",
 357                                      "renesas,ipmmu-vmsa";
 358                         reg = <0 0xe6280000 0 0x1000>;
 359                         interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
 360                                      <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
 361                         #iommu-cells = <1>;
 362                         status = "disabled";
 363                 };
 364
 365                 ipmmu_sy1: mmu@e6290000 {
 366                         compatible = "renesas,ipmmu-r8a7743",
 367                                      "renesas,ipmmu-vmsa";
 368                         reg = <0 0xe6290000 0 0x1000>;
 369                         interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
 370                         #iommu-cells = <1>;
 371                         status = "disabled";
 372                 };
 373
 374                 ipmmu_ds: mmu@e6740000 {
 375                         compatible = "renesas,ipmmu-r8a7743",
 376                                      "renesas,ipmmu-vmsa";
 377                         reg = <0 0xe6740000 0 0x1000>;
 378                         interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
 379                                      <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
 380                         #iommu-cells = <1>;
 381                         status = "disabled";
 382                 };
 383
 384                 ipmmu_mp: mmu@ec680000 {
 385                         compatible = "renesas,ipmmu-r8a7743",
 386                                      "renesas,ipmmu-vmsa";
 387                         reg = <0 0xec680000 0 0x1000>;
 388                         interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
 389                         #iommu-cells = <1>;
 390                         status = "disabled";
 391                 };
 392
 393                 ipmmu_mx: mmu@fe951000 {
 394                         compatible = "renesas,ipmmu-r8a7743",
 395                                      "renesas,ipmmu-vmsa";
 396                         reg = <0 0xfe951000 0 0x1000>;
 397                         interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
 398                                      <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
 399                         #iommu-cells = <1>;
 400                         status = "disabled";
 401                 };
 402
 403                 ipmmu_gp: mmu@e62a0000 {
 404                         compatible = "renesas,ipmmu-r8a7743",
 405                                      "renesas,ipmmu-vmsa";
 406                         reg = <0 0xe62a0000 0 0x1000>;
 407                         interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
 408                                      <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
 409                         #iommu-cells = <1>;
 410                         status = "disabled";
 411                 };
 412
 413                 icram0: sram@e63a0000 {
 414                         compatible = "mmio-sram";
 415                         reg = <0 0xe63a0000 0 0x12000>;
 416                 };
 417
 418                 icram1: sram@e63c0000 {
 419                         compatible = "mmio-sram";
 420                         reg = <0 0xe63c0000 0 0x1000>;
 421                         #address-cells = <1>;
 422                         #size-cells = <1>;
 423                         ranges = <0 0 0xe63c0000 0x1000>;
 424
 425                         smp-sram@0 {
 426                                 compatible = "renesas,smp-sram";
 427                                 reg = <0 0x100>;
 428                         };
 429                 };
 430
 431                 icram2: sram@e6300000 {
 432                         compatible = "mmio-sram";
 433                         reg = <0 0xe6300000 0 0x40000>;
 434                 };
 435
 436                 /* The memory map in the User's Manual maps the cores to
 437                  * bus numbers
 438                  */
 439                 i2c0: i2c@e6508000 {
 440                         #address-cells = <1>;
 441                         #size-cells = <0>;
 442                         compatible = "renesas,i2c-r8a7743",
 443                                      "renesas,rcar-gen2-i2c";
 444                         reg = <0 0xe6508000 0 0x40>;
 445                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 446                         clocks = <&cpg CPG_MOD 931>;
 447                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 448                         resets = <&cpg 931>;
 449                         i2c-scl-internal-delay-ns = <6>;
 450                         status = "disabled";
 451                 };
 452
 453                 i2c1: i2c@e6518000 {
 454                         #address-cells = <1>;
 455                         #size-cells = <0>;
 456                         compatible = "renesas,i2c-r8a7743",
 457                                      "renesas,rcar-gen2-i2c";
 458                         reg = <0 0xe6518000 0 0x40>;
 459                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 460                         clocks = <&cpg CPG_MOD 930>;
 461                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 462                         resets = <&cpg 930>;
 463                         i2c-scl-internal-delay-ns = <6>;
 464                         status = "disabled";
 465                 };
 466
 467                 i2c2: i2c@e6530000 {
 468                         #address-cells = <1>;
 469                         #size-cells = <0>;
 470                         compatible = "renesas,i2c-r8a7743",
 471                                      "renesas,rcar-gen2-i2c";
 472                         reg = <0 0xe6530000 0 0x40>;
 473                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 474                         clocks = <&cpg CPG_MOD 929>;
 475                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 476                         resets = <&cpg 929>;
 477                         i2c-scl-internal-delay-ns = <6>;
 478                         status = "disabled";
 479                 };
 480
 481                 i2c3: i2c@e6540000 {
 482                         #address-cells = <1>;
 483                         #size-cells = <0>;
 484                         compatible = "renesas,i2c-r8a7743",
 485                                      "renesas,rcar-gen2-i2c";
 486                         reg = <0 0xe6540000 0 0x40>;
 487                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 488                         clocks = <&cpg CPG_MOD 928>;
 489                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 490                         resets = <&cpg 928>;
 491                         i2c-scl-internal-delay-ns = <6>;
 492                         status = "disabled";
 493                 };
 494
 495                 i2c4: i2c@e6520000 {
 496                         #address-cells = <1>;
 497                         #size-cells = <0>;
 498                         compatible = "renesas,i2c-r8a7743",
 499                                      "renesas,rcar-gen2-i2c";
 500                         reg = <0 0xe6520000 0 0x40>;
 501                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 502                         clocks = <&cpg CPG_MOD 927>;
 503                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 504                         resets = <&cpg 927>;
 505                         i2c-scl-internal-delay-ns = <6>;
 506                         status = "disabled";
 507                 };
 508
 509                 i2c5: i2c@e6528000 {
 510                         /* doesn't need pinmux */
 511                         #address-cells = <1>;
 512                         #size-cells = <0>;
 513                         compatible = "renesas,i2c-r8a7743",
 514                                      "renesas,rcar-gen2-i2c";
 515                         reg = <0 0xe6528000 0 0x40>;
 516                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 517                         clocks = <&cpg CPG_MOD 925>;
 518                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 519                         resets = <&cpg 925>;
 520                         i2c-scl-internal-delay-ns = <110>;
 521                         status = "disabled";
 522                 };
 523
 524                 iic0: i2c@e6500000 {
 525                         #address-cells = <1>;
 526                         #size-cells = <0>;
 527                         compatible = "renesas,iic-r8a7743",
 528                                      "renesas,rcar-gen2-iic",
 529                                      "renesas,rmobile-iic";
 530                         reg = <0 0xe6500000 0 0x425>;
 531                         interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
 532                         clocks = <&cpg CPG_MOD 318>;
 533                         dmas = <&dmac0 0x61>, <&dmac0 0x62>,
 534                                <&dmac1 0x61>, <&dmac1 0x62>;
 535                         dma-names = "tx", "rx", "tx", "rx";
 536                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 537                         resets = <&cpg 318>;
 538                         status = "disabled";
 539                 };
 540
 541                 iic1: i2c@e6510000 {
 542                         #address-cells = <1>;
 543                         #size-cells = <0>;
 544                         compatible = "renesas,iic-r8a7743",
 545                                      "renesas,rcar-gen2-iic",
 546                                      "renesas,rmobile-iic";
 547                         reg = <0 0xe6510000 0 0x425>;
 548                         interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
 549                         clocks = <&cpg CPG_MOD 323>;
 550                         dmas = <&dmac0 0x65>, <&dmac0 0x66>,
 551                                <&dmac1 0x65>, <&dmac1 0x66>;
 552                         dma-names = "tx", "rx", "tx", "rx";
 553                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 554                         resets = <&cpg 323>;
 555                         status = "disabled";
 556                 };
 557
 558                 iic3: i2c@e60b0000 {
 559                         /* doesn't need pinmux */
 560                         #address-cells = <1>;
 561                         #size-cells = <0>;
 562                         compatible = "renesas,iic-r8a7743",
 563                                      "renesas,rcar-gen2-iic",
 564                                      "renesas,rmobile-iic";
 565                         reg = <0 0xe60b0000 0 0x425>;
 566                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 567                         clocks = <&cpg CPG_MOD 926>;
 568                         dmas = <&dmac0 0x77>, <&dmac0 0x78>,
 569                                <&dmac1 0x77>, <&dmac1 0x78>;
 570                         dma-names = "tx", "rx", "tx", "rx";
 571                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 572                         resets = <&cpg 926>;
 573                         status = "disabled";
 574                 };
 575
 576                 hsusb: usb@e6590000 {
 577                         compatible = "renesas,usbhs-r8a7743",
 578                                      "renesas,rcar-gen2-usbhs";
 579                         reg = <0 0xe6590000 0 0x100>;
 580                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
 581                         clocks = <&cpg CPG_MOD 704>;
 582                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
 583                                <&usb_dmac1 0>, <&usb_dmac1 1>;
 584                         dma-names = "ch0", "ch1", "ch2", "ch3";
 585                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 586                         resets = <&cpg 704>;
 587                         renesas,buswait = <4>;
 588                         phys = <&usb0 1>;
 589                         phy-names = "usb";
 590                         status = "disabled";
 591                 };
 592
 593                 usbphy: usb-phy@e6590100 {
 594                         compatible = "renesas,usb-phy-r8a7743",
 595                                      "renesas,rcar-gen2-usb-phy";
 596                         reg = <0 0xe6590100 0 0x100>;
 597                         #address-cells = <1>;
 598                         #size-cells = <0>;
 599                         clocks = <&cpg CPG_MOD 704>;
 600                         clock-names = "usbhs";
 601                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 602                         resets = <&cpg 704>;
 603                         status = "disabled";
 604
 605                         usb0: usb-channel@0 {
 606                                 reg = <0>;
 607                                 #phy-cells = <1>;
 608                         };
 609                         usb2: usb-channel@2 {
 610                                 reg = <2>;
 611                                 #phy-cells = <1>;
 612                         };
 613                 };
 614
 615                 usb_dmac0: dma-controller@e65a0000 {
 616                         compatible = "renesas,r8a7743-usb-dmac",
 617                                      "renesas,usb-dmac";
 618                         reg = <0 0xe65a0000 0 0x100>;
 619                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
 620                                       GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 621                         interrupt-names = "ch0", "ch1";
 622                         clocks = <&cpg CPG_MOD 330>;
 623                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 624                         resets = <&cpg 330>;
 625                         #dma-cells = <1>;
 626                         dma-channels = <2>;
 627                 };
 628
 629                 usb_dmac1: dma-controller@e65b0000 {
 630                         compatible = "renesas,r8a7743-usb-dmac",
 631                                      "renesas,usb-dmac";
 632                         reg = <0 0xe65b0000 0 0x100>;
 633                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
 634                                       GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 635                         interrupt-names = "ch0", "ch1";
 636                         clocks = <&cpg CPG_MOD 331>;
 637                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 638                         resets = <&cpg 331>;
 639                         #dma-cells = <1>;
 640                         dma-channels = <2>;
 641                 };
 642
 643                 dmac0: dma-controller@e6700000 {
 644                         compatible = "renesas,dmac-r8a7743",
 645                                      "renesas,rcar-dmac";
 646                         reg = <0 0xe6700000 0 0x20000>;
 647                         interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
 648                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 649                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 650                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 651                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 652                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 653                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 654                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 655                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 656                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 657                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 658                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 659                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 660                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 661                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 662                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
 663                         interrupt-names = "error",
 664                                           "ch0", "ch1", "ch2", "ch3",
 665                                           "ch4", "ch5", "ch6", "ch7",
 666                                           "ch8", "ch9", "ch10", "ch11",
 667                                           "ch12", "ch13", "ch14";
 668                         clocks = <&cpg CPG_MOD 219>;
 669                         clock-names = "fck";
 670                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 671                         resets = <&cpg 219>;
 672                         #dma-cells = <1>;
 673                         dma-channels = <15>;
 674                 };
 675
 676                 dmac1: dma-controller@e6720000 {
 677                         compatible = "renesas,dmac-r8a7743",
 678                                      "renesas,rcar-dmac";
 679                         reg = <0 0xe6720000 0 0x20000>;
 680                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 681                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 682                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 683                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 684                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 685                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 686                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 687                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 688                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 689                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 690                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 691                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 692                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 693                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 694                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 695                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
 696                         interrupt-names = "error",
 697                                           "ch0", "ch1", "ch2", "ch3",
 698                                           "ch4", "ch5", "ch6", "ch7",
 699                                           "ch8", "ch9", "ch10", "ch11",
 700                                           "ch12", "ch13", "ch14";
 701                         clocks = <&cpg CPG_MOD 218>;
 702                         clock-names = "fck";
 703                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 704                         resets = <&cpg 218>;
 705                         #dma-cells = <1>;
 706                         dma-channels = <15>;
 707                 };
 708
 709                 avb: ethernet@e6800000 {
 710                         compatible = "renesas,etheravb-r8a7743",
 711                                      "renesas,etheravb-rcar-gen2";
 712                         reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
 713                         interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
 714                         clocks = <&cpg CPG_MOD 812>;
 715                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 716                         resets = <&cpg 812>;
 717                         #address-cells = <1>;
 718                         #size-cells = <0>;
 719                         status = "disabled";
 720                 };
 721
 722                 qspi: spi@e6b10000 {
 723                         compatible = "renesas,qspi-r8a7743", "renesas,qspi";
 724                         reg = <0 0xe6b10000 0 0x2c>;
 725                         interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
 726                         clocks = <&cpg CPG_MOD 917>;
 727                         dmas = <&dmac0 0x17>, <&dmac0 0x18>,
 728                                <&dmac1 0x17>, <&dmac1 0x18>;
 729                         dma-names = "tx", "rx", "tx", "rx";
 730                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 731                         num-cs = <1>;
 732                         #address-cells = <1>;
 733                         #size-cells = <0>;
 734                         resets = <&cpg 917>;
 735                         status = "disabled";
 736                 };
 737
 738                 scifa0: serial@e6c40000 {
 739                         compatible = "renesas,scifa-r8a7743",
 740                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 741                         reg = <0 0xe6c40000 0 0x40>;
 742                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 743                         clocks = <&cpg CPG_MOD 204>;
 744                         clock-names = "fck";
 745                         dmas = <&dmac0 0x21>, <&dmac0 0x22>,
 746                                <&dmac1 0x21>, <&dmac1 0x22>;
 747                         dma-names = "tx", "rx", "tx", "rx";
 748                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 749                         resets = <&cpg 204>;
 750                         status = "disabled";
 751                 };
 752
 753                 scifa1: serial@e6c50000 {
 754                         compatible = "renesas,scifa-r8a7743",
 755                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 756                         reg = <0 0xe6c50000 0 0x40>;
 757                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 758                         clocks = <&cpg CPG_MOD 203>;
 759                         clock-names = "fck";
 760                         dmas = <&dmac0 0x25>, <&dmac0 0x26>,
 761                                <&dmac1 0x25>, <&dmac1 0x26>;
 762                         dma-names = "tx", "rx", "tx", "rx";
 763                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 764                         resets = <&cpg 203>;
 765                         status = "disabled";
 766                 };
 767
 768                 scifa2: serial@e6c60000 {
 769                         compatible = "renesas,scifa-r8a7743",
 770                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 771                         reg = <0 0xe6c60000 0 0x40>;
 772                         interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
 773                         clocks = <&cpg CPG_MOD 202>;
 774                         clock-names = "fck";
 775                         dmas = <&dmac0 0x27>, <&dmac0 0x28>,
 776                                <&dmac1 0x27>, <&dmac1 0x28>;
 777                         dma-names = "tx", "rx", "tx", "rx";
 778                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 779                         resets = <&cpg 202>;
 780                         status = "disabled";
 781                 };
 782
 783                 scifa3: serial@e6c70000 {
 784                         compatible = "renesas,scifa-r8a7743",
 785                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 786                         reg = <0 0xe6c70000 0 0x40>;
 787                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
 788                         clocks = <&cpg CPG_MOD 1106>;
 789                         clock-names = "fck";
 790                         dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
 791                                <&dmac1 0x1b>, <&dmac1 0x1c>;
 792                         dma-names = "tx", "rx", "tx", "rx";
 793                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 794                         resets = <&cpg 1106>;
 795                         status = "disabled";
 796                 };
 797
 798                 scifa4: serial@e6c78000 {
 799                         compatible = "renesas,scifa-r8a7743",
 800                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 801                         reg = <0 0xe6c78000 0 0x40>;
 802                         interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 803                         clocks = <&cpg CPG_MOD 1107>;
 804                         clock-names = "fck";
 805                         dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
 806                                <&dmac1 0x1f>, <&dmac1 0x20>;
 807                         dma-names = "tx", "rx", "tx", "rx";
 808                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 809                         resets = <&cpg 1107>;
 810                         status = "disabled";
 811                 };
 812
 813                 scifa5: serial@e6c80000 {
 814                         compatible = "renesas,scifa-r8a7743",
 815                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 816                         reg = <0 0xe6c80000 0 0x40>;
 817                         interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
 818                         clocks = <&cpg CPG_MOD 1108>;
 819                         clock-names = "fck";
 820                         dmas = <&dmac0 0x23>, <&dmac0 0x24>,
 821                                <&dmac1 0x23>, <&dmac1 0x24>;
 822                         dma-names = "tx", "rx", "tx", "rx";
 823                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 824                         resets = <&cpg 1108>;
 825                         status = "disabled";
 826                 };
 827
 828                 scifb0: serial@e6c20000 {
 829                         compatible = "renesas,scifb-r8a7743",
 830                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 831                         reg = <0 0xe6c20000 0 0x100>;
 832                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
 833                         clocks = <&cpg CPG_MOD 206>;
 834                         clock-names = "fck";
 835                         dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
 836                                <&dmac1 0x3d>, <&dmac1 0x3e>;
 837                         dma-names = "tx", "rx", "tx", "rx";
 838                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 839                         resets = <&cpg 206>;
 840                         status = "disabled";
 841                 };
 842
 843                 scifb1: serial@e6c30000 {
 844                         compatible = "renesas,scifb-r8a7743",
 845                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 846                         reg = <0 0xe6c30000 0 0x100>;
 847                         interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
 848                         clocks = <&cpg CPG_MOD 207>;
 849                         clock-names = "fck";
 850                         dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
 851                                <&dmac1 0x19>, <&dmac1 0x1a>;
 852                         dma-names = "tx", "rx", "tx", "rx";
 853                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 854                         resets = <&cpg 207>;
 855                         status = "disabled";
 856                 };
 857
 858                 scifb2: serial@e6ce0000 {
 859                         compatible = "renesas,scifb-r8a7743",
 860                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 861                         reg = <0 0xe6ce0000 0 0x100>;
 862                         interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
 863                         clocks = <&cpg CPG_MOD 216>;
 864                         clock-names = "fck";
 865                         dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
 866                                <&dmac1 0x1d>, <&dmac1 0x1e>;
 867                         dma-names = "tx", "rx", "tx", "rx";
 868                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 869                         resets = <&cpg 216>;
 870                         status = "disabled";
 871                 };
 872
 873                 scif0: serial@e6e60000 {
 874                         compatible = "renesas,scif-r8a7743",
 875                                      "renesas,rcar-gen2-scif", "renesas,scif";
 876                         reg = <0 0xe6e60000 0 0x40>;
 877                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 878                         clocks = <&cpg CPG_MOD 721>,
 879                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
 880                         clock-names = "fck", "brg_int", "scif_clk";
 881                         dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
 882                                <&dmac1 0x29>, <&dmac1 0x2a>;
 883                         dma-names = "tx", "rx", "tx", "rx";
 884                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 885                         resets = <&cpg 721>;
 886                         status = "disabled";
 887                 };
 888
 889                 scif1: serial@e6e68000 {
 890                         compatible = "renesas,scif-r8a7743",
 891                                      "renesas,rcar-gen2-scif", "renesas,scif";
 892                         reg = <0 0xe6e68000 0 0x40>;
 893                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 894                         clocks = <&cpg CPG_MOD 720>,
 895                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
 896                         clock-names = "fck", "brg_int", "scif_clk";
 897                         dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
 898                                <&dmac1 0x2d>, <&dmac1 0x2e>;
 899                         dma-names = "tx", "rx", "tx", "rx";
 900                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 901                         resets = <&cpg 720>;
 902                         status = "disabled";
 903                 };
 904
 905                 scif2: serial@e6e58000 {
 906                         compatible = "renesas,scif-r8a7743",
 907                                      "renesas,rcar-gen2-scif", "renesas,scif";
 908                         reg = <0 0xe6e58000 0 0x40>;
 909                         interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
 910                         clocks = <&cpg CPG_MOD 719>,
 911                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
 912                         clock-names = "fck", "brg_int", "scif_clk";
 913                         dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
 914                                <&dmac1 0x2b>, <&dmac1 0x2c>;
 915                         dma-names = "tx", "rx", "tx", "rx";
 916                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 917                         resets = <&cpg 719>;
 918                         status = "disabled";
 919                 };
 920
 921                 scif3: serial@e6ea8000 {
 922                         compatible = "renesas,scif-r8a7743",
 923                                      "renesas,rcar-gen2-scif", "renesas,scif";
 924                         reg = <0 0xe6ea8000 0 0x40>;
 925                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 926                         clocks = <&cpg CPG_MOD 718>,
 927                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
 928                         clock-names = "fck", "brg_int", "scif_clk";
 929                         dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
 930                                <&dmac1 0x2f>, <&dmac1 0x30>;
 931                         dma-names = "tx", "rx", "tx", "rx";
 932                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 933                         resets = <&cpg 718>;
 934                         status = "disabled";
 935                 };
 936
 937                 scif4: serial@e6ee0000 {
 938                         compatible = "renesas,scif-r8a7743",
 939                                      "renesas,rcar-gen2-scif", "renesas,scif";
 940                         reg = <0 0xe6ee0000 0 0x40>;
 941                         interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
 942                         clocks = <&cpg CPG_MOD 715>,
 943                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
 944                         clock-names = "fck", "brg_int", "scif_clk";
 945                         dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
 946                                <&dmac1 0xfb>, <&dmac1 0xfc>;
 947                         dma-names = "tx", "rx", "tx", "rx";
 948                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 949                         resets = <&cpg 715>;
 950                         status = "disabled";
 951                 };
 952
 953                 scif5: serial@e6ee8000 {
 954                         compatible = "renesas,scif-r8a7743",
 955                                      "renesas,rcar-gen2-scif", "renesas,scif";
 956                         reg = <0 0xe6ee8000 0 0x40>;
 957                         interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
 958                         clocks = <&cpg CPG_MOD 714>,
 959                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
 960                         clock-names = "fck", "brg_int", "scif_clk";
 961                         dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
 962                                <&dmac1 0xfd>, <&dmac1 0xfe>;
 963                         dma-names = "tx", "rx", "tx", "rx";
 964                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 965                         resets = <&cpg 714>;
 966                         status = "disabled";
 967                 };
 968
 969                 hscif0: serial@e62c0000 {
 970                         compatible = "renesas,hscif-r8a7743",
 971                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
 972                         reg = <0 0xe62c0000 0 0x60>;
 973                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 974                         clocks = <&cpg CPG_MOD 717>,
 975                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
 976                         clock-names = "fck", "brg_int", "scif_clk";
 977                         dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
 978                                <&dmac1 0x39>, <&dmac1 0x3a>;
 979                         dma-names = "tx", "rx", "tx", "rx";
 980                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 981                         resets = <&cpg 717>;
 982                         status = "disabled";
 983                 };
 984
 985                 hscif1: serial@e62c8000 {
 986                         compatible = "renesas,hscif-r8a7743",
 987                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
 988                         reg = <0 0xe62c8000 0 0x60>;
 989                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 990                         clocks = <&cpg CPG_MOD 716>,
 991                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
 992                         clock-names = "fck", "brg_int", "scif_clk";
 993                         dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
 994                                <&dmac1 0x4d>, <&dmac1 0x4e>;
 995                         dma-names = "tx", "rx", "tx", "rx";
 996                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 997                         resets = <&cpg 716>;
 998                         status = "disabled";
 999                 };
1000
1001                 hscif2: serial@e62d0000 {
1002                         compatible = "renesas,hscif-r8a7743",
1003                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
1004                         reg = <0 0xe62d0000 0 0x60>;
1005                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
1006                         clocks = <&cpg CPG_MOD 713>,
1007                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
1008                         clock-names = "fck", "brg_int", "scif_clk";
1009                         dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
1010                                <&dmac1 0x3b>, <&dmac1 0x3c>;
1011                         dma-names = "tx", "rx", "tx", "rx";
1012                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1013                         resets = <&cpg 713>;
1014                         status = "disabled";
1015                 };
1016
1017                 msiof0: spi@e6e20000 {
1018                         compatible = "renesas,msiof-r8a7743",
1019                                      "renesas,rcar-gen2-msiof";
1020                         reg = <0 0xe6e20000 0 0x0064>;
1021                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1022                         clocks = <&cpg CPG_MOD 000>;
1023                         dmas = <&dmac0 0x51>, <&dmac0 0x52>,
1024                                <&dmac1 0x51>, <&dmac1 0x52>;
1025                         dma-names = "tx", "rx", "tx", "rx";
1026                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1027                         #address-cells = <1>;
1028                         #size-cells = <0>;
1029                         resets = <&cpg 000>;
1030                         status = "disabled";
1031                 };
1032
1033                 msiof1: spi@e6e10000 {
1034                         compatible = "renesas,msiof-r8a7743",
1035                                      "renesas,rcar-gen2-msiof";
1036                         reg = <0 0xe6e10000 0 0x0064>;
1037                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1038                         clocks = <&cpg CPG_MOD 208>;
1039                         dmas = <&dmac0 0x55>, <&dmac0 0x56>,
1040                                <&dmac1 0x55>, <&dmac1 0x56>;
1041                         dma-names = "tx", "rx", "tx", "rx";
1042                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1043                         #address-cells = <1>;
1044                         #size-cells = <0>;
1045                         resets = <&cpg 208>;
1046                         status = "disabled";
1047                 };
1048
1049                 msiof2: spi@e6e00000 {
1050                         compatible = "renesas,msiof-r8a7743",
1051                                      "renesas,rcar-gen2-msiof";
1052                         reg = <0 0xe6e00000 0 0x0064>;
1053                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1054                         clocks = <&cpg CPG_MOD 205>;
1055                         dmas = <&dmac0 0x41>, <&dmac0 0x42>,
1056                                <&dmac1 0x41>, <&dmac1 0x42>;
1057                         dma-names = "tx", "rx", "tx", "rx";
1058                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1059                         #address-cells = <1>;
1060                         #size-cells = <0>;
1061                         resets = <&cpg 205>;
1062                         status = "disabled";
1063                 };
1064
1065                 pwm0: pwm@e6e30000 {
1066                         compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
1067                         reg = <0 0xe6e30000 0 0x8>;
1068                         clocks = <&cpg CPG_MOD 523>;
1069                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1070                         resets = <&cpg 523>;
1071                         #pwm-cells = <2>;
1072                         status = "disabled";
1073                 };
1074
1075                 pwm1: pwm@e6e31000 {
1076                         compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
1077                         reg = <0 0xe6e31000 0 0x8>;
1078                         clocks = <&cpg CPG_MOD 523>;
1079                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1080                         resets = <&cpg 523>;
1081                         #pwm-cells = <2>;
1082                         status = "disabled";
1083                 };
1084
1085                 pwm2: pwm@e6e32000 {
1086                         compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
1087                         reg = <0 0xe6e32000 0 0x8>;
1088                         clocks = <&cpg CPG_MOD 523>;
1089                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1090                         resets = <&cpg 523>;
1091                         #pwm-cells = <2>;
1092                         status = "disabled";
1093                 };
1094
1095                 pwm3: pwm@e6e33000 {
1096                         compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
1097                         reg = <0 0xe6e33000 0 0x8>;
1098                         clocks = <&cpg CPG_MOD 523>;
1099                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1100                         resets = <&cpg 523>;
1101                         #pwm-cells = <2>;
1102                         status = "disabled";
1103                 };
1104
1105                 pwm4: pwm@e6e34000 {
1106                         compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
1107                         reg = <0 0xe6e34000 0 0x8>;
1108                         clocks = <&cpg CPG_MOD 523>;
1109                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1110                         resets = <&cpg 523>;
1111                         #pwm-cells = <2>;
1112                         status = "disabled";
1113                 };
1114
1115                 pwm5: pwm@e6e35000 {
1116                         compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
1117                         reg = <0 0xe6e35000 0 0x8>;
1118                         clocks = <&cpg CPG_MOD 523>;
1119                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1120                         resets = <&cpg 523>;
1121                         #pwm-cells = <2>;
1122                         status = "disabled";
1123                 };
1124
1125                 pwm6: pwm@e6e36000 {
1126                         compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
1127                         reg = <0 0xe6e36000 0 0x8>;
1128                         clocks = <&cpg CPG_MOD 523>;
1129                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1130                         resets = <&cpg 523>;
1131                         #pwm-cells = <2>;
1132                         status = "disabled";
1133                 };
1134
1135                 can0: can@e6e80000 {
1136                         compatible = "renesas,can-r8a7743",
1137                                      "renesas,rcar-gen2-can";
1138                         reg = <0 0xe6e80000 0 0x1000>;
1139                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1140                         clocks = <&cpg CPG_MOD 916>,
1141                                  <&cpg CPG_CORE R8A7743_CLK_RCAN>,
1142                                  <&can_clk>;
1143                         clock-names = "clkp1", "clkp2", "can_clk";
1144                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1145                         resets = <&cpg 916>;
1146                         status = "disabled";
1147                 };
1148
1149                 can1: can@e6e88000 {
1150                         compatible = "renesas,can-r8a7743",
1151                                      "renesas,rcar-gen2-can";
1152                         reg = <0 0xe6e88000 0 0x1000>;
1153                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1154                         clocks = <&cpg CPG_MOD 915>,
1155                                  <&cpg CPG_CORE R8A7743_CLK_RCAN>,
1156                                  <&can_clk>;
1157                         clock-names = "clkp1", "clkp2", "can_clk";
1158                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1159                         resets = <&cpg 915>;
1160                         status = "disabled";
1161                 };
1162
1163                 vin0: video@e6ef0000 {
1164                         compatible = "renesas,vin-r8a7743",
1165                                      "renesas,rcar-gen2-vin";
1166                         reg = <0 0xe6ef0000 0 0x1000>;
1167                         interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1168                         clocks = <&cpg CPG_MOD 811>;
1169                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1170                         resets = <&cpg 811>;
1171                         status = "disabled";
1172                 };
1173
1174                 vin1: video@e6ef1000 {
1175                         compatible = "renesas,vin-r8a7743",
1176                                      "renesas,rcar-gen2-vin";
1177                         reg = <0 0xe6ef1000 0 0x1000>;
1178                         interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1179                         clocks = <&cpg CPG_MOD 810>;
1180                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1181                         resets = <&cpg 810>;
1182                         status = "disabled";
1183                 };
1184
1185                 vin2: video@e6ef2000 {
1186                         compatible = "renesas,vin-r8a7743",
1187                                      "renesas,rcar-gen2-vin";
1188                         reg = <0 0xe6ef2000 0 0x1000>;
1189                         interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1190                         clocks = <&cpg CPG_MOD 809>;
1191                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1192                         resets = <&cpg 809>;
1193                         status = "disabled";
1194                 };
1195
1196                 rcar_sound: sound@ec500000 {
1197                         /*
1198                          * #sound-dai-cells is required
1199                          *
1200                          * Single DAI : #sound-dai-cells = <0>;         <&rcar_sound>;
1201                          * Multi  DAI : #sound-dai-cells = <1>;         <&rcar_sound N>;
1202                          */
1203                         compatible = "renesas,rcar_sound-r8a7743",
1204                                      "renesas,rcar_sound-gen2";
1205                         reg = <0 0xec500000 0 0x1000>, /* SCU */
1206                               <0 0xec5a0000 0 0x100>,  /* ADG */
1207                               <0 0xec540000 0 0x1000>, /* SSIU */
1208                               <0 0xec541000 0 0x280>,  /* SSI */
1209                               <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
1210                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1211
1212                         clocks = <&cpg CPG_MOD 1005>,
1213                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1214                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1215                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1216                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1217                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1218                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1219                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1220                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1221                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1222                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1223                                  <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1224                                  <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1225                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1226                                  <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
1227                                  <&cpg CPG_CORE R8A7743_CLK_M2>;
1228                         clock-names = "ssi-all",
1229                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1230                                       "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
1231                                       "src.9", "src.8", "src.7", "src.6", "src.5",
1232                                       "src.4", "src.3", "src.2", "src.1", "src.0",
1233                                       "ctu.0", "ctu.1",
1234                                       "mix.0", "mix.1",
1235                                       "dvc.0", "dvc.1",
1236                                       "clk_a", "clk_b", "clk_c", "clk_i";
1237                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1238                         resets = <&cpg 1005>,
1239                                  <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
1240                                  <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
1241                                  <&cpg 1014>, <&cpg 1015>;
1242                         reset-names = "ssi-all",
1243                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1244                                       "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
1245                         status = "disabled";
1246
1247                         rcar_sound,dvc {
1248                                 dvc0: dvc-0 {
1249                                         dmas = <&audma1 0xbc>;
1250                                         dma-names = "tx";
1251                                 };
1252                                 dvc1: dvc-1 {
1253                                         dmas = <&audma1 0xbe>;
1254                                         dma-names = "tx";
1255                                 };
1256                         };
1257
1258                         rcar_sound,mix {
1259                                 mix0: mix-0 { };
1260                                 mix1: mix-1 { };
1261                         };
1262
1263                         rcar_sound,ctu {
1264                                 ctu00: ctu-0 { };
1265                                 ctu01: ctu-1 { };
1266                                 ctu02: ctu-2 { };
1267                                 ctu03: ctu-3 { };
1268                                 ctu10: ctu-4 { };
1269                                 ctu11: ctu-5 { };
1270                                 ctu12: ctu-6 { };
1271                                 ctu13: ctu-7 { };
1272                         };
1273
1274                         rcar_sound,src {
1275                                 src0: src-0 {
1276                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1277                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
1278                                         dma-names = "rx", "tx";
1279                                 };
1280                                 src1: src-1 {
1281                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1282                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
1283                                         dma-names = "rx", "tx";
1284                                 };
1285                                 src2: src-2 {
1286                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1287                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
1288                                         dma-names = "rx", "tx";
1289                                 };
1290                                 src3: src-3 {
1291                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1292                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1293                                         dma-names = "rx", "tx";
1294                                 };
1295                                 src4: src-4 {
1296                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1297                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1298                                         dma-names = "rx", "tx";
1299                                 };
1300                                 src5: src-5 {
1301                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1302                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1303                                         dma-names = "rx", "tx";
1304                                 };
1305                                 src6: src-6 {
1306                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1307                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
1308                                         dma-names = "rx", "tx";
1309                                 };
1310                                 src7: src-7 {
1311                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1312                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
1313                                         dma-names = "rx", "tx";
1314                                 };
1315                                 src8: src-8 {
1316                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1317                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
1318                                         dma-names = "rx", "tx";
1319                                 };
1320                                 src9: src-9 {
1321                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1322                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
1323                                         dma-names = "rx", "tx";
1324                                 };
1325                         };
1326
1327                         rcar_sound,ssi {
1328                                 ssi0: ssi-0 {
1329                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1330                                         dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1331                                         dma-names = "rx", "tx", "rxu", "txu";
1332                                 };
1333                                 ssi1: ssi-1 {
1334                                         interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1335                                         dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1336                                         dma-names = "rx", "tx", "rxu", "txu";
1337                                 };
1338                                 ssi2: ssi-2 {
1339                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1340                                         dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1341                                         dma-names = "rx", "tx", "rxu", "txu";
1342                                 };
1343                                 ssi3: ssi-3 {
1344                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1345                                         dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1346                                         dma-names = "rx", "tx", "rxu", "txu";
1347                                 };
1348                                 ssi4: ssi-4 {
1349                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1350                                         dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1351                                         dma-names = "rx", "tx", "rxu", "txu";
1352                                 };
1353                                 ssi5: ssi-5 {
1354                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1355                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1356                                         dma-names = "rx", "tx", "rxu", "txu";
1357                                 };
1358                                 ssi6: ssi-6 {
1359                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1360                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1361                                         dma-names = "rx", "tx", "rxu", "txu";
1362                                 };
1363                                 ssi7: ssi-7 {
1364                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1365                                         dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1366                                         dma-names = "rx", "tx", "rxu", "txu";
1367                                 };
1368                                 ssi8: ssi-8 {
1369                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1370                                         dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1371                                         dma-names = "rx", "tx", "rxu", "txu";
1372                                 };
1373                                 ssi9: ssi-9 {
1374                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1375                                         dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1376                                         dma-names = "rx", "tx", "rxu", "txu";
1377                                 };
1378                         };
1379                 };
1380
1381                 audma0: dma-controller@ec700000 {
1382                         compatible = "renesas,dmac-r8a7743",
1383                                      "renesas,rcar-dmac";
1384                         reg = <0 0xec700000 0 0x10000>;
1385                         interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
1386                                       GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
1387                                       GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
1388                                       GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
1389                                       GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
1390                                       GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
1391                                       GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
1392                                       GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
1393                                       GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
1394                                       GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
1395                                       GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
1396                                       GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
1397                                       GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
1398                                       GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
1399                         interrupt-names = "error",
1400                                           "ch0", "ch1", "ch2", "ch3",
1401                                           "ch4", "ch5", "ch6", "ch7",
1402                                           "ch8", "ch9", "ch10", "ch11",
1403                                           "ch12";
1404                         clocks = <&cpg CPG_MOD 502>;
1405                         clock-names = "fck";
1406                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1407                         resets = <&cpg 502>;
1408                         #dma-cells = <1>;
1409                         dma-channels = <13>;
1410                 };
1411
1412                 audma1: dma-controller@ec720000 {
1413                         compatible = "renesas,dmac-r8a7743",
1414                                      "renesas,rcar-dmac";
1415                         reg = <0 0xec720000 0 0x10000>;
1416                         interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
1417                                       GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
1418                                       GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
1419                                       GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
1420                                       GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
1421                                       GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
1422                                       GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
1423                                       GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
1424                                       GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
1425                                       GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
1426                                       GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
1427                                       GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
1428                                       GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
1429                                       GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
1430                         interrupt-names = "error",
1431                                           "ch0", "ch1", "ch2", "ch3",
1432                                           "ch4", "ch5", "ch6", "ch7",
1433                                           "ch8", "ch9", "ch10", "ch11",
1434                                           "ch12";
1435                         clocks = <&cpg CPG_MOD 501>;
1436                         clock-names = "fck";
1437                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1438                         resets = <&cpg 501>;
1439                         #dma-cells = <1>;
1440                         dma-channels = <13>;
1441                 };
1442
1443                 /*
1444                  * pci1 and xhci share the same phy, therefore only one of them
1445                  * can be active at any one time. If both of them are enabled,
1446                  * a race condition will determine who'll control the phy.
1447                  * A firmware file is needed by the xhci driver in order for
1448                  * USB 3.0 to work properly.
1449                  */
1450                 xhci: usb@ee000000 {
1451                         compatible = "renesas,xhci-r8a7743",
1452                                      "renesas,rcar-gen2-xhci";
1453                         reg = <0 0xee000000 0 0xc00>;
1454                         interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1455                         clocks = <&cpg CPG_MOD 328>;
1456                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1457                         resets = <&cpg 328>;
1458                         phys = <&usb2 1>;
1459                         phy-names = "usb";
1460                         status = "disabled";
1461                 };
1462
1463                 pci0: pci@ee090000 {
1464                         compatible = "renesas,pci-r8a7743",
1465                                      "renesas,pci-rcar-gen2";
1466                         device_type = "pci";
1467                         reg = <0 0xee090000 0 0xc00>,
1468                               <0 0xee080000 0 0x1100>;
1469                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1470                         clocks = <&cpg CPG_MOD 703>;
1471                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1472                         resets = <&cpg 703>;
1473                         status = "disabled";
1474
1475                         bus-range = <0 0>;
1476                         #address-cells = <3>;
1477                         #size-cells = <2>;
1478                         #interrupt-cells = <1>;
1479                         ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1480                         interrupt-map-mask = <0xff00 0 0 0x7>;
1481                         interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1482                                          0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1483                                          0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1484
1485                         usb@1,0 {
1486                                 reg = <0x800 0 0 0 0>;
1487                                 phys = <&usb0 0>;
1488                                 phy-names = "usb";
1489                         };
1490
1491                         usb@2,0 {
1492                                 reg = <0x1000 0 0 0 0>;
1493                                 phys = <&usb0 0>;
1494                                 phy-names = "usb";
1495                         };
1496                 };
1497
1498                 pci1: pci@ee0d0000 {
1499                         compatible = "renesas,pci-r8a7743",
1500                                      "renesas,pci-rcar-gen2";
1501                         device_type = "pci";
1502                         reg = <0 0xee0d0000 0 0xc00>,
1503                               <0 0xee0c0000 0 0x1100>;
1504                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1505                         clocks = <&cpg CPG_MOD 703>;
1506                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1507                         resets = <&cpg 703>;
1508                         status = "disabled";
1509
1510                         bus-range = <1 1>;
1511                         #address-cells = <3>;
1512                         #size-cells = <2>;
1513                         #interrupt-cells = <1>;
1514                         ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1515                         interrupt-map-mask = <0xff00 0 0 0x7>;
1516                         interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1517                                          0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1518                                          0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1519
1520                         usb@1,0 {
1521                                 reg = <0x10800 0 0 0 0>;
1522                                 phys = <&usb2 0>;
1523                                 phy-names = "usb";
1524                         };
1525
1526                         usb@2,0 {
1527                                 reg = <0x11000 0 0 0 0>;
1528                                 phys = <&usb2 0>;
1529                                 phy-names = "usb";
1530                         };
1531                 };
1532
1533                 sdhi0: sd@ee100000 {
1534                         compatible = "renesas,sdhi-r8a7743",
1535                                      "renesas,rcar-gen2-sdhi";
1536                         reg = <0 0xee100000 0 0x328>;
1537                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1538                         clocks = <&cpg CPG_MOD 314>;
1539                         dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
1540                                <&dmac1 0xcd>, <&dmac1 0xce>;
1541                         dma-names = "tx", "rx", "tx", "rx";
1542                         max-frequency = <195000000>;
1543                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1544                         resets = <&cpg 314>;
1545                         status = "disabled";
1546                 };
1547
1548                 sdhi1: sd@ee140000 {
1549                         compatible = "renesas,sdhi-r8a7743",
1550                                      "renesas,rcar-gen2-sdhi";
1551                         reg = <0 0xee140000 0 0x100>;
1552                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1553                         clocks = <&cpg CPG_MOD 312>;
1554                         dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
1555                                <&dmac1 0xc1>, <&dmac1 0xc2>;
1556                         dma-names = "tx", "rx", "tx", "rx";
1557                         max-frequency = <97500000>;
1558                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1559                         resets = <&cpg 312>;
1560                         status = "disabled";
1561                 };
1562
1563                 sdhi2: sd@ee160000 {
1564                         compatible = "renesas,sdhi-r8a7743",
1565                                      "renesas,rcar-gen2-sdhi";
1566                         reg = <0 0xee160000 0 0x100>;
1567                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1568                         clocks = <&cpg CPG_MOD 311>;
1569                         dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
1570                                <&dmac1 0xd3>, <&dmac1 0xd4>;
1571                         dma-names = "tx", "rx", "tx", "rx";
1572                         max-frequency = <97500000>;
1573                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1574                         resets = <&cpg 311>;
1575                         status = "disabled";
1576                 };
1577
1578                 mmcif0: mmc@ee200000 {
1579                         compatible = "renesas,mmcif-r8a7743",
1580                                      "renesas,sh-mmcif";
1581                         reg = <0 0xee200000 0 0x80>;
1582                         interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1583                         clocks = <&cpg CPG_MOD 315>;
1584                         dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
1585                                <&dmac1 0xd1>, <&dmac1 0xd2>;
1586                         dma-names = "tx", "rx", "tx", "rx";
1587                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1588                         resets = <&cpg 315>;
1589                         reg-io-width = <4>;
1590                         max-frequency = <97500000>;
1591                         status = "disabled";
1592                 };
1593
1594                 ether: ethernet@ee700000 {
1595                         compatible = "renesas,ether-r8a7743",
1596                                      "renesas,rcar-gen2-ether";
1597                         reg = <0 0xee700000 0 0x400>;
1598                         interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
1599                         clocks = <&cpg CPG_MOD 813>;
1600                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1601                         resets = <&cpg 813>;
1602                         phy-mode = "rmii";
1603                         #address-cells = <1>;
1604                         #size-cells = <0>;
1605                         status = "disabled";
1606                 };
1607
1608                 gic: interrupt-controller@f1001000 {
1609                         compatible = "arm,gic-400";
1610                         #interrupt-cells = <3>;
1611                         #address-cells = <0>;
1612                         interrupt-controller;
1613                         reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
1614                               <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
1615                         interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
1616                         clocks = <&cpg CPG_MOD 408>;
1617                         clock-names = "clk";
1618                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1619                         resets = <&cpg 408>;
1620                 };
1621
1622                 pciec: pcie@fe000000 {
1623                         compatible = "renesas,pcie-r8a7743",
1624                                      "renesas,pcie-rcar-gen2";
1625                         reg = <0 0xfe000000 0 0x80000>;
1626                         #address-cells = <3>;
1627                         #size-cells = <2>;
1628                         bus-range = <0x00 0xff>;
1629                         device_type = "pci";
1630                         ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
1631                                   0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
1632                                   0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
1633                                   0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1634                         /* Map all possible DDR as inbound ranges */
1635                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
1636                                       0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>;
1637                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1638                                      <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1639                                      <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1640                         #interrupt-cells = <1>;
1641                         interrupt-map-mask = <0 0 0 0>;
1642                         interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1643                         clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1644                         clock-names = "pcie", "pcie_bus";
1645                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1646                         resets = <&cpg 319>;
1647                         status = "disabled";
1648                 };
1649
1650                 vsp@fe928000 {
1651                         compatible = "renesas,vsp1";
1652                         reg = <0 0xfe928000 0 0x8000>;
1653                         interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
1654                         clocks = <&cpg CPG_MOD 131>;
1655                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1656                         resets = <&cpg 131>;
1657                 };
1658
1659                 vsp@fe930000 {
1660                         compatible = "renesas,vsp1";
1661                         reg = <0 0xfe930000 0 0x8000>;
1662                         interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1663                         clocks = <&cpg CPG_MOD 128>;
1664                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1665                         resets = <&cpg 128>;
1666                 };
1667
1668                 vsp@fe938000 {
1669                         compatible = "renesas,vsp1";
1670                         reg = <0 0xfe938000 0 0x8000>;
1671                         interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
1672                         clocks = <&cpg CPG_MOD 127>;
1673                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1674                         resets = <&cpg 127>;
1675                 };
1676
1677                 du: display@feb00000 {
1678                         compatible = "renesas,du-r8a7743";
1679                         reg = <0 0xfeb00000 0 0x40000>,
1680                               <0 0xfeb90000 0 0x1c>;
1681                         reg-names = "du", "lvds.0";
1682                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1683                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
1684                         clocks = <&cpg CPG_MOD 724>,
1685                                  <&cpg CPG_MOD 723>,
1686                                  <&cpg CPG_MOD 726>;
1687                         clock-names = "du.0", "du.1", "lvds.0";
1688                         status = "disabled";
1689
1690                         ports {
1691                                 #address-cells = <1>;
1692                                 #size-cells = <0>;
1693
1694                                 port@0 {
1695                                         reg = <0>;
1696                                         du_out_rgb: endpoint {
1697                                         };
1698                                 };
1699                                 port@1 {
1700                                         reg = <1>;
1701                                         du_out_lvds0: endpoint {
1702                                         };
1703                                 };
1704                         };
1705                 };
1706
1707                 prr: chipid@ff000044 {
1708                         compatible = "renesas,prr";
1709                         reg = <0 0xff000044 0 4>;
1710                 };
1711
1712                 cmt0: timer@ffca0000 {
1713                         compatible = "renesas,r8a7743-cmt0",
1714                                      "renesas,rcar-gen2-cmt0";
1715                         reg = <0 0xffca0000 0 0x1004>;
1716                         interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
1717                                      <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
1718                         clocks = <&cpg CPG_MOD 124>;
1719                         clock-names = "fck";
1720                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1721                         resets = <&cpg 124>;
1722                         status = "disabled";
1723                 };
1724
1725                 cmt1: timer@e6130000 {
1726                         compatible = "renesas,r8a7743-cmt1",
1727                                      "renesas,rcar-gen2-cmt1";
1728                         reg = <0 0xe6130000 0 0x1004>;
1729                         interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
1730                                      <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
1731                                      <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
1732                                      <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
1733                                      <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
1734                                      <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
1735                                      <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
1736                                      <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
1737                         clocks = <&cpg CPG_MOD 329>;
1738                         clock-names = "fck";
1739                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1740                         resets = <&cpg 329>;
1741                         status = "disabled";
1742                 };
1743         };
1744
1745         thermal-zones {
1746                 cpu_thermal: cpu-thermal {
1747                         polling-delay-passive = <0>;
1748                         polling-delay = <0>;
1749
1750                         thermal-sensors = <&thermal>;
1751
1752                         trips {
1753                                 cpu-crit {
1754                                         temperature = <95000>;
1755                                         hysteresis = <0>;
1756                                         type = "critical";
1757                                 };
1758                         };
1759
1760                         cooling-maps {
1761                         };
1762                 };
1763         };
1764
1765         timer {
1766                 compatible = "arm,armv7-timer";
1767                 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1768                                       <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1769                                       <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1770                                       <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
1771         };
1772
1773         /* External USB clock - can be overridden by the board */
1774         usb_extal_clk: usb_extal {
1775                 compatible = "fixed-clock";
1776                 #clock-cells = <0>;
1777                 clock-frequency = <48000000>;
1778         };
1779 };