arch/arm/boot/dts/r8a7743.dtsi

   1 /*
   2  * Device Tree Source for the r8a7743 SoC
   3  *
   4  * Copyright (C) 2016-2017 Cogent Embedded Inc.
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2. This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 #include <dt-bindings/interrupt-controller/irq.h>
  12 #include <dt-bindings/interrupt-controller/arm-gic.h>
  13 #include <dt-bindings/clock/r8a7743-cpg-mssr.h>
  14 #include <dt-bindings/power/r8a7743-sysc.h>
  15
  16 / {
  17         compatible = "renesas,r8a7743";
  18         #address-cells = <2>;
  19         #size-cells = <2>;
  20
  21         aliases {
  22                 i2c0 = &i2c0;
  23                 i2c1 = &i2c1;
  24                 i2c2 = &i2c2;
  25                 i2c3 = &i2c3;
  26                 i2c4 = &i2c4;
  27                 i2c5 = &i2c5;
  28                 i2c6 = &iic0;
  29                 i2c7 = &iic1;
  30                 i2c8 = &iic3;
  31                 spi0 = &qspi;
  32                 spi1 = &msiof0;
  33                 spi2 = &msiof1;
  34                 spi3 = &msiof2;
  35         };
  36
  37         cpus {
  38                 #address-cells = <1>;
  39                 #size-cells = <0>;
  40                 enable-method = "renesas,apmu";
  41
  42                 cpu0: cpu@0 {
  43                         device_type = "cpu";
  44                         compatible = "arm,cortex-a15";
  45                         reg = <0>;
  46                         clock-frequency = <1500000000>;
  47                         clocks = <&cpg CPG_CORE R8A7743_CLK_Z>;
  48                         clock-latency = <300000>; /* 300 us */
  49                         power-domains = <&sysc R8A7743_PD_CA15_CPU0>;
  50                         next-level-cache = <&L2_CA15>;
  51
  52                         /* kHz - uV - OPPs unknown yet */
  53                         operating-points = <1500000 1000000>,
  54                                            <1312500 1000000>,
  55                                            <1125000 1000000>,
  56                                            < 937500 1000000>,
  57                                            < 750000 1000000>,
  58                                            < 375000 1000000>;
  59                 };
  60
  61                 cpu1: cpu@1 {
  62                         device_type = "cpu";
  63                         compatible = "arm,cortex-a15";
  64                         reg = <1>;
  65                         clock-frequency = <1500000000>;
  66                         power-domains = <&sysc R8A7743_PD_CA15_CPU1>;
  67                         next-level-cache = <&L2_CA15>;
  68                 };
  69
  70                 L2_CA15: cache-controller-0 {
  71                         compatible = "cache";
  72                         cache-unified;
  73                         cache-level = <2>;
  74                         power-domains = <&sysc R8A7743_PD_CA15_SCU>;
  75                 };
  76         };
  77
  78         soc {
  79                 compatible = "simple-bus";
  80                 interrupt-parent = <&gic>;
  81
  82                 #address-cells = <2>;
  83                 #size-cells = <2>;
  84                 ranges;
  85
  86                 apmu@e6152000 {
  87                         compatible = "renesas,r8a7743-apmu", "renesas,apmu";
  88                         reg = <0 0xe6152000 0 0x188>;
  89                         cpus = <&cpu0 &cpu1>;
  90                 };
  91
  92                 gic: interrupt-controller@f1001000 {
  93                         compatible = "arm,gic-400";
  94                         #interrupt-cells = <3>;
  95                         #address-cells = <0>;
  96                         interrupt-controller;
  97                         reg = <0 0xf1001000 0 0x1000>,
  98                               <0 0xf1002000 0 0x2000>,
  99                               <0 0xf1004000 0 0x2000>,
 100                               <0 0xf1006000 0 0x2000>;
 101                         interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
 102                                                  IRQ_TYPE_LEVEL_HIGH)>;
 103                         clocks = <&cpg CPG_MOD 408>;
 104                         clock-names = "clk";
 105                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 106                         resets = <&cpg 408>;
 107                 };
 108
 109                 gpio0: gpio@e6050000 {
 110                         compatible = "renesas,gpio-r8a7743",
 111                                      "renesas,gpio-rcar";
 112                         reg = <0 0xe6050000 0 0x50>;
 113                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 114                         #gpio-cells = <2>;
 115                         gpio-controller;
 116                         gpio-ranges = <&pfc 0 0 32>;
 117                         #interrupt-cells = <2>;
 118                         interrupt-controller;
 119                         clocks = <&cpg CPG_MOD 912>;
 120                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 121                         resets = <&cpg 912>;
 122                 };
 123
 124                 gpio1: gpio@e6051000 {
 125                         compatible = "renesas,gpio-r8a7743",
 126                                      "renesas,gpio-rcar";
 127                         reg = <0 0xe6051000 0 0x50>;
 128                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 129                         #gpio-cells = <2>;
 130                         gpio-controller;
 131                         gpio-ranges = <&pfc 0 32 26>;
 132                         #interrupt-cells = <2>;
 133                         interrupt-controller;
 134                         clocks = <&cpg CPG_MOD 911>;
 135                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 136                         resets = <&cpg 911>;
 137                 };
 138
 139                 gpio2: gpio@e6052000 {
 140                         compatible = "renesas,gpio-r8a7743",
 141                                      "renesas,gpio-rcar";
 142                         reg = <0 0xe6052000 0 0x50>;
 143                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 144                         #gpio-cells = <2>;
 145                         gpio-controller;
 146                         gpio-ranges = <&pfc 0 64 32>;
 147                         #interrupt-cells = <2>;
 148                         interrupt-controller;
 149                         clocks = <&cpg CPG_MOD 910>;
 150                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 151                         resets = <&cpg 910>;
 152                 };
 153
 154                 gpio3: gpio@e6053000 {
 155                         compatible = "renesas,gpio-r8a7743",
 156                                      "renesas,gpio-rcar";
 157                         reg = <0 0xe6053000 0 0x50>;
 158                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 159                         #gpio-cells = <2>;
 160                         gpio-controller;
 161                         gpio-ranges = <&pfc 0 96 32>;
 162                         #interrupt-cells = <2>;
 163                         interrupt-controller;
 164                         clocks = <&cpg CPG_MOD 909>;
 165                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 166                         resets = <&cpg 909>;
 167                 };
 168
 169                 gpio4: gpio@e6054000 {
 170                         compatible = "renesas,gpio-r8a7743",
 171                                      "renesas,gpio-rcar";
 172                         reg = <0 0xe6054000 0 0x50>;
 173                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 174                         #gpio-cells = <2>;
 175                         gpio-controller;
 176                         gpio-ranges = <&pfc 0 128 32>;
 177                         #interrupt-cells = <2>;
 178                         interrupt-controller;
 179                         clocks = <&cpg CPG_MOD 908>;
 180                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 181                         resets = <&cpg 908>;
 182                 };
 183
 184                 gpio5: gpio@e6055000 {
 185                         compatible = "renesas,gpio-r8a7743",
 186                                      "renesas,gpio-rcar";
 187                         reg = <0 0xe6055000 0 0x50>;
 188                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 189                         #gpio-cells = <2>;
 190                         gpio-controller;
 191                         gpio-ranges = <&pfc 0 160 32>;
 192                         #interrupt-cells = <2>;
 193                         interrupt-controller;
 194                         clocks = <&cpg CPG_MOD 907>;
 195                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 196                         resets = <&cpg 907>;
 197                 };
 198
 199                 gpio6: gpio@e6055400 {
 200                         compatible = "renesas,gpio-r8a7743",
 201                                      "renesas,gpio-rcar";
 202                         reg = <0 0xe6055400 0 0x50>;
 203                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 204                         #gpio-cells = <2>;
 205                         gpio-controller;
 206                         gpio-ranges = <&pfc 0 192 32>;
 207                         #interrupt-cells = <2>;
 208                         interrupt-controller;
 209                         clocks = <&cpg CPG_MOD 905>;
 210                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 211                         resets = <&cpg 905>;
 212                 };
 213
 214                 gpio7: gpio@e6055800 {
 215                         compatible = "renesas,gpio-r8a7743",
 216                                      "renesas,gpio-rcar";
 217                         reg = <0 0xe6055800 0 0x50>;
 218                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 219                         #gpio-cells = <2>;
 220                         gpio-controller;
 221                         gpio-ranges = <&pfc 0 224 26>;
 222                         #interrupt-cells = <2>;
 223                         interrupt-controller;
 224                         clocks = <&cpg CPG_MOD 904>;
 225                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 226                         resets = <&cpg 904>;
 227                 };
 228
 229                 irqc: interrupt-controller@e61c0000 {
 230                         compatible = "renesas,irqc-r8a7743", "renesas,irqc";
 231                         #interrupt-cells = <2>;
 232                         interrupt-controller;
 233                         reg = <0 0xe61c0000 0 0x200>;
 234                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
 235                                      <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
 236                                      <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
 237                                      <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
 238                                      <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
 239                                      <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
 240                                      <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
 241                                      <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
 242                                      <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
 243                                      <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 244                         clocks = <&cpg CPG_MOD 407>;
 245                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 246                         resets = <&cpg 407>;
 247                 };
 248
 249                 timer {
 250                         compatible = "arm,armv7-timer";
 251                         interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
 252                                                   IRQ_TYPE_LEVEL_LOW)>,
 253                                      <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) |
 254                                                   IRQ_TYPE_LEVEL_LOW)>,
 255                                      <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) |
 256                                                   IRQ_TYPE_LEVEL_LOW)>,
 257                                      <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) |
 258                                                   IRQ_TYPE_LEVEL_LOW)>;
 259                 };
 260
 261                 cpg: clock-controller@e6150000 {
 262                         compatible = "renesas,r8a7743-cpg-mssr";
 263                         reg = <0 0xe6150000 0 0x1000>;
 264                         clocks = <&extal_clk>, <&usb_extal_clk>;
 265                         clock-names = "extal", "usb_extal";
 266                         #clock-cells = <2>;
 267                         #power-domain-cells = <0>;
 268                         #reset-cells = <1>;
 269                 };
 270
 271                 prr: chipid@ff000044 {
 272                         compatible = "renesas,prr";
 273                         reg = <0 0xff000044 0 4>;
 274                 };
 275
 276                 rst: reset-controller@e6160000 {
 277                         compatible = "renesas,r8a7743-rst";
 278                         reg = <0 0xe6160000 0 0x100>;
 279                 };
 280
 281                 sysc: system-controller@e6180000 {
 282                         compatible = "renesas,r8a7743-sysc";
 283                         reg = <0 0xe6180000 0 0x200>;
 284                         #power-domain-cells = <1>;
 285                 };
 286
 287                 pfc: pin-controller@e6060000 {
 288                         compatible = "renesas,pfc-r8a7743";
 289                         reg = <0 0xe6060000 0 0x250>;
 290                 };
 291
 292                 dmac0: dma-controller@e6700000 {
 293                         compatible = "renesas,dmac-r8a7743",
 294                                      "renesas,rcar-dmac";
 295                         reg = <0 0xe6700000 0 0x20000>;
 296                         interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
 297                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 298                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 299                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 300                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 301                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 302                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 303                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 304                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 305                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 306                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 307                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 308                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 309                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 310                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 311                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
 312                         interrupt-names = "error",
 313                                         "ch0", "ch1", "ch2", "ch3",
 314                                         "ch4", "ch5", "ch6", "ch7",
 315                                         "ch8", "ch9", "ch10", "ch11",
 316                                         "ch12", "ch13", "ch14";
 317                         clocks = <&cpg CPG_MOD 219>;
 318                         clock-names = "fck";
 319                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 320                         resets = <&cpg 219>;
 321                         #dma-cells = <1>;
 322                         dma-channels = <15>;
 323                 };
 324
 325                 dmac1: dma-controller@e6720000 {
 326                         compatible = "renesas,dmac-r8a7743",
 327                                      "renesas,rcar-dmac";
 328                         reg = <0 0xe6720000 0 0x20000>;
 329                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 330                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 331                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 332                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 333                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 334                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 335                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 336                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 337                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 338                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 339                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 340                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 341                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 342                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 343                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 344                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
 345                         interrupt-names = "error",
 346                                         "ch0", "ch1", "ch2", "ch3",
 347                                         "ch4", "ch5", "ch6", "ch7",
 348                                         "ch8", "ch9", "ch10", "ch11",
 349                                         "ch12", "ch13", "ch14";
 350                         clocks = <&cpg CPG_MOD 218>;
 351                         clock-names = "fck";
 352                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 353                         resets = <&cpg 218>;
 354                         #dma-cells = <1>;
 355                         dma-channels = <15>;
 356                 };
 357
 358                 /* The memory map in the User's Manual maps the cores to bus
 359                  *  numbers
 360                  */
 361                 i2c0: i2c@e6508000 {
 362                         #address-cells = <1>;
 363                         #size-cells = <0>;
 364                         compatible = "renesas,i2c-r8a7743",
 365                                      "renesas,rcar-gen2-i2c";
 366                         reg = <0 0xe6508000 0 0x40>;
 367                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 368                         clocks = <&cpg CPG_MOD 931>;
 369                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 370                         resets = <&cpg 931>;
 371                         i2c-scl-internal-delay-ns = <6>;
 372                         status = "disabled";
 373                 };
 374
 375                 i2c1: i2c@e6518000 {
 376                         #address-cells = <1>;
 377                         #size-cells = <0>;
 378                         compatible = "renesas,i2c-r8a7743",
 379                                      "renesas,rcar-gen2-i2c";
 380                         reg = <0 0xe6518000 0 0x40>;
 381                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 382                         clocks = <&cpg CPG_MOD 930>;
 383                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 384                         resets = <&cpg 930>;
 385                         i2c-scl-internal-delay-ns = <6>;
 386                         status = "disabled";
 387                 };
 388
 389                 i2c2: i2c@e6530000 {
 390                         #address-cells = <1>;
 391                         #size-cells = <0>;
 392                         compatible = "renesas,i2c-r8a7743",
 393                                      "renesas,rcar-gen2-i2c";
 394                         reg = <0 0xe6530000 0 0x40>;
 395                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 396                         clocks = <&cpg CPG_MOD 929>;
 397                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 398                         resets = <&cpg 929>;
 399                         i2c-scl-internal-delay-ns = <6>;
 400                         status = "disabled";
 401                 };
 402
 403                 i2c3: i2c@e6540000 {
 404                         #address-cells = <1>;
 405                         #size-cells = <0>;
 406                         compatible = "renesas,i2c-r8a7743",
 407                                      "renesas,rcar-gen2-i2c";
 408                         reg = <0 0xe6540000 0 0x40>;
 409                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 410                         clocks = <&cpg CPG_MOD 928>;
 411                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 412                         resets = <&cpg 928>;
 413                         i2c-scl-internal-delay-ns = <6>;
 414                         status = "disabled";
 415                 };
 416
 417                 i2c4: i2c@e6520000 {
 418                         #address-cells = <1>;
 419                         #size-cells = <0>;
 420                         compatible = "renesas,i2c-r8a7743",
 421                                      "renesas,rcar-gen2-i2c";
 422                         reg = <0 0xe6520000 0 0x40>;
 423                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 424                         clocks = <&cpg CPG_MOD 927>;
 425                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 426                         resets = <&cpg 927>;
 427                         i2c-scl-internal-delay-ns = <6>;
 428                         status = "disabled";
 429                 };
 430
 431                 i2c5: i2c@e6528000 {
 432                         /* doesn't need pinmux */
 433                         #address-cells = <1>;
 434                         #size-cells = <0>;
 435                         compatible = "renesas,i2c-r8a7743",
 436                                      "renesas,rcar-gen2-i2c";
 437                         reg = <0 0xe6528000 0 0x40>;
 438                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 439                         clocks = <&cpg CPG_MOD 925>;
 440                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 441                         resets = <&cpg 925>;
 442                         i2c-scl-internal-delay-ns = <110>;
 443                         status = "disabled";
 444                 };
 445
 446                 iic0: i2c@e6500000 {
 447                         #address-cells = <1>;
 448                         #size-cells = <0>;
 449                         compatible = "renesas,iic-r8a7743",
 450                                      "renesas,rcar-gen2-iic",
 451                                      "renesas,rmobile-iic";
 452                         reg = <0 0xe6500000 0 0x425>;
 453                         interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
 454                         clocks = <&cpg CPG_MOD 318>;
 455                         dmas = <&dmac0 0x61>, <&dmac0 0x62>,
 456                                <&dmac1 0x61>, <&dmac1 0x62>;
 457                         dma-names = "tx", "rx", "tx", "rx";
 458                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 459                         resets = <&cpg 318>;
 460                         status = "disabled";
 461                 };
 462
 463                 iic1: i2c@e6510000 {
 464                         #address-cells = <1>;
 465                         #size-cells = <0>;
 466                         compatible = "renesas,iic-r8a7743",
 467                                      "renesas,rcar-gen2-iic",
 468                                      "renesas,rmobile-iic";
 469                         reg = <0 0xe6510000 0 0x425>;
 470                         interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
 471                         clocks = <&cpg CPG_MOD 323>;
 472                         dmas = <&dmac0 0x65>, <&dmac0 0x66>,
 473                                <&dmac1 0x65>, <&dmac1 0x66>;
 474                         dma-names = "tx", "rx", "tx", "rx";
 475                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 476                         resets = <&cpg 323>;
 477                         status = "disabled";
 478                 };
 479
 480                 iic3: i2c@e60b0000 {
 481                         /* doesn't need pinmux */
 482                         #address-cells = <1>;
 483                         #size-cells = <0>;
 484                         compatible = "renesas,iic-r8a7743",
 485                                      "renesas,rcar-gen2-iic",
 486                                      "renesas,rmobile-iic";
 487                         reg = <0 0xe60b0000 0 0x425>;
 488                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 489                         clocks = <&cpg CPG_MOD 926>;
 490                         dmas = <&dmac0 0x77>, <&dmac0 0x78>,
 491                                <&dmac1 0x77>, <&dmac1 0x78>;
 492                         dma-names = "tx", "rx", "tx", "rx";
 493                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 494                         resets = <&cpg 926>;
 495                         status = "disabled";
 496                 };
 497
 498                 scifa0: serial@e6c40000 {
 499                         compatible = "renesas,scifa-r8a7743",
 500                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 501                         reg = <0 0xe6c40000 0 0x40>;
 502                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 503                         clocks = <&cpg CPG_MOD 204>;
 504                         clock-names = "fck";
 505                         dmas = <&dmac0 0x21>, <&dmac0 0x22>,
 506                                <&dmac1 0x21>, <&dmac1 0x22>;
 507                         dma-names = "tx", "rx", "tx", "rx";
 508                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 509                         resets = <&cpg 204>;
 510                         status = "disabled";
 511                 };
 512
 513                 scifa1: serial@e6c50000 {
 514                         compatible = "renesas,scifa-r8a7743",
 515                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 516                         reg = <0 0xe6c50000 0 0x40>;
 517                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 518                         clocks = <&cpg CPG_MOD 203>;
 519                         clock-names = "fck";
 520                         dmas = <&dmac0 0x25>, <&dmac0 0x26>,
 521                                <&dmac1 0x25>, <&dmac1 0x26>;
 522                         dma-names = "tx", "rx", "tx", "rx";
 523                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 524                         resets = <&cpg 203>;
 525                         status = "disabled";
 526                 };
 527
 528                 scifa2: serial@e6c60000 {
 529                         compatible = "renesas,scifa-r8a7743",
 530                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 531                         reg = <0 0xe6c60000 0 0x40>;
 532                         interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
 533                         clocks = <&cpg CPG_MOD 202>;
 534                         clock-names = "fck";
 535                         dmas = <&dmac0 0x27>, <&dmac0 0x28>,
 536                                <&dmac1 0x27>, <&dmac1 0x28>;
 537                         dma-names = "tx", "rx", "tx", "rx";
 538                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 539                         resets = <&cpg 202>;
 540                         status = "disabled";
 541                 };
 542
 543                 scifa3: serial@e6c70000 {
 544                         compatible = "renesas,scifa-r8a7743",
 545                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 546                         reg = <0 0xe6c70000 0 0x40>;
 547                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
 548                         clocks = <&cpg CPG_MOD 1106>;
 549                         clock-names = "fck";
 550                         dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
 551                                <&dmac1 0x1b>, <&dmac1 0x1c>;
 552                         dma-names = "tx", "rx", "tx", "rx";
 553                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 554                         resets = <&cpg 1106>;
 555                         status = "disabled";
 556                 };
 557
 558                 scifa4: serial@e6c78000 {
 559                         compatible = "renesas,scifa-r8a7743",
 560                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 561                         reg = <0 0xe6c78000 0 0x40>;
 562                         interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 563                         clocks = <&cpg CPG_MOD 1107>;
 564                         clock-names = "fck";
 565                         dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
 566                                <&dmac1 0x1f>, <&dmac1 0x20>;
 567                         dma-names = "tx", "rx", "tx", "rx";
 568                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 569                         resets = <&cpg 1107>;
 570                         status = "disabled";
 571                 };
 572
 573                 scifa5: serial@e6c80000 {
 574                         compatible = "renesas,scifa-r8a7743",
 575                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 576                         reg = <0 0xe6c80000 0 0x40>;
 577                         interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
 578                         clocks = <&cpg CPG_MOD 1108>;
 579                         clock-names = "fck";
 580                         dmas = <&dmac0 0x23>, <&dmac0 0x24>,
 581                                <&dmac1 0x23>, <&dmac1 0x24>;
 582                         dma-names = "tx", "rx", "tx", "rx";
 583                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 584                         resets = <&cpg 1108>;
 585                         status = "disabled";
 586                 };
 587
 588                 scifb0: serial@e6c20000 {
 589                         compatible = "renesas,scifb-r8a7743",
 590                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 591                         reg = <0 0xe6c20000 0 0x100>;
 592                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
 593                         clocks = <&cpg CPG_MOD 206>;
 594                         clock-names = "fck";
 595                         dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
 596                                <&dmac1 0x3d>, <&dmac1 0x3e>;
 597                         dma-names = "tx", "rx", "tx", "rx";
 598                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 599                         resets = <&cpg 206>;
 600                         status = "disabled";
 601                 };
 602
 603                 scifb1: serial@e6c30000 {
 604                         compatible = "renesas,scifb-r8a7743",
 605                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 606                         reg = <0 0xe6c30000 0 0x100>;
 607                         interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
 608                         clocks = <&cpg CPG_MOD 207>;
 609                         clock-names = "fck";
 610                         dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
 611                                <&dmac1 0x19>, <&dmac1 0x1a>;
 612                         dma-names = "tx", "rx", "tx", "rx";
 613                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 614                         resets = <&cpg 207>;
 615                         status = "disabled";
 616                 };
 617
 618                 scifb2: serial@e6ce0000 {
 619                         compatible = "renesas,scifb-r8a7743",
 620                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 621                         reg = <0 0xe6ce0000 0 0x100>;
 622                         interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
 623                         clocks = <&cpg CPG_MOD 216>;
 624                         clock-names = "fck";
 625                         dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
 626                                <&dmac1 0x1d>, <&dmac1 0x1e>;
 627                         dma-names = "tx", "rx", "tx", "rx";
 628                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 629                         resets = <&cpg 216>;
 630                         status = "disabled";
 631                 };
 632
 633                 scif0: serial@e6e60000 {
 634                         compatible = "renesas,scif-r8a7743",
 635                                      "renesas,rcar-gen2-scif", "renesas,scif";
 636                         reg = <0 0xe6e60000 0 0x40>;
 637                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 638                         clocks = <&cpg CPG_MOD 721>,
 639                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
 640                         clock-names = "fck", "brg_int", "scif_clk";
 641                         dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
 642                                <&dmac1 0x29>, <&dmac1 0x2a>;
 643                         dma-names = "tx", "rx", "tx", "rx";
 644                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 645                         resets = <&cpg 721>;
 646                         status = "disabled";
 647                 };
 648
 649                 scif1: serial@e6e68000 {
 650                         compatible = "renesas,scif-r8a7743",
 651                                      "renesas,rcar-gen2-scif", "renesas,scif";
 652                         reg = <0 0xe6e68000 0 0x40>;
 653                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 654                         clocks = <&cpg CPG_MOD 720>,
 655                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
 656                         clock-names = "fck", "brg_int", "scif_clk";
 657                         dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
 658                                <&dmac1 0x2d>, <&dmac1 0x2e>;
 659                         dma-names = "tx", "rx", "tx", "rx";
 660                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 661                         resets = <&cpg 720>;
 662                         status = "disabled";
 663                 };
 664
 665                 scif2: serial@e6e58000 {
 666                         compatible = "renesas,scif-r8a7743",
 667                                      "renesas,rcar-gen2-scif", "renesas,scif";
 668                         reg = <0 0xe6e58000 0 0x40>;
 669                         interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
 670                         clocks = <&cpg CPG_MOD 719>,
 671                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
 672                         clock-names = "fck", "brg_int", "scif_clk";
 673                         dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
 674                                <&dmac1 0x2b>, <&dmac1 0x2c>;
 675                         dma-names = "tx", "rx", "tx", "rx";
 676                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 677                         resets = <&cpg 719>;
 678                         status = "disabled";
 679                 };
 680
 681                 scif3: serial@e6ea8000 {
 682                         compatible = "renesas,scif-r8a7743",
 683                                      "renesas,rcar-gen2-scif", "renesas,scif";
 684                         reg = <0 0xe6ea8000 0 0x40>;
 685                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 686                         clocks = <&cpg CPG_MOD 718>,
 687                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
 688                         clock-names = "fck", "brg_int", "scif_clk";
 689                         dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
 690                                <&dmac1 0x2f>, <&dmac1 0x30>;
 691                         dma-names = "tx", "rx", "tx", "rx";
 692                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 693                         resets = <&cpg 718>;
 694                         status = "disabled";
 695                 };
 696
 697                 scif4: serial@e6ee0000 {
 698                         compatible = "renesas,scif-r8a7743",
 699                                      "renesas,rcar-gen2-scif", "renesas,scif";
 700                         reg = <0 0xe6ee0000 0 0x40>;
 701                         interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
 702                         clocks = <&cpg CPG_MOD 715>,
 703                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
 704                         clock-names = "fck", "brg_int", "scif_clk";
 705                         dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
 706                                <&dmac1 0xfb>, <&dmac1 0xfc>;
 707                         dma-names = "tx", "rx", "tx", "rx";
 708                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 709                         resets = <&cpg 715>;
 710                         status = "disabled";
 711                 };
 712
 713                 scif5: serial@e6ee8000 {
 714                         compatible = "renesas,scif-r8a7743",
 715                                      "renesas,rcar-gen2-scif", "renesas,scif";
 716                         reg = <0 0xe6ee8000 0 0x40>;
 717                         interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
 718                         clocks = <&cpg CPG_MOD 714>,
 719                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
 720                         clock-names = "fck", "brg_int", "scif_clk";
 721                         dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
 722                                <&dmac1 0xfd>, <&dmac1 0xfe>;
 723                         dma-names = "tx", "rx", "tx", "rx";
 724                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 725                         resets = <&cpg 714>;
 726                         status = "disabled";
 727                 };
 728
 729                 hscif0: serial@e62c0000 {
 730                         compatible = "renesas,hscif-r8a7743",
 731                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
 732                         reg = <0 0xe62c0000 0 0x60>;
 733                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 734                         clocks = <&cpg CPG_MOD 717>,
 735                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
 736                         clock-names = "fck", "brg_int", "scif_clk";
 737                         dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
 738                                <&dmac1 0x39>, <&dmac1 0x3a>;
 739                         dma-names = "tx", "rx", "tx", "rx";
 740                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 741                         resets = <&cpg 717>;
 742                         status = "disabled";
 743                 };
 744
 745                 hscif1: serial@e62c8000 {
 746                         compatible = "renesas,hscif-r8a7743",
 747                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
 748                         reg = <0 0xe62c8000 0 0x60>;
 749                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 750                         clocks = <&cpg CPG_MOD 716>,
 751                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
 752                         clock-names = "fck", "brg_int", "scif_clk";
 753                         dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
 754                                <&dmac1 0x4d>, <&dmac1 0x4e>;
 755                         dma-names = "tx", "rx", "tx", "rx";
 756                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 757                         resets = <&cpg 716>;
 758                         status = "disabled";
 759                 };
 760
 761                 hscif2: serial@e62d0000 {
 762                         compatible = "renesas,hscif-r8a7743",
 763                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
 764                         reg = <0 0xe62d0000 0 0x60>;
 765                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 766                         clocks = <&cpg CPG_MOD 713>,
 767                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
 768                         clock-names = "fck", "brg_int", "scif_clk";
 769                         dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
 770                                <&dmac1 0x3b>, <&dmac1 0x3c>;
 771                         dma-names = "tx", "rx", "tx", "rx";
 772                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 773                         resets = <&cpg 713>;
 774                         status = "disabled";
 775                 };
 776
 777                 icram2: sram@e6300000 {
 778                         compatible = "mmio-sram";
 779                         reg = <0 0xe6300000 0 0x40000>;
 780                 };
 781
 782                 icram0: sram@e63a0000 {
 783                         compatible = "mmio-sram";
 784                         reg = <0 0xe63a0000 0 0x12000>;
 785                 };
 786
 787                 icram1: sram@e63c0000 {
 788                         compatible = "mmio-sram";
 789                         reg = <0 0xe63c0000 0 0x1000>;
 790                         #address-cells = <1>;
 791                         #size-cells = <1>;
 792                         ranges = <0 0 0xe63c0000 0x1000>;
 793
 794                         smp-sram@0 {
 795                                 compatible = "renesas,smp-sram";
 796                                 reg = <0 0x10>;
 797                         };
 798                 };
 799
 800                 ether: ethernet@ee700000 {
 801                         compatible = "renesas,ether-r8a7743";
 802                         reg = <0 0xee700000 0 0x400>;
 803                         interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
 804                         clocks = <&cpg CPG_MOD 813>;
 805                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 806                         resets = <&cpg 813>;
 807                         phy-mode = "rmii";
 808                         #address-cells = <1>;
 809                         #size-cells = <0>;
 810                         status = "disabled";
 811                 };
 812
 813                 avb: ethernet@e6800000 {
 814                         compatible = "renesas,etheravb-r8a7743",
 815                                      "renesas,etheravb-rcar-gen2";
 816                         reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
 817                         interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
 818                         clocks = <&cpg CPG_MOD 812>;
 819                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 820                         resets = <&cpg 812>;
 821                         #address-cells = <1>;
 822                         #size-cells = <0>;
 823                         status = "disabled";
 824                 };
 825
 826                 mmcif0: mmc@ee200000 {
 827                         compatible = "renesas,mmcif-r8a7743",
 828                                      "renesas,sh-mmcif";
 829                         reg = <0 0xee200000 0 0x80>;
 830                         interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
 831                         clocks = <&cpg CPG_MOD 315>;
 832                         dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
 833                                <&dmac1 0xd1>, <&dmac1 0xd2>;
 834                         dma-names = "tx", "rx", "tx", "rx";
 835                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 836                         resets = <&cpg 315>;
 837                         reg-io-width = <4>;
 838                         max-frequency = <97500000>;
 839                         status = "disabled";
 840                 };
 841
 842                 qspi: spi@e6b10000 {
 843                         compatible = "renesas,qspi-r8a7743", "renesas,qspi";
 844                         reg = <0 0xe6b10000 0 0x2c>;
 845                         interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
 846                         clocks = <&cpg CPG_MOD 917>;
 847                         dmas = <&dmac0 0x17>, <&dmac0 0x18>,
 848                                <&dmac1 0x17>, <&dmac1 0x18>;
 849                         dma-names = "tx", "rx", "tx", "rx";
 850                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 851                         num-cs = <1>;
 852                         #address-cells = <1>;
 853                         #size-cells = <0>;
 854                         resets = <&cpg 917>;
 855                         status = "disabled";
 856                 };
 857
 858                 msiof0: spi@e6e20000 {
 859                         compatible = "renesas,msiof-r8a7743",
 860                                      "renesas,rcar-gen2-msiof";
 861                         reg = <0 0xe6e20000 0 0x0064>;
 862                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
 863                         clocks = <&cpg CPG_MOD 000>;
 864                         dmas = <&dmac0 0x51>, <&dmac0 0x52>,
 865                                <&dmac1 0x51>, <&dmac1 0x52>;
 866                         dma-names = "tx", "rx", "tx", "rx";
 867                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 868                         #address-cells = <1>;
 869                         #size-cells = <0>;
 870                         resets = <&cpg 000>;
 871                         status = "disabled";
 872                 };
 873
 874                 msiof1: spi@e6e10000 {
 875                         compatible = "renesas,msiof-r8a7743",
 876                                      "renesas,rcar-gen2-msiof";
 877                         reg = <0 0xe6e10000 0 0x0064>;
 878                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
 879                         clocks = <&cpg CPG_MOD 208>;
 880                         dmas = <&dmac0 0x55>, <&dmac0 0x56>,
 881                                <&dmac1 0x55>, <&dmac1 0x56>;
 882                         dma-names = "tx", "rx", "tx", "rx";
 883                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 884                         #address-cells = <1>;
 885                         #size-cells = <0>;
 886                         resets = <&cpg 208>;
 887                         status = "disabled";
 888                 };
 889
 890                 msiof2: spi@e6e00000 {
 891                         compatible = "renesas,msiof-r8a7743",
 892                                      "renesas,rcar-gen2-msiof";
 893                         reg = <0 0xe6e00000 0 0x0064>;
 894                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
 895                         clocks = <&cpg CPG_MOD 205>;
 896                         dmas = <&dmac0 0x41>, <&dmac0 0x42>,
 897                                <&dmac1 0x41>, <&dmac1 0x42>;
 898                         dma-names = "tx", "rx", "tx", "rx";
 899                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 900                         #address-cells = <1>;
 901                         #size-cells = <0>;
 902                         resets = <&cpg 205>;
 903                         status = "disabled";
 904                 };
 905
 906                 sdhi0: sd@ee100000 {
 907                         compatible = "renesas,sdhi-r8a7743";
 908                         reg = <0 0xee100000 0 0x328>;
 909                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
 910                         clocks = <&cpg CPG_MOD 314>;
 911                         dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
 912                                <&dmac1 0xcd>, <&dmac1 0xce>;
 913                         dma-names = "tx", "rx", "tx", "rx";
 914                         max-frequency = <195000000>;
 915                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 916                         resets = <&cpg 314>;
 917                         status = "disabled";
 918                 };
 919
 920                 sdhi1: sd@ee140000 {
 921                         compatible = "renesas,sdhi-r8a7743";
 922                         reg = <0 0xee140000 0 0x100>;
 923                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
 924                         clocks = <&cpg CPG_MOD 312>;
 925                         dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
 926                                <&dmac1 0xc1>, <&dmac1 0xc2>;
 927                         dma-names = "tx", "rx", "tx", "rx";
 928                         max-frequency = <97500000>;
 929                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 930                         resets = <&cpg 312>;
 931                         status = "disabled";
 932                 };
 933
 934                 sdhi2: sd@ee160000 {
 935                         compatible = "renesas,sdhi-r8a7743";
 936                         reg = <0 0xee160000 0 0x100>;
 937                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
 938                         clocks = <&cpg CPG_MOD 311>;
 939                         dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
 940                                <&dmac1 0xd3>, <&dmac1 0xd4>;
 941                         dma-names = "tx", "rx", "tx", "rx";
 942                         max-frequency = <97500000>;
 943                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 944                         resets = <&cpg 311>;
 945                         status = "disabled";
 946                 };
 947
 948                 usbphy: usb-phy@e6590100 {
 949                         compatible = "renesas,usb-phy-r8a7743",
 950                                      "renesas,rcar-gen2-usb-phy";
 951                         reg = <0 0xe6590100 0 0x100>;
 952                         #address-cells = <1>;
 953                         #size-cells = <0>;
 954                         clocks = <&cpg CPG_MOD 704>;
 955                         clock-names = "usbhs";
 956                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 957                         resets = <&cpg 704>;
 958                         status = "disabled";
 959
 960                         usb0: usb-channel@0 {
 961                                 reg = <0>;
 962                                 #phy-cells = <1>;
 963                         };
 964                         usb2: usb-channel@2 {
 965                                 reg = <2>;
 966                                 #phy-cells = <1>;
 967                         };
 968                 };
 969
 970                 pci0: pci@ee090000 {
 971                         compatible = "renesas,pci-r8a7743",
 972                                      "renesas,pci-rcar-gen2";
 973                         device_type = "pci";
 974                         reg = <0 0xee090000 0 0xc00>,
 975                               <0 0xee080000 0 0x1100>;
 976                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
 977                         clocks = <&cpg CPG_MOD 703>;
 978                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 979                         resets = <&cpg 703>;
 980                         status = "disabled";
 981
 982                         bus-range = <0 0>;
 983                         #address-cells = <3>;
 984                         #size-cells = <2>;
 985                         #interrupt-cells = <1>;
 986                         ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
 987                         interrupt-map-mask = <0xff00 0 0 0x7>;
 988                         interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
 989                                          0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
 990                                          0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
 991
 992                         usb@1,0 {
 993                                 reg = <0x800 0 0 0 0>;
 994                                 phys = <&usb0 0>;
 995                                 phy-names = "usb";
 996                         };
 997
 998                         usb@2,0 {
 999                                 reg = <0x1000 0 0 0 0>;
1000                                 phys = <&usb0 0>;
1001                                 phy-names = "usb";
1002                         };
1003                 };
1004
1005                 pci1: pci@ee0d0000 {
1006                         compatible = "renesas,pci-r8a7743",
1007                                      "renesas,pci-rcar-gen2";
1008                         device_type = "pci";
1009                         reg = <0 0xee0d0000 0 0xc00>,
1010                               <0 0xee0c0000 0 0x1100>;
1011                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1012                         clocks = <&cpg CPG_MOD 703>;
1013                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1014                         resets = <&cpg 703>;
1015                         status = "disabled";
1016
1017                         bus-range = <1 1>;
1018                         #address-cells = <3>;
1019                         #size-cells = <2>;
1020                         #interrupt-cells = <1>;
1021                         ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1022                         interrupt-map-mask = <0xff00 0 0 0x7>;
1023                         interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1024                                          0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1025                                          0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1026
1027                         usb@1,0 {
1028                                 reg = <0x10800 0 0 0 0>;
1029                                 phys = <&usb2 0>;
1030                                 phy-names = "usb";
1031                         };
1032
1033                         usb@2,0 {
1034                                 reg = <0x11000 0 0 0 0>;
1035                                 phys = <&usb2 0>;
1036                                 phy-names = "usb";
1037                         };
1038                 };
1039         };
1040
1041         /* External root clock */
1042         extal_clk: extal {
1043                 compatible = "fixed-clock";
1044                 #clock-cells = <0>;
1045                 /* This value must be overridden by the board. */
1046                 clock-frequency = <0>;
1047         };
1048
1049         /* External USB clock - can be overridden by the board */
1050         usb_extal_clk: usb_extal {
1051                 compatible = "fixed-clock";
1052                 #clock-cells = <0>;
1053                 clock-frequency = <48000000>;
1054         };
1055
1056         /* External SCIF clock */
1057         scif_clk: scif {
1058                 compatible = "fixed-clock";
1059                 #clock-cells = <0>;
1060                 /* This value must be overridden by the board. */
1061                 clock-frequency = <0>;
1062         };
1063 };