2 * DTS file for CSR SiRFprimaII SoC
4 * Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
6 * Licensed under GPLv2 or later.
10 compatible = "sirf,prima2";
13 interrupt-parent = <&intc>;
20 compatible = "arm,cortex-a9";
23 d-cache-line-size = <32>;
24 i-cache-line-size = <32>;
25 d-cache-size = <32768>;
26 i-cache-size = <32768>;
28 timebase-frequency = <0>;
30 clock-frequency = <0>;
39 clock-latency = <150000>;
44 compatible = "arm,cortex-a9-pmu";
49 compatible = "simple-bus";
52 ranges = <0x40000000 0x40000000 0x80000000>;
54 l2-cache-controller@80040000 {
55 compatible = "arm,pl310-cache";
56 reg = <0x80040000 0x1000>;
58 arm,tag-latency = <1 1 1>;
59 arm,data-latency = <1 1 1>;
60 arm,filter-ranges = <0 0x40000000>;
63 intc: interrupt-controller@80020000 {
64 #interrupt-cells = <1>;
66 compatible = "sirf,prima2-intc";
67 reg = <0x80020000 0x1000>;
71 compatible = "simple-bus";
74 ranges = <0x88000000 0x88000000 0x40000>;
76 clks: clock-controller@88000000 {
77 compatible = "sirf,prima2-clkc";
78 reg = <0x88000000 0x1000>;
83 rstc: reset-controller@88010000 {
84 compatible = "sirf,prima2-rstc";
85 reg = <0x88010000 0x1000>;
89 rsc-controller@88020000 {
90 compatible = "sirf,prima2-rsc";
91 reg = <0x88020000 0x1000>;
95 compatible = "sirf,prima2-cphifbg";
96 reg = <0x88030000 0x1000>;
102 compatible = "simple-bus";
103 #address-cells = <1>;
105 ranges = <0x90000000 0x90000000 0x10000>;
107 memory-controller@90000000 {
108 compatible = "sirf,prima2-memc";
109 reg = <0x90000000 0x2000>;
115 compatible = "sirf,prima2-memcmon";
116 reg = <0x90002000 0x200>;
123 compatible = "simple-bus";
124 #address-cells = <1>;
126 ranges = <0x90010000 0x90010000 0x30000>;
129 compatible = "sirf,prima2-lcd";
130 reg = <0x90010000 0x20000>;
135 compatible = "sirf,prima2-vpp";
136 reg = <0x90020000 0x10000>;
144 compatible = "simple-bus";
145 #address-cells = <1>;
147 ranges = <0x98000000 0x98000000 0x8000000>;
150 compatible = "powervr,sgx531";
151 reg = <0x98000000 0x8000000>;
158 compatible = "simple-bus";
159 #address-cells = <1>;
161 ranges = <0xa0000000 0xa0000000 0x8000000>;
163 multimedia@a0000000 {
164 compatible = "sirf,prima2-video-codec";
165 reg = <0xa0000000 0x8000000>;
172 compatible = "simple-bus";
173 #address-cells = <1>;
175 ranges = <0xa8000000 0xa8000000 0x2000000>;
178 compatible = "sirf,prima2-dspif";
179 reg = <0xa8000000 0x10000>;
185 compatible = "sirf,prima2-gps";
186 reg = <0xa8010000 0x10000>;
193 compatible = "sirf,prima2-dsp";
194 reg = <0xa9000000 0x1000000>;
202 compatible = "simple-bus";
203 #address-cells = <1>;
205 ranges = <0xb0000000 0xb0000000 0x180000>,
206 <0x56000000 0x56000000 0x1b00000>;
209 compatible = "sirf,prima2-tick";
210 reg = <0xb0020000 0x1000>;
216 compatible = "sirf,prima2-nand";
217 reg = <0xb0030000 0x10000>;
223 compatible = "sirf,prima2-audio";
224 reg = <0xb0040000 0x10000>;
229 uart0: uart@b0050000 {
231 compatible = "sirf,prima2-uart";
232 reg = <0xb0050000 0x1000>;
236 dmas = <&dmac1 5>, <&dmac0 2>;
237 dma-names = "rx", "tx";
240 uart1: uart@b0060000 {
242 compatible = "sirf,prima2-uart";
243 reg = <0xb0060000 0x1000>;
249 uart2: uart@b0070000 {
251 compatible = "sirf,prima2-uart";
252 reg = <0xb0070000 0x1000>;
256 dmas = <&dmac0 6>, <&dmac0 7>;
257 dma-names = "rx", "tx";
262 compatible = "sirf,prima2-usp";
263 reg = <0xb0080000 0x10000>;
267 dmas = <&dmac1 1>, <&dmac1 2>;
268 dma-names = "rx", "tx";
273 compatible = "sirf,prima2-usp";
274 reg = <0xb0090000 0x10000>;
278 dmas = <&dmac0 14>, <&dmac0 15>;
279 dma-names = "rx", "tx";
284 compatible = "sirf,prima2-usp";
285 reg = <0xb00a0000 0x10000>;
289 dmas = <&dmac0 10>, <&dmac0 11>;
290 dma-names = "rx", "tx";
293 dmac0: dma-controller@b00b0000 {
295 compatible = "sirf,prima2-dmac";
296 reg = <0xb00b0000 0x10000>;
302 dmac1: dma-controller@b0160000 {
304 compatible = "sirf,prima2-dmac";
305 reg = <0xb0160000 0x10000>;
312 compatible = "sirf,prima2-vip";
313 reg = <0xb00C0000 0x10000>;
316 sirf,vip-dma-rx-channel = <16>;
321 compatible = "sirf,prima2-spi";
322 reg = <0xb00d0000 0x10000>;
324 sirf,spi-num-chipselects = <1>;
327 dma-names = "rx", "tx";
328 #address-cells = <1>;
336 compatible = "sirf,prima2-spi";
337 reg = <0xb0170000 0x10000>;
339 sirf,spi-num-chipselects = <1>;
342 dma-names = "rx", "tx";
343 #address-cells = <1>;
351 compatible = "sirf,prima2-i2c";
352 reg = <0xb00e0000 0x10000>;
355 #address-cells = <1>;
361 compatible = "sirf,prima2-i2c";
362 reg = <0xb00f0000 0x10000>;
365 #address-cells = <1>;
370 compatible = "sirf,prima2-tsc";
371 reg = <0xb0110000 0x10000>;
376 gpio: pinctrl@b0120000 {
378 #interrupt-cells = <2>;
379 compatible = "sirf,prima2-pinctrl";
380 reg = <0xb0120000 0x10000>;
381 interrupts = <43 44 45 46 47>;
383 interrupt-controller;
385 lcd_16pins_a: lcd0@0 {
387 sirf,pins = "lcd_16bitsgrp";
388 sirf,function = "lcd_16bits";
391 lcd_18pins_a: lcd0@1 {
393 sirf,pins = "lcd_18bitsgrp";
394 sirf,function = "lcd_18bits";
397 lcd_24pins_a: lcd0@2 {
399 sirf,pins = "lcd_24bitsgrp";
400 sirf,function = "lcd_24bits";
403 lcdrom_pins_a: lcdrom0@0 {
405 sirf,pins = "lcdromgrp";
406 sirf,function = "lcdrom";
409 uart0_pins_a: uart0@0 {
411 sirf,pins = "uart0grp";
412 sirf,function = "uart0";
415 uart0_noflow_pins_a: uart0@1 {
417 sirf,pins = "uart0_nostreamctrlgrp";
418 sirf,function = "uart0_nostreamctrl";
421 uart1_pins_a: uart1@0 {
423 sirf,pins = "uart1grp";
424 sirf,function = "uart1";
427 uart2_pins_a: uart2@0 {
429 sirf,pins = "uart2grp";
430 sirf,function = "uart2";
433 uart2_noflow_pins_a: uart2@1 {
435 sirf,pins = "uart2_nostreamctrlgrp";
436 sirf,function = "uart2_nostreamctrl";
439 spi0_pins_a: spi0@0 {
441 sirf,pins = "spi0grp";
442 sirf,function = "spi0";
445 spi1_pins_a: spi1@0 {
447 sirf,pins = "spi1grp";
448 sirf,function = "spi1";
451 i2c0_pins_a: i2c0@0 {
453 sirf,pins = "i2c0grp";
454 sirf,function = "i2c0";
457 i2c1_pins_a: i2c1@0 {
459 sirf,pins = "i2c1grp";
460 sirf,function = "i2c1";
463 pwm0_pins_a: pwm0@0 {
465 sirf,pins = "pwm0grp";
466 sirf,function = "pwm0";
469 pwm1_pins_a: pwm1@0 {
471 sirf,pins = "pwm1grp";
472 sirf,function = "pwm1";
475 pwm2_pins_a: pwm2@0 {
477 sirf,pins = "pwm2grp";
478 sirf,function = "pwm2";
481 pwm3_pins_a: pwm3@0 {
483 sirf,pins = "pwm3grp";
484 sirf,function = "pwm3";
489 sirf,pins = "gpsgrp";
490 sirf,function = "gps";
495 sirf,pins = "vipgrp";
496 sirf,function = "vip";
499 sdmmc0_pins_a: sdmmc0@0 {
501 sirf,pins = "sdmmc0grp";
502 sirf,function = "sdmmc0";
505 sdmmc1_pins_a: sdmmc1@0 {
507 sirf,pins = "sdmmc1grp";
508 sirf,function = "sdmmc1";
511 sdmmc2_pins_a: sdmmc2@0 {
513 sirf,pins = "sdmmc2grp";
514 sirf,function = "sdmmc2";
517 sdmmc3_pins_a: sdmmc3@0 {
519 sirf,pins = "sdmmc3grp";
520 sirf,function = "sdmmc3";
523 sdmmc4_pins_a: sdmmc4@0 {
525 sirf,pins = "sdmmc4grp";
526 sirf,function = "sdmmc4";
529 sdmmc5_pins_a: sdmmc5@0 {
531 sirf,pins = "sdmmc5grp";
532 sirf,function = "sdmmc5";
535 i2s_mclk_pins_a: i2s_mclk@0 {
537 sirf,pins = "i2smclkgrp";
538 sirf,function = "i2s_mclk";
541 i2s_ext_clk_input_pins_a: i2s_ext_clk_input@0 {
543 sirf,pins = "i2s_ext_clk_inputgrp";
544 sirf,function = "i2s_ext_clk_input";
549 sirf,pins = "i2sgrp";
550 sirf,function = "i2s";
553 i2s_no_din_pins_a: i2s_no_din@0 {
555 sirf,pins = "i2s_no_dingrp";
556 sirf,function = "i2s_no_din";
559 i2s_6chn_pins_a: i2s_6chn@0 {
561 sirf,pins = "i2s_6chngrp";
562 sirf,function = "i2s_6chn";
565 ac97_pins_a: ac97@0 {
567 sirf,pins = "ac97grp";
568 sirf,function = "ac97";
571 nand_pins_a: nand@0 {
573 sirf,pins = "nandgrp";
574 sirf,function = "nand";
577 usp0_pins_a: usp0@0 {
579 sirf,pins = "usp0grp";
580 sirf,function = "usp0";
583 usp0_uart_nostreamctrl_pins_a: usp0@1 {
586 "usp0_uart_nostreamctrl_grp";
588 "usp0_uart_nostreamctrl";
591 usp0_only_utfs_pins_a: usp0@2 {
593 sirf,pins = "usp0_only_utfs_grp";
594 sirf,function = "usp0_only_utfs";
597 usp0_only_urfs_pins_a: usp0@3 {
599 sirf,pins = "usp0_only_urfs_grp";
600 sirf,function = "usp0_only_urfs";
603 usp1_pins_a: usp1@0 {
605 sirf,pins = "usp1grp";
606 sirf,function = "usp1";
609 usp1_uart_nostreamctrl_pins_a: usp1@1 {
612 "usp1_uart_nostreamctrl_grp";
614 "usp1_uart_nostreamctrl";
617 usp2_pins_a: usp2@0 {
619 sirf,pins = "usp2grp";
620 sirf,function = "usp2";
623 usp2_uart_nostreamctrl_pins_a: usp2@1 {
626 "usp2_uart_nostreamctrl_grp";
628 "usp2_uart_nostreamctrl";
631 usb0_utmi_drvbus_pins_a: usb0_utmi_drvbus@0 {
633 sirf,pins = "usb0_utmi_drvbusgrp";
634 sirf,function = "usb0_utmi_drvbus";
637 usb1_utmi_drvbus_pins_a: usb1_utmi_drvbus@0 {
639 sirf,pins = "usb1_utmi_drvbusgrp";
640 sirf,function = "usb1_utmi_drvbus";
643 usb1_dp_dn_pins_a: usb1_dp_dn@0 {
645 sirf,pins = "usb1_dp_dngrp";
646 sirf,function = "usb1_dp_dn";
649 uart1_route_io_usb1_pins_a: uart1_route_io_usb1@0 {
650 uart1_route_io_usb1 {
651 sirf,pins = "uart1_route_io_usb1grp";
652 sirf,function = "uart1_route_io_usb1";
655 warm_rst_pins_a: warm_rst@0 {
657 sirf,pins = "warm_rstgrp";
658 sirf,function = "warm_rst";
661 pulse_count_pins_a: pulse_count@0 {
663 sirf,pins = "pulse_countgrp";
664 sirf,function = "pulse_count";
667 cko0_pins_a: cko0@0 {
669 sirf,pins = "cko0grp";
670 sirf,function = "cko0";
673 cko1_pins_a: cko1@0 {
675 sirf,pins = "cko1grp";
676 sirf,function = "cko1";
682 compatible = "sirf,prima2-pwm";
683 reg = <0xb0130000 0x10000>;
688 compatible = "sirf,prima2-efuse";
689 reg = <0xb0140000 0x10000>;
694 compatible = "sirf,prima2-pulsec";
695 reg = <0xb0150000 0x10000>;
701 compatible = "sirf,prima2-pciiobg", "simple-bus";
702 #address-cells = <1>;
704 ranges = <0x56000000 0x56000000 0x1b00000>;
706 sd0: sdhci@56000000 {
708 compatible = "sirf,prima2-sdhc";
709 reg = <0x56000000 0x100000>;
716 sd1: sdhci@56100000 {
718 compatible = "sirf,prima2-sdhc";
719 reg = <0x56100000 0x100000>;
726 sd2: sdhci@56200000 {
728 compatible = "sirf,prima2-sdhc";
729 reg = <0x56200000 0x100000>;
735 sd3: sdhci@56300000 {
737 compatible = "sirf,prima2-sdhc";
738 reg = <0x56300000 0x100000>;
744 sd4: sdhci@56400000 {
746 compatible = "sirf,prima2-sdhc";
747 reg = <0x56400000 0x100000>;
753 sd5: sdhci@56500000 {
755 compatible = "sirf,prima2-sdhc";
756 reg = <0x56500000 0x100000>;
762 compatible = "sirf,prima2-pcicp";
763 reg = <0x57900000 0x100000>;
767 rom-interface@57a00000 {
768 compatible = "sirf,prima2-romif";
769 reg = <0x57a00000 0x100000>;
775 compatible = "sirf,prima2-rtciobg", "sirf-prima2-rtciobg-bus", "simple-bus";
776 #address-cells = <1>;
778 reg = <0x80030000 0x10000>;
781 compatible = "sirf,prima2-gpsrtc";
782 reg = <0x1000 0x1000>;
783 interrupts = <55 56 57>;
787 compatible = "sirf,prima2-sysrtc";
788 reg = <0x2000 0x1000>;
789 interrupts = <52 53 54>;
793 compatible = "sirf,prima2-minigpsrtc";
794 reg = <0x2000 0x1000>;
799 compatible = "sirf,prima2-pwrc";
800 reg = <0x3000 0x1000>;
806 compatible = "simple-bus";
807 #address-cells = <1>;
809 ranges = <0xb8000000 0xb8000000 0x40000>;
812 compatible = "chipidea,ci13611a-prima2";
813 reg = <0xb8000000 0x10000>;
819 compatible = "chipidea,ci13611a-prima2";
820 reg = <0xb8010000 0x10000>;
826 compatible = "synopsys,dwc-ahsata";
827 reg = <0xb8020000 0x10000>;
832 compatible = "sirf,prima2-security";
833 reg = <0xb8030000 0x10000>;