arch/arm/boot/dts/logicpd-torpedo-som.dtsi

   1 /*
   2  * This program is free software; you can redistribute it and/or modify
   3  * it under the terms of the GNU General Public License version 2 as
   4  * published by the Free Software Foundation.
   5  */
   6
   7 #include <dt-bindings/input/input.h>
   8
   9 / {
  10         chosen {
  11                 stdout-path = &uart1;
  12         };
  13
  14         cpus {
  15                 cpu@0 {
  16                         cpu0-supply = <&vcc>;
  17                 };
  18         };
  19
  20         memory@80000000 {
  21                 device_type = "memory";
  22                 reg = <0x80000000 0>;
  23         };
  24
  25         leds {
  26                 compatible = "gpio-leds";
  27                 user0 {
  28                         label = "user0";
  29                         gpios = <&twl_gpio 18 GPIO_ACTIVE_LOW>; /* LEDA */
  30                         linux,default-trigger = "none";
  31                 };
  32         };
  33
  34         wl12xx_vmmc: wl12xx_vmmc {
  35                 compatible = "regulator-fixed";
  36                 regulator-name = "vwl1271";
  37                 regulator-min-microvolt = <1800000>;
  38                 regulator-max-microvolt = <1800000>;
  39                 gpio = <&gpio5 29 0>;   /* gpio157 */
  40                 startup-delay-us = <70000>;
  41                 enable-active-high;
  42                 vin-supply = <&vmmc2>;
  43         };
  44 };
  45
  46 &gpmc {
  47         ranges = <0 0 0x30000000 0x1000000>;    /* CS0: 16MB for NAND */
  48
  49         nand@0,0 {
  50                 compatible = "ti,omap2-nand";
  51                 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
  52                 interrupt-parent = <&gpmc>;
  53                 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
  54                              <1 IRQ_TYPE_NONE>; /* termcount */
  55                 linux,mtd-name = "micron,mt29f4g16abbda3w";
  56                 nand-bus-width = <16>;
  57                 ti,nand-ecc-opt = "bch8";
  58                 rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
  59                 gpmc,sync-clk-ps = <0>;
  60                 gpmc,cs-on-ns = <0>;
  61                 gpmc,cs-rd-off-ns = <44>;
  62                 gpmc,cs-wr-off-ns = <44>;
  63                 gpmc,adv-on-ns = <6>;
  64                 gpmc,adv-rd-off-ns = <34>;
  65                 gpmc,adv-wr-off-ns = <44>;
  66                 gpmc,we-off-ns = <40>;
  67                 gpmc,oe-off-ns = <54>;
  68                 gpmc,access-ns = <64>;
  69                 gpmc,rd-cycle-ns = <82>;
  70                 gpmc,wr-cycle-ns = <82>;
  71                 gpmc,wr-access-ns = <40>;
  72                 gpmc,wr-data-mux-bus-ns = <0>;
  73                 gpmc,device-width = <2>;
  74                 #address-cells = <1>;
  75                 #size-cells = <1>;
  76         };
  77 };
  78
  79 &i2c1 {
  80         clock-frequency = <2600000>;
  81
  82         twl: twl@48 {
  83                 reg = <0x48>;
  84                 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
  85                 interrupt-parent = <&intc>;
  86                 twl_audio: audio {
  87                         compatible = "ti,twl4030-audio";
  88                         codec {
  89                         };
  90                 };
  91         };
  92 };
  93
  94 &i2c2 {
  95         clock-frequency = <400000>;
  96 };
  97
  98 &i2c3 {
  99         clock-frequency = <400000>;
 100         at24@50 {
 101                 compatible = "atmel,24c64";
 102                 readonly;
 103                 reg = <0x50>;
 104         };
 105 };
 106
 107 /*
 108  * Only found on the wireless SOM. For the SOM without wireless, the pins for
 109  * MMC3 can be routed with jumpers to the second MMC slot on the devkit and
 110  * gpio157 is not connected. So this should be OK to keep common for now,
 111  * probably device tree overlays is the way to go with the various SOM and
 112  * jumpering combinations for the long run.
 113  */
 114 &mmc3 {
 115         interrupts-extended = <&intc 94 &omap3_pmx_core2 0x46>;
 116         pinctrl-0 = <&mmc3_pins &mmc3_core2_pins>;
 117         pinctrl-names = "default";
 118         vmmc-supply = <&wl12xx_vmmc>;
 119         non-removable;
 120         bus-width = <4>;
 121         cap-power-off-card;
 122         #address-cells = <1>;
 123         #size-cells = <0>;
 124         wlcore: wlcore@2 {
 125                 compatible = "ti,wl1283";
 126                 reg = <2>;
 127                 interrupt-parent = <&gpio5>;
 128                 interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; /* gpio 152 */
 129                 ref-clock-frequency = <26000000>;
 130                 tcxo-clock-frequency = <26000000>;
 131         };
 132 };
 133
 134 &omap3_pmx_core {
 135         mmc3_pins: pinmux_mm3_pins {
 136                 pinctrl-single,pins = <
 137                         OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat4.sdmmc3_dat0 */
 138                         OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat5.sdmmc3_dat1 */
 139                         OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat6.sdmmc3_dat2 */
 140                         OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat6.sdmmc3_dat3 */
 141                         OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT_PULLUP | MUX_MODE4) /* mcbsp4_clkx.gpio_152 */
 142                         OMAP3_CORE1_IOPAD(0x218e, PIN_OUTPUT | MUX_MODE4)       /* mcbsp1_fsr.gpio_157 */
 143                 >;
 144         };
 145         mcbsp2_pins: pinmux_mcbsp2_pins {
 146                 pinctrl-single,pins = <
 147                         OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0)        /* mcbsp2_fsx */
 148                         OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0)        /* mcbsp2_clkx */
 149                         OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0)        /* mcbsp2_dr */
 150                         OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0)       /* mcbsp2_dx */
 151                 >;
 152         };
 153         uart2_pins: pinmux_uart2_pins {
 154                 pinctrl-single,pins = <
 155                         OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT | MUX_MODE0)        /* uart2_cts.uart2_cts */
 156                         OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0)       /* uart2_rts .uart2_rts*/
 157                         OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0)       /* uart2_tx.uart2_tx */
 158                         OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0)        /* uart2_rx.uart2_rx */
 159                         OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4)       /* GPIO_162,BT_EN */
 160                 >;
 161         };
 162         mcspi1_pins: pinmux_mcspi1_pins {
 163                 pinctrl-single,pins = <
 164                         OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0)        /* mcspi1_clk.mcspi1_clk */
 165                         OMAP3_CORE1_IOPAD(0x21ca, PIN_OUTPUT | MUX_MODE0)       /* mcspi1_simo.mcspi1_simo */
 166                         OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi1_somi.mcspi1_somi */
 167                         OMAP3_CORE1_IOPAD(0x21ce, PIN_OUTPUT | MUX_MODE0)       /* mcspi1_cs0.mcspi1_cs0 */
 168                 >;
 169         };
 170         hsusb_otg_pins: pinmux_hsusb_otg_pins {
 171                 pinctrl-single,pins = <
 172                         OMAP3_CORE1_IOPAD(0x21a2, PIN_INPUT | MUX_MODE0)        /* hsusb0_clk.hsusb0_clk */
 173                         OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0)       /* hsusb0_stp.hsusb0_stp */
 174                         OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT | MUX_MODE0)        /* hsusb0_dir.hsusb0_dir */
 175                         OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT | MUX_MODE0)        /* hsusb0_nxt.hsusb0_nxt */
 176
 177                         OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT | MUX_MODE0)        /* hsusb0_data0.hsusb0_data0 */
 178                         OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT | MUX_MODE0)        /* hsusb0_data1.hsusb0_data1 */
 179                         OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT | MUX_MODE0)        /* hsusb0_data2.hsusb0_data2 */
 180                         OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT | MUX_MODE0)        /* hsusb0_data3.hsusb0_data3 */
 181                         OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT | MUX_MODE0)        /* hsusb0_data4.hsusb0_data4 */
 182                         OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT | MUX_MODE0)        /* hsusb0_data5.hsusb0_data5 */
 183                         OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT | MUX_MODE0)        /* hsusb0_data6.hsusb0_data6 */
 184                         OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT | MUX_MODE0)        /* hsusb0_data7.hsusb0_data7 */
 185                 >;
 186         };
 187 };
 188
 189 &uart2 {
 190         interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>;
 191         pinctrl-names = "default";
 192         pinctrl-0 = <&uart2_pins>;
 193 };
 194
 195 &mcspi1 {
 196         pinctrl-names = "default";
 197         pinctrl-0 = <&mcspi1_pins>;
 198 };
 199
 200 &omap3_pmx_core2 {
 201         mmc3_core2_pins: pinmux_mmc3_core2_pins {
 202                 pinctrl-single,pins = <
 203                         OMAP3630_CORE2_IOPAD(0x25d8, PIN_INPUT_PULLUP | MUX_MODE2)   /* etk_clk.sdmmc3_clk */
 204                         OMAP3630_CORE2_IOPAD(0x25da, PIN_INPUT_PULLUP | MUX_MODE2)   /* etk_ctl.sdmmc3_cmd */
 205                 >;
 206         };
 207 };
 208
 209 #include "twl4030.dtsi"
 210 #include "twl4030_omap3.dtsi"
 211
 212 &twl {
 213         twl_power: power {
 214                 compatible = "ti,twl4030-power-idle-osc-off", "ti,twl4030-power-idle";
 215                 ti,use_poweroff;
 216         };
 217 };
 218
 219 &twl_gpio {
 220         ti,use-leds;
 221 };