arch/arm/boot/dts/imx6sx-sabreauto.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 //
   3 // Copyright (C) 2014 Freescale Semiconductor, Inc.
   4
   5 /dts-v1/;
   6
   7 #include "imx6sx.dtsi"
   8
   9 / {
  10         model = "Freescale i.MX6 SoloX Sabre Auto Board";
  11         compatible = "fsl,imx6sx-sabreauto", "fsl,imx6sx";
  12
  13         memory@80000000 {
  14                 device_type = "memory";
  15                 reg = <0x80000000 0x80000000>;
  16         };
  17
  18         leds {
  19                 compatible = "gpio-leds";
  20                 pinctrl-names = "default";
  21                 pinctrl-0 = <&pinctrl_led>;
  22
  23                 user {
  24                         label = "debug";
  25                         gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
  26                         linux,default-trigger = "heartbeat";
  27                 };
  28         };
  29
  30         vcc_sd3: regulator-vcc-sd3 {
  31                 compatible = "regulator-fixed";
  32                 pinctrl-names = "default";
  33                 pinctrl-0 = <&pinctrl_vcc_sd3>;
  34                 regulator-name = "VCC_SD3";
  35                 regulator-min-microvolt = <3000000>;
  36                 regulator-max-microvolt = <3000000>;
  37                 gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>;
  38                 enable-active-high;
  39         };
  40
  41         reg_can_wake: regulator-can-wake {
  42                 compatible = "regulator-fixed";
  43                 regulator-name = "can-wake";
  44                 regulator-min-microvolt = <3300000>;
  45                 regulator-max-microvolt = <3300000>;
  46                 gpio = <&max7310_b 7 GPIO_ACTIVE_HIGH>;
  47                 enable-active-high;
  48         };
  49
  50         reg_can_en: regulator-can-en {
  51                 compatible = "regulator-fixed";
  52                 regulator-name = "can-en";
  53                 regulator-min-microvolt = <3300000>;
  54                 regulator-max-microvolt = <3300000>;
  55                 gpio = <&max7310_b 5 GPIO_ACTIVE_HIGH>;
  56                 enable-active-high;
  57                 vin-supply = <&reg_can_wake>;
  58         };
  59
  60         reg_can_stby: regulator-can-stby {
  61                 compatible = "regulator-fixed";
  62                 regulator-name = "can-stby";
  63                 regulator-min-microvolt = <3300000>;
  64                 regulator-max-microvolt = <3300000>;
  65                 gpio = <&max7310_b 4 GPIO_ACTIVE_HIGH>;
  66                 enable-active-high;
  67                 vin-supply = <&reg_can_en>;
  68         };
  69 };
  70
  71 &anaclk2 {
  72         clock-frequency = <24576000>;
  73 };
  74
  75 &fec1 {
  76         pinctrl-names = "default";
  77         pinctrl-0 = <&pinctrl_enet1>;
  78         phy-mode = "rgmii";
  79         phy-handle = <&ethphy1>;
  80         fsl,magic-packet;
  81         status = "okay";
  82
  83         mdio {
  84                 #address-cells = <1>;
  85                 #size-cells = <0>;
  86
  87                 ethphy0: ethernet-phy@0 {
  88                         compatible = "ethernet-phy-ieee802.3-c22";
  89                         reg = <0>;
  90                 };
  91
  92                 ethphy1: ethernet-phy@1 {
  93                         compatible = "ethernet-phy-ieee802.3-c22";
  94                         reg = <1>;
  95                 };
  96         };
  97 };
  98
  99 &fec2 {
 100         pinctrl-names = "default";
 101         pinctrl-0 = <&pinctrl_enet2>;
 102         phy-mode = "rgmii";
 103         phy-handle = <&ethphy0>;
 104         fsl,magic-packet;
 105         status = "okay";
 106 };
 107
 108 &flexcan1 {
 109         pinctrl-names = "default";
 110         pinctrl-0 = <&pinctrl_flexcan1>;
 111         xceiver-supply = <&reg_can_stby>;
 112         status = "okay";
 113 };
 114
 115 &flexcan2 {
 116         pinctrl-names = "default";
 117         pinctrl-0 = <&pinctrl_flexcan2>;
 118         xceiver-supply = <&reg_can_stby>;
 119         status = "okay";
 120 };
 121
 122 &uart1 {
 123         pinctrl-names = "default";
 124         pinctrl-0 = <&pinctrl_uart1>;
 125         status = "okay";
 126 };
 127
 128 &usdhc3 {
 129         pinctrl-names = "default", "state_100mhz", "state_200mhz";
 130         pinctrl-0 = <&pinctrl_usdhc3>;
 131         pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
 132         pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
 133         bus-width = <8>;
 134         cd-gpios = <&gpio7 10 GPIO_ACTIVE_LOW>;
 135         wp-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
 136         keep-power-in-suspend;
 137         wakeup-source;
 138         vmmc-supply = <&vcc_sd3>;
 139         status = "okay";
 140 };
 141
 142 &usdhc4 {
 143         pinctrl-names = "default";
 144         pinctrl-0 = <&pinctrl_usdhc4>;
 145         bus-width = <8>;
 146         cd-gpios = <&gpio7 11 GPIO_ACTIVE_LOW>;
 147         no-1-8-v;
 148         keep-power-in-suspend;
 149         wakeup-source;
 150         status = "okay";
 151 };
 152
 153 &iomuxc {
 154         pinctrl_egalax_int: egalax-intgrp {
 155                 fsl,pins = <
 156                         MX6SX_PAD_SD4_RESET_B__GPIO6_IO_22      0x10b0
 157                 >;
 158         };
 159
 160         pinctrl_enet1: enet1grp {
 161                 fsl,pins = <
 162                         MX6SX_PAD_ENET1_MDIO__ENET1_MDIO        0xa0b1
 163                         MX6SX_PAD_ENET1_MDC__ENET1_MDC          0xa0b1
 164                         MX6SX_PAD_RGMII1_TXC__ENET1_RGMII_TXC   0xa0b9
 165                         MX6SX_PAD_RGMII1_TD0__ENET1_TX_DATA_0   0xa0b1
 166                         MX6SX_PAD_RGMII1_TD1__ENET1_TX_DATA_1   0xa0b1
 167                         MX6SX_PAD_RGMII1_TD2__ENET1_TX_DATA_2   0xa0b1
 168                         MX6SX_PAD_RGMII1_TD3__ENET1_TX_DATA_3   0xa0b1
 169                         MX6SX_PAD_RGMII1_TX_CTL__ENET1_TX_EN    0xa0b1
 170                         MX6SX_PAD_RGMII1_RXC__ENET1_RX_CLK      0x3081
 171                         MX6SX_PAD_RGMII1_RD0__ENET1_RX_DATA_0   0x3081
 172                         MX6SX_PAD_RGMII1_RD1__ENET1_RX_DATA_1   0x3081
 173                         MX6SX_PAD_RGMII1_RD2__ENET1_RX_DATA_2   0x3081
 174                         MX6SX_PAD_RGMII1_RD3__ENET1_RX_DATA_3   0x3081
 175                         MX6SX_PAD_RGMII1_RX_CTL__ENET1_RX_EN    0x3081
 176                 >;
 177         };
 178
 179         pinctrl_enet2: enet2grp {
 180                 fsl,pins = <
 181                         MX6SX_PAD_RGMII2_TXC__ENET2_RGMII_TXC   0xa0b9
 182                         MX6SX_PAD_RGMII2_TD0__ENET2_TX_DATA_0   0xa0b1
 183                         MX6SX_PAD_RGMII2_TD1__ENET2_TX_DATA_1   0xa0b1
 184                         MX6SX_PAD_RGMII2_TD2__ENET2_TX_DATA_2   0xa0b1
 185                         MX6SX_PAD_RGMII2_TD3__ENET2_TX_DATA_3   0xa0b1
 186                         MX6SX_PAD_RGMII2_TX_CTL__ENET2_TX_EN    0xa0b1
 187                         MX6SX_PAD_RGMII2_RXC__ENET2_RX_CLK      0x3081
 188                         MX6SX_PAD_RGMII2_RD0__ENET2_RX_DATA_0   0x3081
 189                         MX6SX_PAD_RGMII2_RD1__ENET2_RX_DATA_1   0x3081
 190                         MX6SX_PAD_RGMII2_RD2__ENET2_RX_DATA_2   0x3081
 191                         MX6SX_PAD_RGMII2_RD3__ENET2_RX_DATA_3   0x3081
 192                         MX6SX_PAD_RGMII2_RX_CTL__ENET2_RX_EN    0x3081
 193                 >;
 194         };
 195
 196         pinctrl_flexcan1: flexcan1grp {
 197                 fsl,pins = <
 198                         MX6SX_PAD_QSPI1B_DQS__CAN1_TX   0x1b020
 199                         MX6SX_PAD_QSPI1A_SS1_B__CAN1_RX 0x1b020
 200                 >;
 201         };
 202
 203         pinctrl_flexcan2: flexcan2grp {
 204                 fsl,pins = <
 205                         MX6SX_PAD_QSPI1B_SS1_B__CAN2_RX 0x1b020
 206                         MX6SX_PAD_QSPI1A_DQS__CAN2_TX   0x1b020
 207                 >;
 208         };
 209
 210         pinctrl_i2c2: i2c2grp {
 211                 fsl,pins = <
 212                         MX6SX_PAD_GPIO1_IO03__I2C2_SDA          0x4001b8b1
 213                         MX6SX_PAD_GPIO1_IO02__I2C2_SCL          0x4001b8b1
 214                 >;
 215         };
 216
 217         pinctrl_i2c3: i2c3grp {
 218                 fsl,pins = <
 219                         MX6SX_PAD_KEY_ROW4__I2C3_SDA            0x4001b8b1
 220                         MX6SX_PAD_KEY_COL4__I2C3_SCL            0x4001b8b1
 221                 >;
 222         };
 223
 224         pinctrl_led: ledgrp {
 225                 fsl,pins = <
 226                         MX6SX_PAD_CSI_PIXCLK__GPIO1_IO_24 0x17059
 227                 >;
 228         };
 229
 230         pinctrl_uart1: uart1grp {
 231                 fsl,pins = <
 232                         MX6SX_PAD_GPIO1_IO04__UART1_TX          0x1b0b1
 233                         MX6SX_PAD_GPIO1_IO05__UART1_RX          0x1b0b1
 234                 >;
 235         };
 236
 237         pinctrl_usdhc3: usdhc3grp {
 238                 fsl,pins = <
 239                         MX6SX_PAD_SD3_CMD__USDHC3_CMD           0x17059
 240                         MX6SX_PAD_SD3_CLK__USDHC3_CLK           0x10059
 241                         MX6SX_PAD_SD3_DATA0__USDHC3_DATA0       0x17059
 242                         MX6SX_PAD_SD3_DATA1__USDHC3_DATA1       0x17059
 243                         MX6SX_PAD_SD3_DATA2__USDHC3_DATA2       0x17059
 244                         MX6SX_PAD_SD3_DATA3__USDHC3_DATA3       0x17059
 245                         MX6SX_PAD_SD3_DATA4__USDHC3_DATA4       0x17059
 246                         MX6SX_PAD_SD3_DATA5__USDHC3_DATA5       0x17059
 247                         MX6SX_PAD_SD3_DATA6__USDHC3_DATA6       0x17059
 248                         MX6SX_PAD_SD3_DATA7__USDHC3_DATA7       0x17059
 249                         MX6SX_PAD_KEY_COL0__GPIO2_IO_10         0x17059 /* CD */
 250                         MX6SX_PAD_KEY_ROW0__GPIO2_IO_15         0x17059 /* WP */
 251                 >;
 252         };
 253
 254         pinctrl_usdhc3_100mhz: usdhc3grp-100mhz {
 255                 fsl,pins = <
 256                         MX6SX_PAD_SD3_CMD__USDHC3_CMD           0x170b9
 257                         MX6SX_PAD_SD3_CLK__USDHC3_CLK           0x100b9
 258                         MX6SX_PAD_SD3_DATA0__USDHC3_DATA0       0x170b9
 259                         MX6SX_PAD_SD3_DATA1__USDHC3_DATA1       0x170b9
 260                         MX6SX_PAD_SD3_DATA2__USDHC3_DATA2       0x170b9
 261                         MX6SX_PAD_SD3_DATA3__USDHC3_DATA3       0x170b9
 262                         MX6SX_PAD_SD3_DATA4__USDHC3_DATA4       0x170b9
 263                         MX6SX_PAD_SD3_DATA5__USDHC3_DATA5       0x170b9
 264                         MX6SX_PAD_SD3_DATA6__USDHC3_DATA6       0x170b9
 265                         MX6SX_PAD_SD3_DATA7__USDHC3_DATA7       0x170b9
 266                 >;
 267         };
 268
 269         pinctrl_usdhc3_200mhz: usdhc3grp-200mhz {
 270                 fsl,pins = <
 271                         MX6SX_PAD_SD3_CMD__USDHC3_CMD           0x170f9
 272                         MX6SX_PAD_SD3_CLK__USDHC3_CLK           0x100f9
 273                         MX6SX_PAD_SD3_DATA0__USDHC3_DATA0       0x170f9
 274                         MX6SX_PAD_SD3_DATA1__USDHC3_DATA1       0x170f9
 275                         MX6SX_PAD_SD3_DATA2__USDHC3_DATA2       0x170f9
 276                         MX6SX_PAD_SD3_DATA3__USDHC3_DATA3       0x170f9
 277                         MX6SX_PAD_SD3_DATA4__USDHC3_DATA4       0x170f9
 278                         MX6SX_PAD_SD3_DATA5__USDHC3_DATA5       0x170f9
 279                         MX6SX_PAD_SD3_DATA6__USDHC3_DATA6       0x170f9
 280                         MX6SX_PAD_SD3_DATA7__USDHC3_DATA7       0x170f9
 281                 >;
 282         };
 283
 284         pinctrl_usdhc4: usdhc4grp {
 285                 fsl,pins = <
 286                         MX6SX_PAD_SD4_CMD__USDHC4_CMD           0x17059
 287                         MX6SX_PAD_SD4_CLK__USDHC4_CLK           0x10059
 288                         MX6SX_PAD_SD4_DATA0__USDHC4_DATA0       0x17059
 289                         MX6SX_PAD_SD4_DATA1__USDHC4_DATA1       0x17059
 290                         MX6SX_PAD_SD4_DATA2__USDHC4_DATA2       0x17059
 291                         MX6SX_PAD_SD4_DATA3__USDHC4_DATA3       0x17059
 292                         MX6SX_PAD_SD4_DATA7__GPIO6_IO_21        0x17059 /* CD */
 293                         MX6SX_PAD_SD4_DATA6__GPIO6_IO_20        0x17059 /* WP */
 294                 >;
 295         };
 296
 297         pinctrl_vcc_sd3: vccsd3grp {
 298                 fsl,pins = <
 299                         MX6SX_PAD_KEY_COL1__GPIO2_IO_11         0x17059
 300                 >;
 301         };
 302
 303         pinctrl_wdog: wdoggrp {
 304                 fsl,pins = <
 305                         MX6SX_PAD_GPIO1_IO13__WDOG1_WDOG_ANY    0x30b0
 306                 >;
 307         };
 308 };
 309
 310 &i2c2 {
 311         clock-frequency = <100000>;
 312         pinctrl-names = "default";
 313         pinctrl-0 = <&pinctrl_i2c2>;
 314         status = "okay";
 315
 316         touchscreen@4 {
 317                 compatible = "eeti,egalax_ts";
 318                 reg = <0x04>;
 319                 pinctrl-names = "default";
 320                 pinctrl-0 = <&pinctrl_egalax_int>;
 321                 interrupt-parent = <&gpio6>;
 322                 interrupts = <22 IRQ_TYPE_EDGE_FALLING>;
 323                 wakeup-gpios = <&gpio6 22 GPIO_ACTIVE_HIGH>;
 324         };
 325
 326         pfuze100: pmic@8 {
 327                 compatible = "fsl,pfuze100";
 328                 reg = <0x08>;
 329
 330                 regulators {
 331                         sw1a_reg: sw1ab {
 332                                 regulator-min-microvolt = <300000>;
 333                                 regulator-max-microvolt = <1875000>;
 334                                 regulator-boot-on;
 335                                 regulator-always-on;
 336                                 regulator-ramp-delay = <6250>;
 337                         };
 338
 339                         sw1c_reg: sw1c {
 340                                 regulator-min-microvolt = <300000>;
 341                                 regulator-max-microvolt = <1875000>;
 342                                 regulator-boot-on;
 343                                 regulator-always-on;
 344                                 regulator-ramp-delay = <6250>;
 345                         };
 346
 347                         sw2_reg: sw2 {
 348                                 regulator-min-microvolt = <800000>;
 349                                 regulator-max-microvolt = <3300000>;
 350                                 regulator-boot-on;
 351                                 regulator-always-on;
 352                         };
 353
 354                         sw3a_reg: sw3a {
 355                                 regulator-min-microvolt = <400000>;
 356                                 regulator-max-microvolt = <1975000>;
 357                                 regulator-boot-on;
 358                                 regulator-always-on;
 359                         };
 360
 361                         sw3b_reg: sw3b {
 362                                 regulator-min-microvolt = <400000>;
 363                                 regulator-max-microvolt = <1975000>;
 364                                 regulator-boot-on;
 365                                 regulator-always-on;
 366                         };
 367
 368                         sw4_reg: sw4 {
 369                                 regulator-min-microvolt = <800000>;
 370                                 regulator-max-microvolt = <3300000>;
 371                                 regulator-always-on;
 372                         };
 373
 374                         swbst_reg: swbst {
 375                                 regulator-min-microvolt = <5000000>;
 376                                 regulator-max-microvolt = <5150000>;
 377                         };
 378
 379                         snvs_reg: vsnvs {
 380                                 regulator-min-microvolt = <1000000>;
 381                                 regulator-max-microvolt = <3000000>;
 382                                 regulator-boot-on;
 383                                 regulator-always-on;
 384                         };
 385
 386                         vref_reg: vrefddr {
 387                                 regulator-boot-on;
 388                                 regulator-always-on;
 389                         };
 390
 391                         vgen1_reg: vgen1 {
 392                                 regulator-min-microvolt = <800000>;
 393                                 regulator-max-microvolt = <1550000>;
 394                                 regulator-always-on;
 395                         };
 396
 397                         vgen2_reg: vgen2 {
 398                                 regulator-min-microvolt = <800000>;
 399                                 regulator-max-microvolt = <1550000>;
 400                         };
 401
 402                         vgen3_reg: vgen3 {
 403                                 regulator-min-microvolt = <1800000>;
 404                                 regulator-max-microvolt = <3300000>;
 405                                 regulator-always-on;
 406                         };
 407
 408                         vgen4_reg: vgen4 {
 409                                 regulator-min-microvolt = <1800000>;
 410                                 regulator-max-microvolt = <3300000>;
 411                                 regulator-always-on;
 412                         };
 413
 414                         vgen5_reg: vgen5 {
 415                                 regulator-min-microvolt = <1800000>;
 416                                 regulator-max-microvolt = <3300000>;
 417                                 regulator-always-on;
 418                         };
 419
 420                         vgen6_reg: vgen6 {
 421                                 regulator-min-microvolt = <1800000>;
 422                                 regulator-max-microvolt = <3300000>;
 423                                 regulator-always-on;
 424                         };
 425                 };
 426         };
 427
 428         max7322: gpio@68 {
 429                 compatible = "maxim,max7322";
 430                 reg = <0x68>;
 431                 gpio-controller;
 432                 #gpio-cells = <2>;
 433         };
 434 };
 435
 436 &i2c3 {
 437         clock-frequency = <100000>;
 438         pinctrl-names = "default";
 439         pinctrl-0 = <&pinctrl_i2c3>;
 440         status = "okay";
 441
 442         max7310_a: gpio@30 {
 443                 compatible = "maxim,max7310";
 444                 reg = <0x30>;
 445                 gpio-controller;
 446                 #gpio-cells = <2>;
 447         };
 448
 449         max7310_b: gpio@32 {
 450                 compatible = "maxim,max7310";
 451                 reg = <0x32>;
 452                 gpio-controller;
 453                 #gpio-cells = <2>;
 454         };
 455 };
 456
 457 &wdog1 {
 458         pinctrl-names = "default";
 459         pinctrl-0 = <&pinctrl_wdog>;
 460         fsl,ext-reset-output;
 461 };