Merge tag 'socfpga_nand_fix_v4.17' of git://git.kernel.org/pub/scm/linux/kernel/git...
[sfrench/cifs-2.6.git] / arch / arm / boot / dts / imx6qdl-udoo.dtsi
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright 2013 Freescale Semiconductor, Inc.
4  *
5  * Author: Fabio Estevam <fabio.estevam@freescale.com>
6  */
7
8 / {
9         aliases {
10                 backlight = &backlight;
11                 panelchan = &panelchan;
12                 panel7 = &panel7;
13                 touchscreenp7 = &touchscreenp7;
14         };
15
16         chosen {
17                 stdout-path = &uart2;
18         };
19
20         backlight: backlight {
21                 compatible = "gpio-backlight";
22                 gpios = <&gpio1 4 0>;
23                 default-on;
24                 status = "disabled";
25         };
26
27         gpio-poweroff {
28                 compatible = "gpio-poweroff";
29                 gpios = <&gpio2 4 0>;
30                 pinctrl-0 = <&pinctrl_power_off>;
31                 pinctrl-names = "default";
32         };
33
34         memory@10000000 {
35                 reg = <0x10000000 0x40000000>;
36         };
37
38         panel7: panel7 {
39                 /*
40                  * in reality it is a -20t (parallel) model,
41                  * but with LVDS bridge chip attached,
42                  * so it is equivalent to -19t model in drive
43                  * characteristics
44                  */
45                 compatible = "urt,umsh-8596md-19t";
46                 pinctrl-names = "default";
47                 pinctrl-0 = <&pinctrl_panel>;
48                 power-supply = <&reg_panel>;
49                 backlight = <&backlight>;
50                 status = "disabled";
51
52                 port {
53                         panel_in: endpoint {
54                                 remote-endpoint = <&lvds0_out>;
55                         };
56                 };
57         };
58
59         regulators {
60                 compatible = "simple-bus";
61                 #address-cells = <1>;
62                 #size-cells = <0>;
63
64                 reg_usb_h1_vbus: regulator@0 {
65                         compatible = "regulator-fixed";
66                         reg = <0>;
67                         regulator-name = "usb_h1_vbus";
68                         regulator-min-microvolt = <5000000>;
69                         regulator-max-microvolt = <5000000>;
70                         enable-active-high;
71                         startup-delay-us = <2>; /* USB2415 requires a POR of 1 us minimum */
72                         gpio = <&gpio7 12 0>;
73                 };
74
75                 reg_panel: regulator@1 {
76                         compatible = "regulator-fixed";
77                         reg = <1>;
78                         regulator-name = "lcd_panel";
79                         enable-active-high;
80                         gpio = <&gpio1 2 0>;
81                 };
82         };
83
84         sound {
85                 compatible = "fsl,imx6q-udoo-ac97",
86                              "fsl,imx-audio-ac97";
87                 model = "fsl,imx6q-udoo-ac97";
88                 audio-cpu = <&ssi1>;
89                 audio-routing =
90                         "RX", "Mic Jack",
91                         "Headphone Jack", "TX";
92                 mux-int-port = <1>;
93                 mux-ext-port = <6>;
94         };
95 };
96
97 &fec {
98         pinctrl-names = "default";
99         pinctrl-0 = <&pinctrl_enet>;
100         phy-mode = "rgmii";
101         status = "okay";
102 };
103
104 &hdmi {
105         ddc-i2c-bus = <&i2c2>;
106         status = "okay";
107 };
108
109 &i2c2 {
110         clock-frequency = <100000>;
111         pinctrl-names = "default";
112         pinctrl-0 = <&pinctrl_i2c2>;
113         status = "okay";
114 };
115
116 &i2c3 {
117         clock-frequency = <100000>;
118         pinctrl-names = "default";
119         pinctrl-0 = <&pinctrl_i2c3>;
120         status = "okay";
121
122         touchscreenp7: touchscreenp7@55 {
123                 compatible = "sitronix,st1232";
124                 pinctrl-names = "default";
125                 pinctrl-0 = <&pinctrl_touchscreenp7>;
126                 reg = <0x55>;
127                 interrupt-parent = <&gpio1>;
128                 interrupts = <13 8>;
129                 gpios = <&gpio1 15 0>;
130                 status = "disabled";
131         };
132 };
133
134 &iomuxc {
135         imx6q-udoo {
136                 pinctrl_enet: enetgrp {
137                         fsl,pins = <
138                                 MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
139                                 MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
140                                 MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
141                                 MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
142                                 MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
143                                 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
144                                 MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
145                                 MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
146                                 MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
147                                 MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
148                                 MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
149                                 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
150                                 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
151                                 MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
152                                 MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
153                                 MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
154                         >;
155                 };
156
157                 pinctrl_i2c2: i2c2grp {
158                         fsl,pins = <
159                                 MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
160                                 MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
161                         >;
162                 };
163
164                 pinctrl_i2c3: i2c3grp {
165                         fsl,pins = <
166                                 MX6QDL_PAD_GPIO_5__I2C3_SCL             0x4001f8b1
167                                 MX6QDL_PAD_GPIO_6__I2C3_SDA             0x4001f8b1
168                         >;
169                 };
170
171                 pinctrl_panel: panelgrp {
172                         fsl,pins = <
173                                 MX6QDL_PAD_GPIO_2__GPIO1_IO02           0x70
174                                 MX6QDL_PAD_GPIO_4__GPIO1_IO04           0x70
175                         >;
176                 };
177
178                 pinctrl_power_off: poweroffgrp {
179                         fsl,pins = <
180                                 MX6QDL_PAD_NANDF_D4__GPIO2_IO04         0x30
181                         >;
182                 };
183
184                 pinctrl_touchscreenp7: touchscreenp7grp {
185                         fsl,pins = <
186                                 MX6QDL_PAD_SD2_DAT0__GPIO1_IO15         0x70
187                                 MX6QDL_PAD_SD2_DAT2__GPIO1_IO13         0x1b0b0
188                         >;
189                 };
190
191                 pinctrl_uart2: uart2grp {
192                         fsl,pins = <
193                                 MX6QDL_PAD_EIM_D26__UART2_TX_DATA       0x1b0b1
194                                 MX6QDL_PAD_EIM_D27__UART2_RX_DATA       0x1b0b1
195                         >;
196                 };
197
198                 pinctrl_usbh: usbhgrp {
199                         fsl,pins = <
200                                 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000
201                                 MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x130b0
202                         >;
203                 };
204
205                 pinctrl_usdhc3: usdhc3grp {
206                         fsl,pins = <
207                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
208                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
209                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
210                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
211                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
212                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
213                         >;
214                 };
215
216                 pinctrl_ac97_running: ac97running {
217                         fsl,pins = <
218                                 MX6QDL_PAD_DI0_PIN2__AUD6_TXD           0x1b0b0
219                                 MX6QDL_PAD_DI0_PIN3__AUD6_TXFS          0x1b0b0
220                                 MX6QDL_PAD_DI0_PIN4__AUD6_RXD           0x13080
221                                 MX6QDL_PAD_DI0_PIN15__AUD6_TXC          0x13080
222                                 MX6QDL_PAD_EIM_EB2__GPIO2_IO30          0x1b0b0
223                         >;
224                 };
225
226                 pinctrl_ac97_warm_reset: ac97warmreset {
227                         fsl,pins = <
228                                 MX6QDL_PAD_DI0_PIN2__AUD6_TXD           0x1b0b0
229                                 MX6QDL_PAD_DI0_PIN3__GPIO4_IO19         0x1b0b0
230                                 MX6QDL_PAD_DI0_PIN4__AUD6_RXD           0x13080
231                                 MX6QDL_PAD_DI0_PIN15__AUD6_TXC          0x13080
232                                 MX6QDL_PAD_EIM_EB2__GPIO2_IO30          0x1b0b0
233                         >;
234                 };
235
236                 pinctrl_ac97_reset: ac97reset {
237                         fsl,pins = <
238                                 MX6QDL_PAD_DI0_PIN2__GPIO4_IO18         0x1b0b0
239                                 MX6QDL_PAD_DI0_PIN3__GPIO4_IO19         0x1b0b0
240                                 MX6QDL_PAD_DI0_PIN4__AUD6_RXD           0x13080
241                                 MX6QDL_PAD_DI0_PIN15__AUD6_TXC          0x13080
242                                 MX6QDL_PAD_EIM_EB2__GPIO2_IO30          0x1b0b0
243                         >;
244                 };
245         };
246 };
247
248 &ldb {
249         status = "okay";
250
251         panelchan: lvds-channel@0 {
252                 port@4 {
253                         reg = <4>;
254
255                         lvds0_out: endpoint {
256                                 remote-endpoint = <&panel_in>;
257                         };
258                 };
259         };
260 };
261
262 &uart2 {
263         pinctrl-names = "default";
264         pinctrl-0 = <&pinctrl_uart2>;
265         status = "okay";
266 };
267
268 &usbh1 {
269         pinctrl-names = "default";
270         pinctrl-0 = <&pinctrl_usbh>;
271         vbus-supply = <&reg_usb_h1_vbus>;
272         clocks = <&clks IMX6QDL_CLK_CKO>;
273         status = "okay";
274 };
275
276 &usdhc3 {
277         pinctrl-names = "default";
278         pinctrl-0 = <&pinctrl_usdhc3>;
279         non-removable;
280         status = "okay";
281 };
282
283 &audmux {
284         status = "okay";
285 };
286
287 &ssi1 {
288         cell-index = <0>;
289         fsl,mode = "ac97-slave";
290         pinctrl-names = "ac97-running", "ac97-reset", "ac97-warm-reset";
291         pinctrl-0 = <&pinctrl_ac97_running>;
292         pinctrl-1 = <&pinctrl_ac97_reset>;
293         pinctrl-2 = <&pinctrl_ac97_warm_reset>;
294         ac97-gpios = <&gpio4 19 0 &gpio4 18 0 &gpio2 30 0>;
295         status = "okay";
296 };