arch/arm/boot/dts/imx53-m53menlo.dts

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Copyright (C) 2019 Marek Vasut <marex@denx.de>
   4  */
   5
   6 /dts-v1/;
   7 #include "imx53-m53.dtsi"
   8
   9 / {
  10         model = "MENLO M53 EMBEDDED DEVICE";
  11         compatible = "menlo,m53menlo", "fsl,imx53";
  12
  13         gpio-keys {
  14                 compatible = "gpio-keys";
  15                 pinctrl-0 = <&pinctrl_power_button>;
  16                 pinctrl-names = "default";
  17
  18                 power-button {
  19                         label = "Power button";
  20                         gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
  21                         linux,code = <KEY_POWER>;
  22                 };
  23         };
  24
  25         gpio-poweroff {
  26                 compatible = "gpio-poweroff";
  27                 pinctrl-0 = <&pinctrl_power_out>;
  28                 pinctrl-names = "default";
  29                 gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
  30         };
  31
  32         leds {
  33                 compatible = "gpio-leds";
  34                 pinctrl-names = "default";
  35                 pinctrl-0 = <&pinctrl_led>;
  36
  37                 user1 {
  38                         label = "TestLed601";
  39                         gpios = <&gpio6 1 GPIO_ACTIVE_HIGH>;
  40                         linux,default-trigger = "mmc0";
  41                 };
  42
  43                 user2 {
  44                         label = "TestLed602";
  45                         gpios = <&gpio6 2 GPIO_ACTIVE_HIGH>;
  46                         linux,default-trigger = "heartbeat";
  47                 };
  48
  49                 eth {
  50                         label = "EthLedYe";
  51                         gpios = <&gpio2 11 GPIO_ACTIVE_LOW>;
  52                         linux,default-trigger = "netdev";
  53                 };
  54         };
  55
  56         panel {
  57                 compatible = "edt,etm070080dh6";
  58                 enable-gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>;
  59
  60                 port {
  61                         panel_in: endpoint {
  62                                 remote-endpoint = <&lvds0_out>;
  63                         };
  64                 };
  65         };
  66
  67         beeper {
  68                 compatible = "gpio-beeper";
  69                 pinctrl-0 = <&pinctrl_beeper>;
  70                 gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>;
  71         };
  72
  73         reg_usbh1_vbus: regulator-usbh1-vbus {
  74                 compatible = "regulator-fixed";
  75                 regulator-name = "vbus";
  76                 regulator-min-microvolt = <5000000>;
  77                 regulator-max-microvolt = <5000000>;
  78                 gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>;
  79                 enable-active-high;
  80         };
  81 };
  82
  83 &can1 {
  84         pinctrl-names = "default";
  85         pinctrl-0 = <&pinctrl_can1>;
  86         status = "okay";
  87 };
  88
  89 &can2 {
  90         pinctrl-names = "default";
  91         pinctrl-0 = <&pinctrl_can2>;
  92         status = "okay";
  93 };
  94
  95 &clks {
  96         assigned-clocks = <&clks IMX5_CLK_CKO1_SEL>,
  97                           <&clks IMX5_CLK_CKO1_PODF>,
  98                           <&clks IMX5_CLK_CKO1>;
  99         assigned-clock-parents = <&clks IMX5_CLK_AHB>;
 100         assigned-clock-rates = <133333334>, <33333334>, <33333334>;
 101 };
 102
 103 &ecspi2 {
 104         pinctrl-names = "default";
 105         pinctrl-0 = <&pinctrl_ecspi2>;
 106         cs-gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>, <&gpio2 27 GPIO_ACTIVE_HIGH>;
 107         status = "okay";
 108
 109         spidev@0 {
 110                 compatible = "menlo,m53cpld";
 111                 spi-max-frequency = <25000000>;
 112                 reg = <0>;
 113         };
 114
 115         spidev@1 {
 116                 compatible = "menlo,m53cpld";
 117                 spi-max-frequency = <25000000>;
 118                 reg = <1>;
 119         };
 120 };
 121
 122 &esdhc1 {
 123         pinctrl-names = "default";
 124         pinctrl-0 = <&pinctrl_esdhc1>;
 125         cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
 126         wp-gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
 127         status = "okay";
 128 };
 129
 130 &fec {
 131         pinctrl-names = "default";
 132         pinctrl-0 = <&pinctrl_fec>;
 133         phy-mode = "rmii";
 134         phy-reset-gpios = <&gpio7 7 GPIO_ACTIVE_LOW>;
 135         status = "okay";
 136 };
 137
 138 &gpio1 {
 139         gpio-line-names =
 140                 "", "", "", "",
 141                 "", "", "", "",
 142                 "", "", "", "",
 143                 "", "", "", "",
 144                 "", "", "", "",
 145                 "", "", "", "",
 146                 "", "", "", "",
 147                 "", "", "", "";
 148 };
 149
 150 &gpio2 {
 151         gpio-line-names =
 152                 "", "", "", "",
 153                 "", "", "", "",
 154                 "TestPin_SV2_3", "", "", "",
 155                 "", "", "", "",
 156                 "", "", "", "",
 157                 "", "", "", "",
 158                 "", "", "", "",
 159                 "", "", "", "";
 160 };
 161
 162 &gpio3 {
 163         gpio-line-names =
 164                 "", "", "", "",
 165                 "", "", "", "",
 166                 "", "", "", "",
 167                 "", "", "", "",
 168                 "", "", "", "",
 169                 "", "", "", "",
 170                 "CPLD_JTAG_TDI", "CPLD_JTAG_TMS", "", "",
 171                 "", "CPLD_JTAG_TDO", "", "";
 172 };
 173
 174 &gpio5 {
 175         gpio-line-names =
 176                 "", "", "", "",
 177                 "", "", "", "",
 178                 "", "", "", "",
 179                 "", "", "", "",
 180                 "", "", "CPLD_JTAG_TCK", "KBD_intK",
 181                 "CPLD_int", "CPLD_JTAG_internal", "CPLD_D[0]", "CPLD_D[1]",
 182                 "CPLD_D[2]", "CPLD_D[3]", "CPLD_D[4]", "CPLD_D[5]",
 183                 "CPLD_D[6]", "CPLD_D[7]", "DISP_reset", "KBD_intI";
 184 };
 185
 186 &gpio6 {
 187         gpio-line-names =
 188                 "", "", "", "",
 189                 "CPLD_reset", "", "", "",
 190                 "", "", "", "",
 191                 "", "", "", "",
 192                 "", "", "", "",
 193                 "", "", "", "",
 194                 "", "", "", "",
 195                 "", "", "", "";
 196 };
 197
 198 &gpio7 {
 199         gpio-line-names =
 200                 "", "", "", "",
 201                 "", "", "", "",
 202                 "", "", "", "",
 203                 "", "USB-OTG_OverCurrent", "", "",
 204                 "", "", "", "",
 205                 "", "", "", "",
 206                 "", "", "", "",
 207                 "", "", "", "";
 208 };
 209
 210 &i2c1 {
 211         pinctrl-names = "default";
 212         pinctrl-0 = <&pinctrl_i2c1>;
 213         status = "okay";
 214
 215         touchscreen@38 {
 216                 compatible = "edt,edt-ft5x06";
 217                 reg = <0x38>;
 218                 pinctrl-names = "default";
 219                 pinctrl-0 = <&pinctrl_edt_ft5x06>;
 220                 interrupt-parent = <&gpio6>;
 221                 interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
 222                 reset-gpios = <&gpio2 9 GPIO_ACTIVE_LOW>;
 223                 wake-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
 224         };
 225
 226         eeprom@50 {
 227                 compatible = "atmel,24c64";
 228                 reg = <0x50>;
 229                 pagesize = <32>;
 230         };
 231
 232         dac@60 {
 233                 compatible = "microchip,mcp4725";
 234                 reg = <0x60>;
 235         };
 236 };
 237
 238 &i2c2 {
 239         touchscreen@41 {
 240                 status = "disabled";
 241         };
 242 };
 243
 244 &i2c3 {
 245         pinctrl-names = "default";
 246         pinctrl-0 = <&pinctrl_i2c3>;
 247         status = "okay";
 248 };
 249
 250 &iomuxc {
 251         pinctrl-names = "default";
 252         pinctrl-0 = <&pinctrl_hog>;
 253
 254         imx53-m53evk {
 255                 hoggrp {
 256                         fsl,pins = <
 257                                 MX53_PAD_GPIO_19__CCM_CLKO              0x1e4
 258                                 MX53_PAD_CSI0_DATA_EN__GPIO5_20         0x1e4
 259                                 MX53_PAD_CSI0_DAT4__GPIO5_22            0x1e4
 260                                 MX53_PAD_CSI0_DAT5__GPIO5_23            0x1c4
 261                                 MX53_PAD_CSI0_DAT6__GPIO5_24            0x1e4
 262                                 MX53_PAD_CSI0_DAT7__GPIO5_25            0x1e4
 263                                 MX53_PAD_CSI0_DAT8__GPIO5_26            0x1e4
 264                                 MX53_PAD_CSI0_DAT9__GPIO5_27            0x1c4
 265                                 MX53_PAD_CSI0_DAT10__GPIO5_28           0x1e4
 266                                 MX53_PAD_CSI0_DAT11__GPIO5_29           0x1e4
 267                                 MX53_PAD_PATA_DATA11__GPIO2_11          0x1e4
 268                                 MX53_PAD_EIM_D24__GPIO3_24              0x1e4
 269                                 MX53_PAD_EIM_D25__GPIO3_25              0x1e4
 270                                 MX53_PAD_EIM_D29__GPIO3_29              0x1e4
 271                                 MX53_PAD_CSI0_PIXCLK__GPIO5_18          0x1e4
 272                                 MX53_PAD_CSI0_VSYNC__GPIO5_21           0x1e4
 273                                 MX53_PAD_CSI0_DAT18__GPIO6_4            0x1c4
 274                                 MX53_PAD_PATA_DATA8__GPIO2_8            0x1e4
 275                         >;
 276                 };
 277
 278                 pinctrl_led: ledgrp {
 279                         fsl,pins = <
 280                                 MX53_PAD_CSI0_DAT15__GPIO6_1            0x1c4
 281                                 MX53_PAD_CSI0_DAT16__GPIO6_2            0x1c4
 282                         >;
 283                 };
 284
 285                 pinctrl_beeper: beepergrp {
 286                         fsl,pins = <
 287                                 MX53_PAD_CSI0_DAT17__GPIO6_3            0x1c4
 288                         >;
 289                 };
 290
 291                 pinctrl_can1: can1grp {
 292                         fsl,pins = <
 293                                 MX53_PAD_GPIO_7__CAN1_TXCAN             0x1c4
 294                                 MX53_PAD_GPIO_8__CAN1_RXCAN             0x1c4
 295                         >;
 296                 };
 297
 298                 pinctrl_can2: can2grp {
 299                         fsl,pins = <
 300                                 MX53_PAD_KEY_COL4__CAN2_TXCAN           0x1e4
 301                                 MX53_PAD_KEY_ROW4__CAN2_RXCAN           0x1c4
 302                         >;
 303                 };
 304
 305                 pinctrl_display_gpio: display-gpiogrp {
 306                         fsl,pins = <
 307                                 MX53_PAD_CSI0_DAT12__GPIO5_30           0x1c4 /* Reset */
 308                                 MX53_PAD_CSI0_MCLK__GPIO5_19            0x1e4 /* Int-K */
 309                                 MX53_PAD_CSI0_DAT13__GPIO5_31           0x1c4 /* Int-I */
 310
 311                                 MX53_PAD_CSI0_DAT14__GPIO6_0            0x1c4 /* Power down */
 312                         >;
 313                 };
 314
 315                 pinctrl_edt_ft5x06: edt-ft5x06grp {
 316                         fsl,pins = <
 317                                 MX53_PAD_PATA_DATA9__GPIO2_9            0x1e4 /* Reset */
 318                                 MX53_PAD_CSI0_DAT19__GPIO6_5            0x1c4 /* Interrupt */
 319                                 MX53_PAD_PATA_DATA10__GPIO2_10          0x1e4 /* Wake */
 320                         >;
 321                 };
 322
 323                 pinctrl_ecspi2: ecspi2grp {
 324                         fsl,pins = <
 325                                 MX53_PAD_EIM_CS0__ECSPI2_SCLK           0xe4
 326                                 MX53_PAD_EIM_OE__ECSPI2_MISO            0xe4
 327                                 MX53_PAD_EIM_CS1__ECSPI2_MOSI           0xe4
 328                                 MX53_PAD_EIM_RW__GPIO2_26               0xe4
 329                                 MX53_PAD_EIM_LBA__GPIO2_27              0xe4
 330                         >;
 331                 };
 332
 333                 pinctrl_esdhc1: esdhc1grp {
 334                         fsl,pins = <
 335                                 MX53_PAD_SD1_DATA0__ESDHC1_DAT0         0x1e4
 336                                 MX53_PAD_SD1_DATA1__ESDHC1_DAT1         0x1e4
 337                                 MX53_PAD_SD1_DATA2__ESDHC1_DAT2         0x1e4
 338                                 MX53_PAD_SD1_DATA3__ESDHC1_DAT3         0x1e4
 339                                 MX53_PAD_SD1_CMD__ESDHC1_CMD            0x1e4
 340                                 MX53_PAD_SD1_CLK__ESDHC1_CLK            0x1e4
 341                                 MX53_PAD_GPIO_1__GPIO1_1                0x1c4
 342                                 MX53_PAD_GPIO_9__GPIO1_9                0x1e4
 343                         >;
 344                 };
 345
 346                 pinctrl_fec: fecgrp {
 347                         fsl,pins = <
 348                                 MX53_PAD_FEC_MDC__FEC_MDC               0x1e4
 349                                 MX53_PAD_FEC_MDIO__FEC_MDIO             0x1e4
 350                                 MX53_PAD_FEC_REF_CLK__FEC_TX_CLK        0x1e4
 351                                 MX53_PAD_FEC_RX_ER__FEC_RX_ER           0x1e4
 352                                 MX53_PAD_FEC_CRS_DV__FEC_RX_DV          0x1e4
 353                                 MX53_PAD_FEC_RXD1__FEC_RDATA_1          0x1e4
 354                                 MX53_PAD_FEC_RXD0__FEC_RDATA_0          0x1e4
 355                                 MX53_PAD_FEC_TX_EN__FEC_TX_EN           0x1c4
 356                                 MX53_PAD_FEC_TXD1__FEC_TDATA_1          0x1e4
 357                                 MX53_PAD_FEC_TXD0__FEC_TDATA_0          0x1e4
 358                                 MX53_PAD_PATA_DA_1__GPIO7_7             0x1e4
 359                                 MX53_PAD_EIM_EB3__GPIO2_31              0x1e4
 360                         >;
 361                 };
 362
 363                 pinctrl_i2c1: i2c1grp {
 364                         fsl,pins = <
 365                                 MX53_PAD_EIM_D21__I2C1_SCL              0x400001e4
 366                                 MX53_PAD_EIM_D28__I2C1_SDA              0x400001e4
 367                         >;
 368                 };
 369
 370                 pinctrl_i2c3: i2c3grp {
 371                         fsl,pins = <
 372                                 MX53_PAD_GPIO_6__I2C3_SDA               0x400001e4
 373                                 MX53_PAD_GPIO_5__I2C3_SCL               0x400001e4
 374                         >;
 375                 };
 376
 377                 pinctrl_lvds0: lvds0grp {
 378                         /* LVDS pins only have pin mux configuration */
 379                         fsl,pins = <
 380                                 MX53_PAD_LVDS0_CLK_P__LDB_LVDS0_CLK     0x80000000
 381                                 MX53_PAD_LVDS0_TX0_P__LDB_LVDS0_TX0     0x80000000
 382                                 MX53_PAD_LVDS0_TX1_P__LDB_LVDS0_TX1     0x80000000
 383                                 MX53_PAD_LVDS0_TX2_P__LDB_LVDS0_TX2     0x80000000
 384                                 MX53_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3     0x80000000
 385                         >;
 386                 };
 387
 388                 pinctrl_power_button: powerbutgrp {
 389                         fsl,pins = <
 390                                 MX53_PAD_SD2_DATA2__GPIO1_13            0x1e4
 391                         >;
 392                 };
 393
 394                 pinctrl_power_out: poweroutgrp {
 395                         fsl,pins = <
 396                                 MX53_PAD_SD2_DATA0__GPIO1_15            0x1e4
 397                         >;
 398                 };
 399
 400                 pinctrl_uart1: uart1grp {
 401                         fsl,pins = <
 402                                 MX53_PAD_PATA_DIOW__UART1_TXD_MUX       0x1e4
 403                                 MX53_PAD_PATA_DMACK__UART1_RXD_MUX      0x1e4
 404                                 MX53_PAD_PATA_IORDY__UART1_RTS          0x1e4
 405                                 MX53_PAD_PATA_RESET_B__UART1_CTS        0x1e4
 406                         >;
 407                 };
 408
 409                 pinctrl_uart2: uart2grp {
 410                         fsl,pins = <
 411                                 MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX  0x1e4
 412                                 MX53_PAD_PATA_DMARQ__UART2_TXD_MUX      0x1e4
 413                                 MX53_PAD_PATA_DIOR__UART2_RTS           0x1e4
 414                                 MX53_PAD_PATA_INTRQ__UART2_CTS          0x1e4
 415                         >;
 416                 };
 417
 418                 pinctrl_uart3: uart3grp {
 419                         fsl,pins = <
 420                                 MX53_PAD_PATA_CS_1__UART3_RXD_MUX       0x1e4
 421                                 MX53_PAD_PATA_CS_0__UART3_TXD_MUX       0x1e4
 422                                 MX53_PAD_PATA_DA_2__UART3_RTS           0x1e4
 423                         >;
 424                 };
 425
 426                 pinctrl_usb: usbgrp {
 427                         fsl,pins = <
 428                                 MX53_PAD_GPIO_2__GPIO1_2                0x1c4
 429                                 MX53_PAD_GPIO_3__USBOH3_USBH1_OC        0x1c4
 430                                 MX53_PAD_GPIO_4__GPIO1_4                0x1c4
 431                                 MX53_PAD_GPIO_18__GPIO7_13              0x1c4
 432                         >;
 433                 };
 434         };
 435 };
 436
 437 &ldb {
 438         pinctrl-names = "default";
 439         pinctrl-0 = <&pinctrl_lvds0>;
 440         status = "okay";
 441
 442         lvds0: lvds-channel@0 {
 443                 reg = <0>;
 444                 fsl,data-mapping = "spwg";
 445                 fsl,data-width = <18>;
 446                 status = "okay";
 447
 448                 port@2 {
 449                         reg = <2>;
 450
 451                         lvds0_out: endpoint {
 452                                 remote-endpoint = <&panel_in>;
 453                         };
 454                 };
 455         };
 456 };
 457
 458 &uart1 {
 459         pinctrl-names = "default";
 460         pinctrl-0 = <&pinctrl_uart1>;
 461         uart-has-rtscts;
 462         status = "okay";
 463 };
 464
 465 &uart2 {
 466         pinctrl-names = "default";
 467         pinctrl-0 = <&pinctrl_uart2>;
 468         uart-has-rtscts;
 469         status = "okay";
 470 };
 471
 472 &uart3 {
 473         pinctrl-names = "default";
 474         pinctrl-0 = <&pinctrl_uart3>;
 475         linux,rs485-enabled-at-boot-time;
 476         status = "okay";
 477 };
 478
 479 &usbh1 {
 480         pinctrl-names = "default";
 481         pinctrl-0 = <&pinctrl_usb>;
 482         vbus-supply = <&reg_usbh1_vbus>;
 483         phy_type = "utmi";
 484         dr_mode = "host";
 485         status = "okay";
 486 };
 487
 488 &usbotg {
 489         dr_mode = "peripheral";
 490         status = "okay";
 491 };