arch/arm/boot/dts/exynos5250.dtsi

   1 /*
   2  * SAMSUNG EXYNOS5250 SoC device tree source
   3  *
   4  * Copyright (c) 2012 Samsung Electronics Co., Ltd.
   5  *              http://www.samsung.com
   6  *
   7  * SAMSUNG EXYNOS5250 SoC device nodes are listed in this file.
   8  * EXYNOS5250 based board files can include this file and provide
   9  * values for board specfic bindings.
  10  *
  11  * Note: This file does not include device nodes for all the controllers in
  12  * EXYNOS5250 SoC. As device tree coverage for EXYNOS5250 increases,
  13  * additional nodes can be added to this file.
  14  *
  15  * This program is free software; you can redistribute it and/or modify
  16  * it under the terms of the GNU General Public License version 2 as
  17  * published by the Free Software Foundation.
  18 */
  19
  20 #include "exynos5.dtsi"
  21 #include "exynos5250-pinctrl.dtsi"
  22
  23 #include <dt-bindings/clk/exynos-audss-clk.h>
  24
  25 / {
  26         compatible = "samsung,exynos5250";
  27
  28         aliases {
  29                 spi0 = &spi_0;
  30                 spi1 = &spi_1;
  31                 spi2 = &spi_2;
  32                 gsc0 = &gsc_0;
  33                 gsc1 = &gsc_1;
  34                 gsc2 = &gsc_2;
  35                 gsc3 = &gsc_3;
  36                 mshc0 = &mmc_0;
  37                 mshc1 = &mmc_1;
  38                 mshc2 = &mmc_2;
  39                 mshc3 = &mmc_3;
  40                 i2c0 = &i2c_0;
  41                 i2c1 = &i2c_1;
  42                 i2c2 = &i2c_2;
  43                 i2c3 = &i2c_3;
  44                 i2c4 = &i2c_4;
  45                 i2c5 = &i2c_5;
  46                 i2c6 = &i2c_6;
  47                 i2c7 = &i2c_7;
  48                 i2c8 = &i2c_8;
  49                 pinctrl0 = &pinctrl_0;
  50                 pinctrl1 = &pinctrl_1;
  51                 pinctrl2 = &pinctrl_2;
  52                 pinctrl3 = &pinctrl_3;
  53         };
  54
  55         cpus {
  56                 #address-cells = <1>;
  57                 #size-cells = <0>;
  58
  59                 cpu@0 {
  60                         device_type = "cpu";
  61                         compatible = "arm,cortex-a15";
  62                         reg = <0>;
  63                         clock-frequency = <1700000000>;
  64                 };
  65                 cpu@1 {
  66                         device_type = "cpu";
  67                         compatible = "arm,cortex-a15";
  68                         reg = <1>;
  69                         clock-frequency = <1700000000>;
  70                 };
  71         };
  72
  73         pd_gsc: gsc-power-domain@10044000 {
  74                 compatible = "samsung,exynos4210-pd";
  75                 reg = <0x10044000 0x20>;
  76         };
  77
  78         pd_mfc: mfc-power-domain@10044040 {
  79                 compatible = "samsung,exynos4210-pd";
  80                 reg = <0x10044040 0x20>;
  81         };
  82
  83         clock: clock-controller@10010000 {
  84                 compatible = "samsung,exynos5250-clock";
  85                 reg = <0x10010000 0x30000>;
  86                 #clock-cells = <1>;
  87         };
  88
  89         clock_audss: audss-clock-controller@3810000 {
  90                 compatible = "samsung,exynos5250-audss-clock";
  91                 reg = <0x03810000 0x0C>;
  92                 #clock-cells = <1>;
  93                 clocks = <&clock 1>, <&clock 7>, <&clock 138>, <&clock 160>;
  94                 clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in";
  95         };
  96
  97         timer {
  98                 compatible = "arm,armv7-timer";
  99                 interrupts = <1 13 0xf08>,
 100                              <1 14 0xf08>,
 101                              <1 11 0xf08>,
 102                              <1 10 0xf08>;
 103                 /* Unfortunately we need this since some versions of U-Boot
 104                  * on Exynos don't set the CNTFRQ register, so we need the
 105                  * value from DT.
 106                  */
 107                 clock-frequency = <24000000>;
 108         };
 109
 110         mct@101C0000 {
 111                 compatible = "samsung,exynos4210-mct";
 112                 reg = <0x101C0000 0x800>;
 113                 interrupt-controller;
 114                 #interrups-cells = <2>;
 115                 interrupt-parent = <&mct_map>;
 116                 interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
 117                              <4 0>, <5 0>;
 118                 clocks = <&clock 1>, <&clock 335>;
 119                 clock-names = "fin_pll", "mct";
 120
 121                 mct_map: mct-map {
 122                         #interrupt-cells = <2>;
 123                         #address-cells = <0>;
 124                         #size-cells = <0>;
 125                         interrupt-map = <0x0 0 &combiner 23 3>,
 126                                         <0x1 0 &combiner 23 4>,
 127                                         <0x2 0 &combiner 25 2>,
 128                                         <0x3 0 &combiner 25 3>,
 129                                         <0x4 0 &gic 0 120 0>,
 130                                         <0x5 0 &gic 0 121 0>;
 131                 };
 132         };
 133
 134         pmu {
 135                 compatible = "arm,cortex-a15-pmu";
 136                 interrupt-parent = <&combiner>;
 137                 interrupts = <1 2>, <22 4>;
 138         };
 139
 140         pinctrl_0: pinctrl@11400000 {
 141                 compatible = "samsung,exynos5250-pinctrl";
 142                 reg = <0x11400000 0x1000>;
 143                 interrupts = <0 46 0>;
 144
 145                 wakup_eint: wakeup-interrupt-controller {
 146                         compatible = "samsung,exynos4210-wakeup-eint";
 147                         interrupt-parent = <&gic>;
 148                         interrupts = <0 32 0>;
 149                 };
 150         };
 151
 152         pinctrl_1: pinctrl@13400000 {
 153                 compatible = "samsung,exynos5250-pinctrl";
 154                 reg = <0x13400000 0x1000>;
 155                 interrupts = <0 45 0>;
 156         };
 157
 158         pinctrl_2: pinctrl@10d10000 {
 159                 compatible = "samsung,exynos5250-pinctrl";
 160                 reg = <0x10d10000 0x1000>;
 161                 interrupts = <0 50 0>;
 162         };
 163
 164         pinctrl_3: pinctrl@03860000 {
 165                 compatible = "samsung,exynos5250-pinctrl";
 166                 reg = <0x03860000 0x1000>;
 167                 interrupts = <0 47 0>;
 168         };
 169
 170         watchdog {
 171                 clocks = <&clock 336>;
 172                 clock-names = "watchdog";
 173         };
 174
 175         g2d@10850000 {
 176                 compatible = "samsung,exynos5250-g2d";
 177                 reg = <0x10850000 0x1000>;
 178                 interrupts = <0 91 0>;
 179                 clocks = <&clock 345>;
 180                 clock-names = "fimg2d";
 181         };
 182
 183         codec@11000000 {
 184                 compatible = "samsung,mfc-v6";
 185                 reg = <0x11000000 0x10000>;
 186                 interrupts = <0 96 0>;
 187                 samsung,power-domain = <&pd_mfc>;
 188                 clocks = <&clock 266>;
 189                 clock-names = "mfc";
 190         };
 191
 192         rtc@101E0000 {
 193                 clocks = <&clock 337>;
 194                 clock-names = "rtc";
 195                 status = "okay";
 196         };
 197
 198         tmu@10060000 {
 199                 compatible = "samsung,exynos5250-tmu";
 200                 reg = <0x10060000 0x100>;
 201                 interrupts = <0 65 0>;
 202                 clocks = <&clock 338>;
 203                 clock-names = "tmu_apbif";
 204         };
 205
 206         serial@12C00000 {
 207                 clocks = <&clock 289>, <&clock 146>;
 208                 clock-names = "uart", "clk_uart_baud0";
 209         };
 210
 211         serial@12C10000 {
 212                 clocks = <&clock 290>, <&clock 147>;
 213                 clock-names = "uart", "clk_uart_baud0";
 214         };
 215
 216         serial@12C20000 {
 217                 clocks = <&clock 291>, <&clock 148>;
 218                 clock-names = "uart", "clk_uart_baud0";
 219         };
 220
 221         serial@12C30000 {
 222                 clocks = <&clock 292>, <&clock 149>;
 223                 clock-names = "uart", "clk_uart_baud0";
 224         };
 225
 226         sata@122F0000 {
 227                 compatible = "samsung,exynos5-sata-ahci";
 228                 reg = <0x122F0000 0x1ff>;
 229                 interrupts = <0 115 0>;
 230                 clocks = <&clock 277>, <&clock 143>;
 231                 clock-names = "sata", "sclk_sata";
 232         };
 233
 234         sata-phy@12170000 {
 235                 compatible = "samsung,exynos5-sata-phy";
 236                 reg = <0x12170000 0x1ff>;
 237         };
 238
 239         i2c_0: i2c@12C60000 {
 240                 compatible = "samsung,s3c2440-i2c";
 241                 reg = <0x12C60000 0x100>;
 242                 interrupts = <0 56 0>;
 243                 #address-cells = <1>;
 244                 #size-cells = <0>;
 245                 clocks = <&clock 294>;
 246                 clock-names = "i2c";
 247                 pinctrl-names = "default";
 248                 pinctrl-0 = <&i2c0_bus>;
 249                 status = "disabled";
 250         };
 251
 252         i2c_1: i2c@12C70000 {
 253                 compatible = "samsung,s3c2440-i2c";
 254                 reg = <0x12C70000 0x100>;
 255                 interrupts = <0 57 0>;
 256                 #address-cells = <1>;
 257                 #size-cells = <0>;
 258                 clocks = <&clock 295>;
 259                 clock-names = "i2c";
 260                 pinctrl-names = "default";
 261                 pinctrl-0 = <&i2c1_bus>;
 262                 status = "disabled";
 263         };
 264
 265         i2c_2: i2c@12C80000 {
 266                 compatible = "samsung,s3c2440-i2c";
 267                 reg = <0x12C80000 0x100>;
 268                 interrupts = <0 58 0>;
 269                 #address-cells = <1>;
 270                 #size-cells = <0>;
 271                 clocks = <&clock 296>;
 272                 clock-names = "i2c";
 273                 pinctrl-names = "default";
 274                 pinctrl-0 = <&i2c2_bus>;
 275                 status = "disabled";
 276         };
 277
 278         i2c_3: i2c@12C90000 {
 279                 compatible = "samsung,s3c2440-i2c";
 280                 reg = <0x12C90000 0x100>;
 281                 interrupts = <0 59 0>;
 282                 #address-cells = <1>;
 283                 #size-cells = <0>;
 284                 clocks = <&clock 297>;
 285                 clock-names = "i2c";
 286                 pinctrl-names = "default";
 287                 pinctrl-0 = <&i2c3_bus>;
 288                 status = "disabled";
 289         };
 290
 291         i2c_4: i2c@12CA0000 {
 292                 compatible = "samsung,s3c2440-i2c";
 293                 reg = <0x12CA0000 0x100>;
 294                 interrupts = <0 60 0>;
 295                 #address-cells = <1>;
 296                 #size-cells = <0>;
 297                 clocks = <&clock 298>;
 298                 clock-names = "i2c";
 299                 pinctrl-names = "default";
 300                 pinctrl-0 = <&i2c4_bus>;
 301                 status = "disabled";
 302         };
 303
 304         i2c_5: i2c@12CB0000 {
 305                 compatible = "samsung,s3c2440-i2c";
 306                 reg = <0x12CB0000 0x100>;
 307                 interrupts = <0 61 0>;
 308                 #address-cells = <1>;
 309                 #size-cells = <0>;
 310                 clocks = <&clock 299>;
 311                 clock-names = "i2c";
 312                 pinctrl-names = "default";
 313                 pinctrl-0 = <&i2c5_bus>;
 314                 status = "disabled";
 315         };
 316
 317         i2c_6: i2c@12CC0000 {
 318                 compatible = "samsung,s3c2440-i2c";
 319                 reg = <0x12CC0000 0x100>;
 320                 interrupts = <0 62 0>;
 321                 #address-cells = <1>;
 322                 #size-cells = <0>;
 323                 clocks = <&clock 300>;
 324                 clock-names = "i2c";
 325                 pinctrl-names = "default";
 326                 pinctrl-0 = <&i2c6_bus>;
 327                 status = "disabled";
 328         };
 329
 330         i2c_7: i2c@12CD0000 {
 331                 compatible = "samsung,s3c2440-i2c";
 332                 reg = <0x12CD0000 0x100>;
 333                 interrupts = <0 63 0>;
 334                 #address-cells = <1>;
 335                 #size-cells = <0>;
 336                 clocks = <&clock 301>;
 337                 clock-names = "i2c";
 338                 pinctrl-names = "default";
 339                 pinctrl-0 = <&i2c7_bus>;
 340                 status = "disabled";
 341         };
 342
 343         i2c_8: i2c@12CE0000 {
 344                 compatible = "samsung,s3c2440-hdmiphy-i2c";
 345                 reg = <0x12CE0000 0x1000>;
 346                 interrupts = <0 64 0>;
 347                 #address-cells = <1>;
 348                 #size-cells = <0>;
 349                 clocks = <&clock 302>;
 350                 clock-names = "i2c";
 351                 status = "disabled";
 352         };
 353
 354         i2c@121D0000 {
 355                 compatible = "samsung,exynos5-sata-phy-i2c";
 356                 reg = <0x121D0000 0x100>;
 357                 #address-cells = <1>;
 358                 #size-cells = <0>;
 359                 clocks = <&clock 288>;
 360                 clock-names = "i2c";
 361                 status = "disabled";
 362         };
 363
 364         spi_0: spi@12d20000 {
 365                 compatible = "samsung,exynos4210-spi";
 366                 status = "disabled";
 367                 reg = <0x12d20000 0x100>;
 368                 interrupts = <0 66 0>;
 369                 dmas = <&pdma0 5
 370                         &pdma0 4>;
 371                 dma-names = "tx", "rx";
 372                 #address-cells = <1>;
 373                 #size-cells = <0>;
 374                 clocks = <&clock 304>, <&clock 154>;
 375                 clock-names = "spi", "spi_busclk0";
 376                 pinctrl-names = "default";
 377                 pinctrl-0 = <&spi0_bus>;
 378         };
 379
 380         spi_1: spi@12d30000 {
 381                 compatible = "samsung,exynos4210-spi";
 382                 status = "disabled";
 383                 reg = <0x12d30000 0x100>;
 384                 interrupts = <0 67 0>;
 385                 dmas = <&pdma1 5
 386                         &pdma1 4>;
 387                 dma-names = "tx", "rx";
 388                 #address-cells = <1>;
 389                 #size-cells = <0>;
 390                 clocks = <&clock 305>, <&clock 155>;
 391                 clock-names = "spi", "spi_busclk0";
 392                 pinctrl-names = "default";
 393                 pinctrl-0 = <&spi1_bus>;
 394         };
 395
 396         spi_2: spi@12d40000 {
 397                 compatible = "samsung,exynos4210-spi";
 398                 status = "disabled";
 399                 reg = <0x12d40000 0x100>;
 400                 interrupts = <0 68 0>;
 401                 dmas = <&pdma0 7
 402                         &pdma0 6>;
 403                 dma-names = "tx", "rx";
 404                 #address-cells = <1>;
 405                 #size-cells = <0>;
 406                 clocks = <&clock 306>, <&clock 156>;
 407                 clock-names = "spi", "spi_busclk0";
 408                 pinctrl-names = "default";
 409                 pinctrl-0 = <&spi2_bus>;
 410         };
 411
 412         mmc_0: mmc@12200000 {
 413                 compatible = "samsung,exynos5250-dw-mshc";
 414                 interrupts = <0 75 0>;
 415                 #address-cells = <1>;
 416                 #size-cells = <0>;
 417                 reg = <0x12200000 0x1000>;
 418                 clocks = <&clock 280>, <&clock 139>;
 419                 clock-names = "biu", "ciu";
 420                 fifo-depth = <0x80>;
 421                 status = "disabled";
 422         };
 423
 424         mmc_1: mmc@12210000 {
 425                 compatible = "samsung,exynos5250-dw-mshc";
 426                 interrupts = <0 76 0>;
 427                 #address-cells = <1>;
 428                 #size-cells = <0>;
 429                 reg = <0x12210000 0x1000>;
 430                 clocks = <&clock 281>, <&clock 140>;
 431                 clock-names = "biu", "ciu";
 432                 fifo-depth = <0x80>;
 433                 status = "disabled";
 434         };
 435
 436         mmc_2: mmc@12220000 {
 437                 compatible = "samsung,exynos5250-dw-mshc";
 438                 interrupts = <0 77 0>;
 439                 #address-cells = <1>;
 440                 #size-cells = <0>;
 441                 reg = <0x12220000 0x1000>;
 442                 clocks = <&clock 282>, <&clock 141>;
 443                 clock-names = "biu", "ciu";
 444                 fifo-depth = <0x80>;
 445                 status = "disabled";
 446         };
 447
 448         mmc_3: mmc@12230000 {
 449                 compatible = "samsung,exynos5250-dw-mshc";
 450                 reg = <0x12230000 0x1000>;
 451                 interrupts = <0 78 0>;
 452                 #address-cells = <1>;
 453                 #size-cells = <0>;
 454                 clocks = <&clock 283>, <&clock 142>;
 455                 clock-names = "biu", "ciu";
 456                 fifo-depth = <0x80>;
 457                 status = "disabled";
 458         };
 459
 460         i2s0: i2s@03830000 {
 461                 compatible = "samsung,s5pv210-i2s";
 462                 status = "disabled";
 463                 reg = <0x03830000 0x100>;
 464                 dmas = <&pdma0 10
 465                         &pdma0 9
 466                         &pdma0 8>;
 467                 dma-names = "tx", "rx", "tx-sec";
 468                 clocks = <&clock_audss EXYNOS_I2S_BUS>,
 469                         <&clock_audss EXYNOS_I2S_BUS>,
 470                         <&clock_audss EXYNOS_SCLK_I2S>;
 471                 clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
 472                 samsung,idma-addr = <0x03000000>;
 473                 pinctrl-names = "default";
 474                 pinctrl-0 = <&i2s0_bus>;
 475         };
 476
 477         i2s1: i2s@12D60000 {
 478                 compatible = "samsung,s3c6410-i2s";
 479                 status = "disabled";
 480                 reg = <0x12D60000 0x100>;
 481                 dmas = <&pdma1 12
 482                         &pdma1 11>;
 483                 dma-names = "tx", "rx";
 484                 clocks = <&clock 307>, <&clock 157>;
 485                 clock-names = "iis", "i2s_opclk0";
 486                 pinctrl-names = "default";
 487                 pinctrl-0 = <&i2s1_bus>;
 488         };
 489
 490         i2s2: i2s@12D70000 {
 491                 compatible = "samsung,s3c6410-i2s";
 492                 status = "disabled";
 493                 reg = <0x12D70000 0x100>;
 494                 dmas = <&pdma0 12
 495                         &pdma0 11>;
 496                 dma-names = "tx", "rx";
 497                 clocks = <&clock 308>, <&clock 158>;
 498                 clock-names = "iis", "i2s_opclk0";
 499                 pinctrl-names = "default";
 500                 pinctrl-0 = <&i2s2_bus>;
 501         };
 502
 503         usb@12000000 {
 504                 compatible = "samsung,exynos5250-dwusb3";
 505                 clocks = <&clock 286>;
 506                 clock-names = "usbdrd30";
 507                 #address-cells = <1>;
 508                 #size-cells = <1>;
 509                 ranges;
 510
 511                 dwc3 {
 512                         compatible = "synopsys,dwc3";
 513                         reg = <0x12000000 0x10000>;
 514                         interrupts = <0 72 0>;
 515                         usb-phy = <&usb2_phy &usb3_phy>;
 516                 };
 517         };
 518
 519         usb3_phy: usbphy@12100000 {
 520                 compatible = "samsung,exynos5250-usb3phy";
 521                 reg = <0x12100000 0x100>;
 522                 clocks = <&clock 1>, <&clock 286>;
 523                 clock-names = "ext_xtal", "usbdrd30";
 524                 #address-cells = <1>;
 525                 #size-cells = <1>;
 526                 ranges;
 527
 528                 usbphy-sys {
 529                         reg = <0x10040704 0x8>;
 530                 };
 531         };
 532
 533         usb@12110000 {
 534                 compatible = "samsung,exynos4210-ehci";
 535                 reg = <0x12110000 0x100>;
 536                 interrupts = <0 71 0>;
 537
 538                 clocks = <&clock 285>;
 539                 clock-names = "usbhost";
 540         };
 541
 542         usb@12120000 {
 543                 compatible = "samsung,exynos4210-ohci";
 544                 reg = <0x12120000 0x100>;
 545                 interrupts = <0 71 0>;
 546
 547                 clocks = <&clock 285>;
 548                 clock-names = "usbhost";
 549         };
 550
 551         usb2_phy: usbphy@12130000 {
 552                 compatible = "samsung,exynos5250-usb2phy";
 553                 reg = <0x12130000 0x100>;
 554                 clocks = <&clock 1>, <&clock 285>;
 555                 clock-names = "ext_xtal", "usbhost";
 556                 #address-cells = <1>;
 557                 #size-cells = <1>;
 558                 ranges;
 559
 560                 usbphy-sys {
 561                         reg = <0x10040704 0x8>,
 562                               <0x10050230 0x4>;
 563                 };
 564         };
 565
 566         pwm: pwm@12dd0000 {
 567                 compatible = "samsung,exynos4210-pwm";
 568                 reg = <0x12dd0000 0x100>;
 569                 samsung,pwm-outputs = <0>, <1>, <2>, <3>;
 570                 #pwm-cells = <3>;
 571                 clocks = <&clock 311>;
 572                 clock-names = "timers";
 573         };
 574
 575         amba {
 576                 #address-cells = <1>;
 577                 #size-cells = <1>;
 578                 compatible = "arm,amba-bus";
 579                 interrupt-parent = <&gic>;
 580                 ranges;
 581
 582                 pdma0: pdma@121A0000 {
 583                         compatible = "arm,pl330", "arm,primecell";
 584                         reg = <0x121A0000 0x1000>;
 585                         interrupts = <0 34 0>;
 586                         clocks = <&clock 275>;
 587                         clock-names = "apb_pclk";
 588                         #dma-cells = <1>;
 589                         #dma-channels = <8>;
 590                         #dma-requests = <32>;
 591                 };
 592
 593                 pdma1: pdma@121B0000 {
 594                         compatible = "arm,pl330", "arm,primecell";
 595                         reg = <0x121B0000 0x1000>;
 596                         interrupts = <0 35 0>;
 597                         clocks = <&clock 276>;
 598                         clock-names = "apb_pclk";
 599                         #dma-cells = <1>;
 600                         #dma-channels = <8>;
 601                         #dma-requests = <32>;
 602                 };
 603
 604                 mdma0: mdma@10800000 {
 605                         compatible = "arm,pl330", "arm,primecell";
 606                         reg = <0x10800000 0x1000>;
 607                         interrupts = <0 33 0>;
 608                         clocks = <&clock 346>;
 609                         clock-names = "apb_pclk";
 610                         #dma-cells = <1>;
 611                         #dma-channels = <8>;
 612                         #dma-requests = <1>;
 613                 };
 614
 615                 mdma1: mdma@11C10000 {
 616                         compatible = "arm,pl330", "arm,primecell";
 617                         reg = <0x11C10000 0x1000>;
 618                         interrupts = <0 124 0>;
 619                         clocks = <&clock 271>;
 620                         clock-names = "apb_pclk";
 621                         #dma-cells = <1>;
 622                         #dma-channels = <8>;
 623                         #dma-requests = <1>;
 624                 };
 625         };
 626
 627         gsc_0:  gsc@13e00000 {
 628                 compatible = "samsung,exynos5-gsc";
 629                 reg = <0x13e00000 0x1000>;
 630                 interrupts = <0 85 0>;
 631                 samsung,power-domain = <&pd_gsc>;
 632                 clocks = <&clock 256>;
 633                 clock-names = "gscl";
 634         };
 635
 636         gsc_1:  gsc@13e10000 {
 637                 compatible = "samsung,exynos5-gsc";
 638                 reg = <0x13e10000 0x1000>;
 639                 interrupts = <0 86 0>;
 640                 samsung,power-domain = <&pd_gsc>;
 641                 clocks = <&clock 257>;
 642                 clock-names = "gscl";
 643         };
 644
 645         gsc_2:  gsc@13e20000 {
 646                 compatible = "samsung,exynos5-gsc";
 647                 reg = <0x13e20000 0x1000>;
 648                 interrupts = <0 87 0>;
 649                 samsung,power-domain = <&pd_gsc>;
 650                 clocks = <&clock 258>;
 651                 clock-names = "gscl";
 652         };
 653
 654         gsc_3:  gsc@13e30000 {
 655                 compatible = "samsung,exynos5-gsc";
 656                 reg = <0x13e30000 0x1000>;
 657                 interrupts = <0 88 0>;
 658                 samsung,power-domain = <&pd_gsc>;
 659                 clocks = <&clock 259>;
 660                 clock-names = "gscl";
 661         };
 662
 663         hdmi {
 664                 compatible = "samsung,exynos4212-hdmi";
 665                 reg = <0x14530000 0x70000>;
 666                 interrupts = <0 95 0>;
 667                 clocks = <&clock 344>, <&clock 136>, <&clock 137>,
 668                                 <&clock 159>, <&clock 1024>;
 669                 clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
 670                                 "sclk_hdmiphy", "mout_hdmi";
 671         };
 672
 673         mixer {
 674                 compatible = "samsung,exynos5250-mixer";
 675                 reg = <0x14450000 0x10000>;
 676                 interrupts = <0 94 0>;
 677                 clocks = <&clock 343>, <&clock 136>;
 678                 clock-names = "mixer", "sclk_hdmi";
 679         };
 680
 681         dp_phy: video-phy@10040720 {
 682                 compatible = "samsung,exynos5250-dp-video-phy";
 683                 reg = <0x10040720 4>;
 684                 #phy-cells = <0>;
 685         };
 686
 687         dp-controller@145B0000 {
 688                 clocks = <&clock 342>;
 689                 clock-names = "dp";
 690                 phys = <&dp_phy>;
 691                 phy-names = "dp";
 692         };
 693
 694         fimd@14400000 {
 695                 clocks = <&clock 133>, <&clock 339>;
 696                 clock-names = "sclk_fimd", "fimd";
 697         };
 698
 699         adc: adc@12D10000 {
 700                 compatible = "samsung,exynos-adc-v1";
 701                 reg = <0x12D10000 0x100>, <0x10040718 0x4>;
 702                 interrupts = <0 106 0>;
 703                 clocks = <&clock 303>;
 704                 clock-names = "adc";
 705                 #io-channel-cells = <1>;
 706                 io-channel-ranges;
 707                 status = "disabled";
 708         };
 709 };